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2021-12-21um: header debriding - sigio.hAl Viro
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Richard Weinberger <richard@nod.at>
2021-12-21um: header debriding - os.hAl Viro
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Richard Weinberger <richard@nod.at>
2021-12-21um: header debriding - net_*.hAl Viro
externs dead since before the initial merge Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Richard Weinberger <richard@nod.at>
2021-12-21um: header debriding - mem_user.hAl Viro
get_vm(), add_iomem(), phys_offset() dead since 2004; init_mem_user() and setup_memory() - since before the initial merge. Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Richard Weinberger <richard@nod.at>
2021-12-21um: header debriding - activate_ipi()Al Viro
... had been dead for 15 years. Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Richard Weinberger <richard@nod.at>
2021-12-21um: common-offsets.h debriding...Al Viro
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Richard Weinberger <richard@nod.at>
2021-12-21um, x86: bury crypto_tfm_ctx_offsetAl Viro
unused since 2011 Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Richard Weinberger <richard@nod.at>
2021-12-21um: unexport handle_page_fault()Al Viro
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Richard Weinberger <richard@nod.at>
2021-12-21um: remove a dangling extern of syscall_trace()Al Viro
the function had been gone since 2012... Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Richard Weinberger <richard@nod.at>
2021-12-21um: kill unused cpu()Al Viro
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Richard Weinberger <richard@nod.at>
2021-12-21uml/i386: missing include in barrier.hAl Viro
we need cpufeatures.h there Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Richard Weinberger <richard@nod.at>
2021-12-21um: stop polluting the namespace with registers.h contentsAl Viro
Only one extern in there is needed in processor-generic.h, and it's not needed anywhere else. So move it over there and get rid of the include in processor-generic.h, adding includes of registers.h to the few files that need the declarations in it. Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Richard Weinberger <richard@nod.at>
2021-12-21um: move amd64 variant of mmap(2) to arch/x86/um/syscalls_64.cAl Viro
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Richard Weinberger <richard@nod.at>
2021-12-21uml: trim unused junk from arch/x86/um/sys_call_table_*.cAl Viro
a bunch of detritus there - definitions that are never expanded or checked. Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Richard Weinberger <richard@nod.at>
2021-12-21um: virtio_uml: Fix time-travel external time propagationJohannes Berg
When creating an external event, the current time needs to be propagated to other participants of a simulation. This is done in the places here where we kick a virtq etc. However, it must be done for _all_ external events, and that includes making the initial socket connection and later closing it. Call time_travel_propagate_time() to do this before making or closing the socket connection. Apparently, at least for the initial connection creation, due to the remote side in my use cases using microseconds (rather than nanoseconds), this wasn't a problem yet; only started failing between 5.14-rc1 and 5.15-rc1 (didn't test others much), or possibly depending on the configuration, where more delays happen before the virtio devices are initialized. Fixes: 88ce64249233 ("um: Implement time-travel=ext") Signed-off-by: Johannes Berg <johannes.berg@intel.com> Signed-off-by: Richard Weinberger <richard@nod.at>
2021-12-21um: virt-pci: Fix 32-bit compileJohannes Berg
There were a few 32-bit compile warnings that of course turned into errors with -Werror, fix the 32-bit build. Fixes: 68f5d3f3b654 ("um: add PCI over virtio emulation driver") Reported-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Johannes Berg <johannes.berg@intel.com> Signed-off-by: Richard Weinberger <richard@nod.at>
2021-12-21Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvmLinus Torvalds
Pull kvm fixes from Paolo Bonzini: - Fix for compilation of selftests on non-x86 architectures - Fix for kvm_run->if_flag on SEV-ES - Fix for page table use-after-free if yielding during exit_mm() - Improve behavior when userspace starts a nested guest with invalid state - Fix missed wakeup with assigned devices but no VT-d posted interrupts - Do not tell userspace to save/restore an unsupported PMU MSR * tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: KVM: VMX: Wake vCPU when delivering posted IRQ even if vCPU == this vCPU KVM: selftests: Add test to verify TRIPLE_FAULT on invalid L2 guest state KVM: VMX: Fix stale docs for kvm-intel.emulate_invalid_guest_state KVM: nVMX: Synthesize TRIPLE_FAULT for L2 if emulation is required KVM: VMX: Always clear vmx->fail on emulation_required selftests: KVM: Fix non-x86 compiling KVM: x86: Always set kvm_run->if_flag KVM: x86/mmu: Don't advance iterator after restart due to yielding KVM: x86: remove PMU FIXED_CTR3 from msrs_to_save_all
2021-12-21um: gitignore: Add kernel/capflags.cJohannes Berg
This file is generated, we should ignore it. Fixes: d8fb32f4790f ("um: Add support for host CPU flags and alignment") Signed-off-by: Johannes Berg <johannes.berg@intel.com> Acked-By: anton.ivanov@cambridgegreys.com Signed-off-by: Richard Weinberger <richard@nod.at>
2021-12-21um: registers: Rename function names to avoid conflicts and build problemsRandy Dunlap
The function names init_registers() and restore_registers() are used in several net/ethernet/ and gpu/drm/ drivers for other purposes (not calls to UML functions), so rename them. This fixes multiple build errors. Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Cc: Jeff Dike <jdike@addtoit.com> Cc: Richard Weinberger <richard@nod.at> Cc: Anton Ivanov <anton.ivanov@cambridgegreys.com> Cc: linux-um@lists.infradead.org Signed-off-by: Richard Weinberger <richard@nod.at>
2021-12-21um: Replace if (cond) BUG() with BUG_ON()Changcheng Deng
Fix the following coccinelle reports: ./arch/um/kernel/mem.c:89:2-5: WARNING: Use BUG_ON instead of if condition followed by BUG. Reported-by: Zeal Robot <zealci@zte.com.cn> Signed-off-by: Changcheng Deng <deng.changcheng@zte.com.cn> Signed-off-by: Richard Weinberger <richard@nod.at>
2021-12-21parisc: Fix mask used to select futex spinlockJohn David Anglin
The address bits used to select the futex spinlock need to match those used in the LWS code in syscall.S. The mask 0x3f8 only selects 7 bits. It should select 8 bits. This change fixes the glibc nptl/tst-cond24 and nptl/tst-cond25 tests. Signed-off-by: John David Anglin <dave.anglin@bell.net> Fixes: 53a42b6324b8 ("parisc: Switch to more fine grained lws locks") Cc: stable@vger.kernel.org # 5.10+ Signed-off-by: Helge Deller <deller@gmx.de>
2021-12-21uml: x86: add FORCE to user_constants.hJohannes Berg
The build system has started warning when filechk is called without FORCE: arch/x86/um/Makefile:44: FORCE prerequisite is missing Add FORCE to make sure the file is checked/rebuilt when necessary (and to quiet up the warning.) Signed-off-by: Johannes Berg <johannes.berg@intel.com> Reviewed-by: David Gow <davidgow@google.com> Signed-off-by: Richard Weinberger <richard@nod.at>
2021-12-21um: rename set_signals() to um_set_signals()Johannes Berg
Rename set_signals() as there's at least one driver that uses the same name and can now be built on UM due to PCI support, and thus we can get symbol conflicts. Also rename set_signals_trace() to be consistent. Reported-by: kernel test robot <lkp@intel.com> Fixes: 68f5d3f3b654 ("um: add PCI over virtio emulation driver") Signed-off-by: Johannes Berg <johannes.berg@intel.com> Signed-off-by: Richard Weinberger <richard@nod.at>
2021-12-21um: fix ndelay/udelay definesJohannes Berg
Many places in the kernel use 'udelay' as an identifier, and are broken with the current "#define udelay um_udelay". Fix this by adding an argument to the macro, and do the same to 'ndelay' as well, just in case. Fixes: 0bc8fb4dda2b ("um: Implement ndelay/udelay in time-travel mode") Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Johannes Berg <johannes.berg@intel.com> Signed-off-by: Richard Weinberger <richard@nod.at>
2021-12-21parisc: Correct completer in lws startJohn David Anglin
The completer in the "or,ev %r1,%r30,%r30" instruction is reversed, so we are not clipping the LWS number when we are called from a 32-bit process (W=0). We need to nulify the following depdi instruction when the least-significant bit of %r30 is 1. If the %r20 register is not clipped, a user process could perform a LWS call that would branch to an undefined location in the kernel and potentially crash the machine. Signed-off-by: John David Anglin <dave.anglin@bell.net> Cc: stable@vger.kernel.org # 4.19+ Signed-off-by: Helge Deller <deller@gmx.de>
2021-12-21Merge tag 'kvm-s390-next-5.17-1' of ↵Paolo Bonzini
git://git.kernel.org/pub/scm/linux/kernel/git/kvms390/linux into HEAD KVM: s390: Fix and cleanup - fix sigp sense/start/stop/inconsistency - cleanups
2021-12-21Merge remote-tracking branch 'kvm/master' into HEADPaolo Bonzini
Pick commit fdba608f15e2 ("KVM: VMX: Wake vCPU when delivering posted IRQ even if vCPU == this vCPU"). In addition to fixing a bug, it also aligns the non-nested and nested usage of triggering posted interrupts, allowing for additional cleanups. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-12-21KVM: VMX: Wake vCPU when delivering posted IRQ even if vCPU == this vCPUSean Christopherson
Drop a check that guards triggering a posted interrupt on the currently running vCPU, and more importantly guards waking the target vCPU if triggering a posted interrupt fails because the vCPU isn't IN_GUEST_MODE. If a vIRQ is delivered from asynchronous context, the target vCPU can be the currently running vCPU and can also be blocking, in which case skipping kvm_vcpu_wake_up() is effectively dropping what is supposed to be a wake event for the vCPU. The "do nothing" logic when "vcpu == running_vcpu" mostly works only because the majority of calls to ->deliver_posted_interrupt(), especially when using posted interrupts, come from synchronous KVM context. But if a device is exposed to the guest using vfio-pci passthrough, the VFIO IRQ and vCPU are bound to the same pCPU, and the IRQ is _not_ configured to use posted interrupts, wake events from the device will be delivered to KVM from IRQ context, e.g. vfio_msihandler() | |-> eventfd_signal() | |-> ... | |-> irqfd_wakeup() | |->kvm_arch_set_irq_inatomic() | |-> kvm_irq_delivery_to_apic_fast() | |-> kvm_apic_set_irq() This also aligns the non-nested and nested usage of triggering posted interrupts, and will allow for additional cleanups. Fixes: 379a3c8ee444 ("KVM: VMX: Optimize posted-interrupt delivery for timer fastpath") Cc: stable@vger.kernel.org Reported-by: Longpeng (Mike) <longpeng2@huawei.com> Signed-off-by: Sean Christopherson <seanjc@google.com> Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com> Message-Id: <20211208015236.1616697-18-seanjc@google.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-12-21Merge tag 'qcom-dts-for-5.17' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt Qualcomm DeviceTree updates for v5.17 To SDX55 this introduces the description of the IPA, PCIe PHY and PCIe endpoint controller, as well as enables these for the FN960 device. The SDX65 5G platform is introduced, currently with definitions necessary to boot to a shell. The undocumented property "input-name" is dropped throughout the dts files, dwc3 nodes throughout gains more specific compatibles and lastly building of the Dragonboard 410c DTB on ARM32 is enabled, in addition to its normal operation in 64-bit mode. * tag 'qcom-dts-for-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: ARM: dts: qcom: Drop input-name property ARM: dts: qcom: sdx65: Add pincontrol node ARM: dts: qcom: Add SDX65 platform and MTP board support dt-bindings: arm: qcom: Document SDX65 platform and boards dt-bindings: clock: Add SDX65 GCC clock bindings ARM: dts: qcom: Build apq8016-sbc/DragonBoard 410c DTB on ARM32 ARM: dts: qcom: sdx55-t55: Enable IPA ARM: dts: qcom: sdx55-fn980: Enable IPA ARM: dts: qcom: sdx55-fn980: Enable PCIe EP ARM: dts: qcom: sdx55: Add support for PCIe EP ARM: dts: qcom: sdx55-fn980: Enable PCIE0 PHY ARM: dts: qcom: sdx55: Add support for PCIe PHY ARM: dts: qcom: update USB nodes with new platform specific compatible Link: https://lore.kernel.org/r/20211221042154.3621955-1-bjorn.andersson@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-21MIPS: generic: enable SMP on SMVP systemsSander Vanheule
In addition to CPS SMP setups, also try to initialise MT SMP setups with multiple VPEs per CPU core. CMP SMP support is not provided as it is considered deprecated. Additionally, rework the code by dropping the err variable and make it similar to how other platforms perform this initialisation. Co-developed-by: INAGAKI Hiroshi <musashino.open@gmail.com> Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com> Signed-off-by: Sander Vanheule <sander@svanheule.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-12-21MIPS: only register MT SMP ops if MT is supportedSander Vanheule
Verify that the current CPU actually supports multi-threading before registering MT SMP ops, instead of unconditionally registering them if the kernel is compiled with CONFIG_MIPS_MT_SMP. Suggested-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Sander Vanheule <sander@svanheule.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-12-21MIPS: Octeon: Fix build errors using clangTianjia Zhang
A large number of the following errors is reported when compiling with clang: cvmx-bootinfo.h:326:3: error: adding 'int' to a string does not append to the string [-Werror,-Wstring-plus-int] ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NULL) ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ cvmx-bootinfo.h:321:20: note: expanded from macro 'ENUM_BRD_TYPE_CASE' case x: return(#x + 16); /* Skip CVMX_BOARD_TYPE_ */ ~~~^~~~ cvmx-bootinfo.h:326:3: note: use array indexing to silence this warning cvmx-bootinfo.h:321:20: note: expanded from macro 'ENUM_BRD_TYPE_CASE' case x: return(#x + 16); /* Skip CVMX_BOARD_TYPE_ */ ^ Follow the prompts to use the address operator '&' to fix this error. Signed-off-by: Tianjia Zhang <tianjia.zhang@linux.alibaba.com> Reviewed-by: Nathan Chancellor <nathan@kernel.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-12-21arm64: exynos: Enable Exynos Multi-Core Timer driverMarek Szyprowski
Some ARM64 Exynos SoCs have MCT timer block, e.g. Exynos850 and Exynos5433. CLKSRC_EXYNOS_MCT option is not visible unless COMPILE_TEST is enabled. Select CLKSRC_EXYNOS_MCT option for ARM64 ARCH_EXYNOS like it's done in arch/arm/mach-exynos/Kconfig, to enable MCT timer support for ARM64 Exynos SoCs. Even though ARM architected timer is available on all ARM64 SoCs, and used for managing timer hardware and clock source events, MCT timer still can be used as a wakeup source, as stated in commitae460fd9164b ("clocksource/drivers/exynos_mct: Prioritise Arm arch timer on arm64"). It's also nice to be able to test available MCT IP-core. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Tested-by: Chanwoo Choi <cw00.choi@samsung.com> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com> Link: https://lore.kernel.org/r/20211101193531.15078-3-semen.protsenko@linaro.org Link: https://lore.kernel.org/r/20211220165004.17005-2-krzysztof.kozlowski@canonical.com' Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-21arm64: defconfig: Enable Samsung I2C driverSam Protsenko
i2c-s3c2410 driver is needed for some arm64 Exynos SoCs, e.g. Exynos850. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Link: https://lore.kernel.org/r/20211121150558.21801-1-semen.protsenko@linaro.org Link: https://lore.kernel.org/r/20211220165004.17005-1-krzysztof.kozlowski@canonical.com' Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-21powerpc/dts: Remove "spidev" nodesRob Herring
"spidev" is not a real device, but a Linux implementation detail. It has never been documented either. The kernel has WARNed on the use of it for over 6 years. Time to remove its usage from the tree. Signed-off-by: Rob Herring <robh@kernel.org> Reviewed-by: Mark Brown <broonie@kernel.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20211217221400.3667133-1-robh@kernel.org
2021-12-20arm64: dts: qcom: sm8450-qrd: Enable USB nodesVinod Koul
Enable the usb phy and usb controller in peripheral mode. This helps to get the adb working with the QRD board. Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211216110813.658384-2-vkoul@kernel.org
2021-12-20arm64: dts: qcom: sm8450: Add usb nodesVinod Koul
SM8450 features a single USB controller which connects to both HS and SS phy. Add the USB and the phy nodes for Qualcomm SM8450 SoC. Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211216110813.658384-1-vkoul@kernel.org
2021-12-21ARM: dts: aspeed: add LCLK setting into LPC KCS nodesJae Hyun Yoo
If LPC KCS driver is registered ahead of lpc-ctrl module, LPC KCS hardware block will be enabled without heart beating of LCLK until lpc-ctrl enables the LCLK. This issue causes improper handling on host interrupts when the host sends interrupts in that time frame. Then kernel eventually forcibly disables the interrupt with dumping stack and printing a 'nobody cared this irq' message out. To prevent this issue, all LPC sub drivers should enable LCLK individually so this patch adds 'clocks' property setting into LPC KCS node as one of required properties to enable the LCLK by the LPC KCS driver. Note: dtbs should be re-compiled after applying this change since it's adding a new required property otherwise the driver will not be probed correctly. Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Link: https://lore.kernel.org/r/20211108190200.290957-5-jae.hyun.yoo@intel.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-12-21ARM: dts: aspeed: add LCLK setting into LPC IBT nodeJae Hyun Yoo
If LPC BT driver is registered ahead of lpc-ctrl module, LPC BT hardware block will be enabled without heart beating of LCLK until lpc-ctrl enables the LCLK. This issue causes improper handling on host interrupts when the host sends interrupts in that time frame. Then kernel eventually forcibly disables the interrupt with dumping stack and printing a 'nobody cared this irq' message out. To prevent this issue, all LPC sub drivers should enable LCLK individually so this patch adds 'clocks' property setting into LPC IBT node as one of required properties to enable the LCLK by the LPC IBT driver. Note: dtbs should be re-compiled after applying this change since it's adding a new required property otherwise the driver will not be probed correctly. Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Link: https://lore.kernel.org/r/20211108190200.290957-2-jae.hyun.yoo@intel.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-12-21ARM: dts: aspeed: p10: Add TPM deviceEddie James
Add the Nuvoton NPCT75X, a TIS I2C TPM. Modified Eddie's change to include the general compatible string, and combine the rainier and everest patches. Signed-off-by: Eddie James <eajames@linux.ibm.com> Link: https://lore.kernel.org/r/20211208191758.20517-8-eajames@linux.ibm.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-12-21ARM: dts: aspeed: p10: Enable USB host portsEddie James
Ensure both controllers are enabled on, and add GPIO hog for USB power control to set the USB power to always on. Signed-off-by: Eddie James <eajames@linux.ibm.com> Link: https://lore.kernel.org/r/20211208170641.13322-1-eajames@linux.ibm.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-12-21ARM: dts: aspeed: Add TYAN S8036 BMC machineAli El-Haj-Mahmoud
The TYAN S8036 is a server platform with an ASPEED AST2500 BMC. Signed-off-by: Ali El-Haj-Mahmoud <aaelhaj@google.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20211130180110.2217042-1-aaelhaj@google.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-12-21ARM: dts: aspeed: tyan-s7106: Add uart_routing and fix vuart configOskar Senft
Configure the vuart in such a way that it does not inhibit the SuperIO's UART from functioning correctly. This allows the same DTS to be used for both configurations with SuperIO and VUART (depending on the BIOS build). The decision on whether to actually enable VUART can then be made at runtime. This change also enables the new uart_routing driver for the SuperIO case. Signed-off-by: Oskar Senft <osk@google.com> Link: https://lore.kernel.org/r/20211130184855.1779353-1-osk@google.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-12-21ARM: dts: aspeed: Adding Facebook Bletchley BMCHoward Chiu
Initial introduction of Facebook Bletchley equipped with Aspeed 2600 BMC SoC. Signed-off-by: Howard Chiu <howard.chiu@quantatw.com> Link: https://lore.kernel.org/r/20211207094923.422422-1-howard.chiu@quantatw.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-12-21ARM: dts: aspeed: g220a: Enable secondary flashLei YU
Enable the secondary flash of the g220a's BMC and the wdt2. Signed-off-by: Lei YU <yulei.sh@bytedance.com> Link: https://lore.kernel.org/r/20211210093623.2140640-1-yulei.sh@bytedance.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-12-21ARM: dts: Add openbmc-flash-layout-64-alt.dtsiLei YU
Add openbmc-flash-layout-64-alt.dtsi to describe the partitions of the secondary flash for OpenBMC's 64M static layout. The layout is the same as openbmc-flash-layout-64.dtsi and the labels are prepended with "alt-" for the partitions. Signed-off-by: Lei YU <yulei.sh@bytedance.com> Reviewed-by: Patrick Williams <patrick@stwcx.xyz> Link: https://lore.kernel.org/r/20211210093443.2140557-1-yulei.sh@bytedance.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-12-21ARM: dts: aspeed: Add secure boot controller nodeJoel Stanley
The ast2600 has a secure boot controller. Signed-off-by: Joel Stanley <joel@jms.id.au> Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com> Link: https://lore.kernel.org/r/20211117035106.321454-3-joel@jms.id.au Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-12-21powerpc/ptdump: Fix DEBUG_WX since generic ptdump conversionMichael Ellerman
In note_prot_wx() we bail out without reporting anything if CONFIG_PPC_DEBUG_WX is disabled. But CONFIG_PPC_DEBUG_WX was removed in the conversion to generic ptdump, we now need to use CONFIG_DEBUG_WX instead. Fixes: e084728393a5 ("powerpc/ptdump: Convert powerpc to GENERIC_PTDUMP") Cc: stable@vger.kernel.org # v5.15+ Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu> Link: https://lore.kernel.org/r/20211203124112.2912562-1-mpe@ellerman.id.au
2021-12-20net: netvsc: Add Isolation VM support for netvsc driverTianyu Lan
In Isolation VM, all shared memory with host needs to mark visible to host via hvcall. vmbus_establish_gpadl() has already done it for netvsc rx/tx ring buffer. The page buffer used by vmbus_sendpacket_ pagebuffer() stills need to be handled. Use DMA API to map/umap these memory during sending/receiving packet and Hyper-V swiotlb bounce buffer dma address will be returned. The swiotlb bounce buffer has been masked to be visible to host during boot up. rx/tx ring buffer is allocated via vzalloc() and they need to be mapped into unencrypted address space(above vTOM) before sharing with host and accessing. Add hv_map/unmap_memory() to map/umap rx /tx ring buffer. Signed-off-by: Tianyu Lan <Tianyu.Lan@microsoft.com> Reviewed-by: Haiyang Zhang <haiyangz@microsoft.com> Reviewed-by: Michael Kelley <mikelley@microsoft.com> Link: https://lore.kernel.org/r/20211213071407.314309-6-ltykernel@gmail.com Signed-off-by: Wei Liu <wei.liu@kernel.org>
2021-12-20hyper-v: Enable swiotlb bounce buffer for Isolation VMTianyu Lan
hyperv Isolation VM requires bounce buffer support to copy data from/to encrypted memory and so enable swiotlb force mode to use swiotlb bounce buffer for DMA transaction. In Isolation VM with AMD SEV, the bounce buffer needs to be accessed via extra address space which is above shared_gpa_boundary (E.G 39 bit address line) reported by Hyper-V CPUID ISOLATION_CONFIG. The access physical address will be original physical address + shared_gpa_boundary. The shared_gpa_boundary in the AMD SEV SNP spec is called virtual top of memory(vTOM). Memory addresses below vTOM are automatically treated as private while memory above vTOM is treated as shared. Swiotlb bounce buffer code calls set_memory_decrypted() to mark bounce buffer visible to host and map it in extra address space via memremap. Populate the shared_gpa_boundary (vTOM) via swiotlb_unencrypted_base variable. The map function memremap() can't work in the early place (e.g ms_hyperv_init_platform()) and so call swiotlb_update_mem_ attributes() in the hyperv_init(). Signed-off-by: Tianyu Lan <Tianyu.Lan@microsoft.com> Reviewed-by: Michael Kelley <mikelley@microsoft.com> Link: https://lore.kernel.org/r/20211213071407.314309-4-ltykernel@gmail.com Signed-off-by: Wei Liu <wei.liu@kernel.org>
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