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2020-07-28parisc: Report bad pages as HardwareCorruptedHelge Deller
The /proc/meminfo file reports physically broken memory pages in the HardwareCorrupted field. When the parisc kernel boots report physically bad pages which were recorded in the page deallocation table (PDT) as HardwareCorrupted too. Signed-off-by: Helge Deller <deller@gmx.de>
2020-07-28ARM: mstar: Fix dts filename for 70mai midrive d08Daniel Palmer
Fixes the filename for the 70mai midrive d08 dts. Signed-off-by: Daniel Palmer <daniel@0x0f.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-28ARM: mstar: Add dts for 70mai midrive d08Daniel Palmer
Adds initial support for the 70mai midrive d08 dash camera. Signed-off-by: Daniel Palmer <daniel@0x0f.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-28ARM: mstar: Add dts for msc313(e) based BreadBee boardsDaniel Palmer
BreadBee is an opensource development board based on the MStar msc313(e) SoC. Hardware details, schematics and so on can be found at: https://github.com/breadbee/breadbee Signed-off-by: Daniel Palmer <daniel@0x0f.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-28ARM: mstar: Add mercury5 series dtsisDaniel Palmer
This adds a family level dtsi for the mercury5 and then a chip level dtsi for the ssc8336n chip. Signed-off-by: Daniel Palmer <daniel@0x0f.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-28ARM: mstar: Add infinity/infinity3 family dtsisDaniel Palmer
This adds two family level dtsis for the infinity and infinity3 and then adds a chip level dtsi each for a chip in those families. infinity3.dtsi includes infinity.dtsi as these SoCs share most of their memory map and we would have a lot of duplication otherwise. Signed-off-by: Daniel Palmer <daniel@0x0f.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-28ARM: mstar: Add Armv7 base dtsiDaniel Palmer
Adds initial dtsi for the base MStar/Sigmastar Armv7 SoCs. These SoCs have very similar memory maps and this will avoid duplicating nodes across multiple dtsis. Signed-off-by: Daniel Palmer <daniel@0x0f.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-28ARM: mstar: Add machine for MStar/Sigmastar Armv7 SoCsDaniel Palmer
Initial support for the MStar/Sigmastar Armv7 based IP camera and dashcam SoCs. These chips are interesting in that they contain a Cortex-A7, peripherals and system memory in a single tiny QFN package that can be hand soldered allowing almost anyone to embed Linux in their projects. Signed-off-by: Daniel Palmer <daniel@0x0f.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-28arm64: dts: sparx5: Add i2c devices, i2c muxesLars Povlsen
This patch adds i2c devices and muxes to the Sparx5 reference boards. Link: https://lore.kernel.org/r/20200615133242.24911-11-lars.povlsen@microchip.com Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-28arm64: dts: sparx5: Add Sparx5 SoC DPLL clockLars Povlsen
This adds a DPLL clock to the Sparx5 SoC. It is used to generate clock to misc peripherals, specifically the SDHCI/eMMC controller. Link: https://lore.kernel.org/r/20200615133242.24911-10-lars.povlsen@microchip.com Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-28MIPS: qi_lb60: Fix routing to audio amplifierPaul Cercueil
The ROUT (right channel output of audio codec) was connected to INL (left channel of audio amplifier) instead of INR (right channel of audio amplifier). Fixes: 8ddebad15e9b ("MIPS: qi_lb60: Migrate to devicetree") Cc: stable@vger.kernel.org # v5.3 Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-28MIPS: Remove legacy MIPS_MACHINE optionPaul Cercueil
The CONFIG_MIPS_MACHINE option is dead code that hasn't been used in years. The Kconfig option is not selected anywhere, and the <asm/mips_machine.h> is not included anywhere either. To make things worse, for years it co-existed with a separate MIPS machine implementation as <asm/machine.h>. The two defined the 'mips_machine' structure with different fields, and the 'MIPS_MACHINE' macro with different parameters. The two used the same memory area (defined by the linker script) to store data, and you could totally use the two at the same time for all kinds of funny results. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-28MIPS: ath79: Remove unused include <asm/mips_machine.h>Paul Cercueil
Since commit 3a77e0d75eed ("MIPS: ath79: drop machfiles"), this header is not used anymore. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-28MIPS: cpu-feature-overrides: Remove not needed overridesThomas Bogendoerfer
Clean up cpu-feature-overrides, which only repeat the default. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-28KVM: arm64: Don't inherit exec permission across page-table levelsWill Deacon
If a stage-2 page-table contains an executable, read-only mapping at the pte level (e.g. due to dirty logging being enabled), a subsequent write fault to the same page which tries to install a larger block mapping (e.g. due to dirty logging having been disabled) will erroneously inherit the exec permission and consequently skip I-cache invalidation for the rest of the block. Ensure that exec permission is only inherited by write faults when the new mapping is of the same size as the existing one. A subsequent instruction abort will result in I-cache invalidation for the entire block mapping. Signed-off-by: Will Deacon <will@kernel.org> Signed-off-by: Marc Zyngier <maz@kernel.org> Tested-by: Quentin Perret <qperret@google.com> Reviewed-by: Quentin Perret <qperret@google.com> Cc: Marc Zyngier <maz@kernel.org> Cc: <stable@vger.kernel.org> Link: https://lore.kernel.org/r/20200723101714.15873-1-will@kernel.org
2020-07-28KVM: arm64: Prevent vcpu_has_ptrauth from generating OOL functionsMarc Zyngier
So far, vcpu_has_ptrauth() is implemented in terms of system_supports_*_auth() calls, which are declared "inline". In some specific conditions (clang and SCS), the "inline" very much turns into an "out of line", which leads to a fireworks when this predicate is evaluated on a non-VHE system (right at the beginning of __hyp_handle_ptrauth). Instead, make sure vcpu_has_ptrauth gets expanded inline by directly using the cpus_have_final_cap() helpers, which are __always_inline, generate much better code, and are the only thing that make sense when running at EL2 on a nVHE system. Fixes: 29eb5a3c57f7 ("KVM: arm64: Handle PtrAuth traps early") Reported-by: Nathan Chancellor <natechancellor@gmail.com> Reported-by: Nick Desaulniers <ndesaulniers@google.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Tested-by: Nathan Chancellor <natechancellor@gmail.com> Reviewed-by: Nathan Chancellor <natechancellor@gmail.com> Link: https://lore.kernel.org/r/20200722162231.3689767-1-maz@kernel.org
2020-07-28xtensa: add boot subdirectories build artifacts to 'targets'Masahiro Yamada
Xtensa always rebuilds the following even if nothing in the source code has been changed. Passing V=2 shows the reason. AS arch/xtensa/boot/boot-elf/bootstrap.o - due to bootstrap.o not in $(targets) LDS arch/xtensa/boot/boot-elf/boot.lds - due to boot.lds not in $(targets) They are built by if_changed(_dep). Add them to 'targets' so .*.cmd files are included. Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> Message-Id: <20200722004707.779601-1-masahiroy@kernel.org> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2020-07-28xtensa: add uImage and xipImage to targetsMax Filippov
uImage and xipImage are always rebuilt in the xtensa kernel build process. Add them to 'targets' to avoid that. Reviewed-by: Masahiro Yamada <masahiroy@kernel.org> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2020-07-28xtensa: move vmlinux.bin[.gz] to boot subdirectoryMax Filippov
vmlinux.bin and vmlinux.bin.gz are always rebuilt in the kernel build process. Add them to 'targets' and move them to the boot subdirectory where their rules are. Update make rules that refer to them. Reviewed-by: Masahiro Yamada <masahiroy@kernel.org> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2020-07-28xtensa: initialize_mmu.h: fix a duplicated wordRandy Dunlap
Change "The the" to "For the". Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Cc: Chris Zankel <chris@zankel.net> Cc: Max Filippov <jcmvbkbc@gmail.com> Cc: linux-xtensa@linux-xtensa.org Message-Id: <20200721210044.15458-1-rdunlap@infradead.org> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2020-07-28xtensa: add seccomp supportMax Filippov
Add SECCOMP to xtensa Kconfig, select HAVE_ARCH_SECCOMP_FILTER, add TIF_SECCOMP and call secure_computing from do_syscall_trace_enter. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2020-07-28xtensa: expose syscall through user_pt_regsMax Filippov
Use one of the reserved slots in struct user_pt_regs to return syscall number in the GPR regset. Update syscall number from the GPR regset only when it's non-zero. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2020-07-28xtensa: add audit supportMax Filippov
All bits needed for syscall audit are present on xtensa. Add audit_syscall_entry and audit_syscall_exit calls and select HAVE_ARCH_AUDITSYSCALL in Kconfig. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2020-07-28ARM: dts: berlin: Align L2 cache-controller nodename with dtschemaKrzysztof Kozlowski
Fix dtschema validator warnings like: l2-cache-controller@ac0000: $nodename:0: 'l2-cache-controller@ac0000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$' Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com> Link: https://lore.kernel.org/r/20200626080642.4244-1-krzk@kernel.org' Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-28Merge tag 'aspeed-5.9-devicetree' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed into arm/dt ASPEED device tree updates for 5.9 There is one new machine; AMD's EthanolX reference platform with an AST2600 BMC. Misc updates for Rainier, Tacoma, Wedge and Mihawk machines. * tag 'aspeed-5.9-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed: (26 commits) ARM: dts: Aspeed: tacoma: Enable EHCI controller ARM: dts: aspeed: rainier: Enable EHCI controller ARM: dts: aspeed: rainier: Switch OCCs to P10 ARM: dts: aspeed: rainier: Add FSI I2C masters ARM: dts: aspeed: rainier: Add CFAM SPI controllers ARM: dts: aspeed: rainier: Add I2C buses for NVMe use ARM: dts: aspeed: Initial device tree for AMD EthanolX ARM: dts: rainier: Describe GPIO mux on I2C3 ARM: dts: aspeed: wedge40: Enable pwm_tacho device ARM: dts: aspeed: wedge40: Enable ADC device ARM: dts: aspeed: wedge40: Disable unused i2c controllers ARM: dts: aspeed: cmm: Fixup I2C tree ARM: dts: aspeed: tacoma: Add CFAM reset GPIO ARM: dts: aspeed: rainier: Add CFAM reset GPIO ARM: dts: aspeed: tacoma: Fix gpio-key definitions ARM: dts: rainier: Configure ball Y23 as GPIOP7 for MCLR_VPP ARM: dts: aspeed: rainier: Add second cfam on the hub ARM: dts: aspeed: rainier: Add line-name checkstop ARM: dts: aspeed: tacoma: Remove checkstop gpio-key ARM: dts: aspeed: tacoma: Enable XDMA engine ... Link: https://lore.kernel.org/r/CACPK8Xf_Np7LtcDFhywi6Uk1EgUpb0pVVa+Lr9YEwBRjbjOKCQ@mail.gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-27arm64: dts: qcom: Add Microsoft Lumia 950 (Talkman) device treeKonrad Dybcio
Add device tree support for the Microsoft Lumia 950 smartphone. It is based on msm8992 and supports booting Linux via a custom EDK2 port. Currently it supports: * Screen console via EFIFB * Booting via EFI_STUB * SDHCI * I2C * PSCI core bringup Please note that there is an implementation of EL2 startup on this board, but it requires the user to resign from PSCI and use spin-table instead. This revision sticks with PSCI. Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200625182118.131476-14-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: Add Xiaomi Libra (Mi 4C) device treeKonrad Dybcio
This commit adds support for the Xiaomi Libra (Mi 4C) smartphone. It's based on the Qualcomm msm8992 SoC. It currently supports: * Screen console from bootloader * SDHCI * Regulator configuration * Serial console * I2C Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200625182118.131476-13-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: msm8992: Add RPMCC nodeKonrad Dybcio
This lets us use clocks provided by RPM. Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200625182118.131476-12-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: msm8992: Add PSCI support.Konrad Dybcio
This SoC's firmware does not fully support the PSCI spec, but it's good enough to bring the cores up. Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200625182118.131476-11-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: msm8992: Add PMU nodeKonrad Dybcio
Add the PMU so we can get proper perf event support on this SoC. Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200625182118.131476-10-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: msm8992: Add BLSP2_UART2 and I2C nodesKonrad Dybcio
Add support for I2C to enable support for peripherals such as touchscreens or sensors. Also add BLSP_UART2 interface. Please note that the naming scheme follows downstream and as abominable as it is, that's what we get. Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200625182118.131476-9-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: msm8992: Add SPMI PMIC arbiter deviceKonrad Dybcio
Add SPMI PMIC arbiter device to communicate with PMICs attached to SPMI bus. Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200625182118.131476-8-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: msm8992: Add a SCM nodeKonrad Dybcio
Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200625182118.131476-7-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: msm8992: Add a proper CPU mapKonrad Dybcio
This commit adds cpu nodes for all 6 cores present on this SoC and the cpu-map. Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200625182118.131476-6-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: bullhead: Move UART pinctrl to SoCKonrad Dybcio
This pinout is common for every 8992-based device and should therefore reside in the SoC device tree. Also convert addresses into phandles. Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200625182118.131476-5-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: bullhead: Add qcom,msm-idKonrad Dybcio
Add the property required for the bootloader to select the correct device tree blob. It has been removed from the SoC device tree as it should be set on a per-device basis. Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200625182118.131476-4-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: msm8992: Fix SDHCI1Konrad Dybcio
This commit ensures the correct IRQ type is set and disables the device by default. The mmc-hs400-1_8v property is also moved to Bullhead as it might not be present on all boards. The node has been renamed to sdhci@ instead of mmc@ and the phandle was changed to sdhc_1 to comply with the newer DTS style. Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200625182118.131476-3-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: msm8992: Modernize the DTS styleKonrad Dybcio
Following changes have been made: - remove name, compatible and msm-id - wrap clocks in clocks{} - order nodes by name and by address - clock_gcc -> gcc - msmgpio -> tlmm - retire msm8992-pins.dtsi - add some of the missing pins - make comments C-style - make apcs a mailbox Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200625182118.131476-2-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: Add support for Sony Xperia Z5 (SoMC Sumire-RoW)Konrad Dybcio
Add device tree support for the Sony Xperia Z5 smartphone. It's based on Sony Kitakami platform (msm8994) and hence a Kitakami-common DTSI has been created so as to reduce clutter when remaining devices are added. The board currently supports * Serial * SDHCI * I2C * Regulator configuration * pstore log dump * GPIO keys Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200624150107.76234-9-konradybcio@gmail.com [bjorn: Changed vendor identifier in board compatible from somc to sony] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: Move msm8994-smd-rpm contents to lg-bullhead.Konrad Dybcio
This was the only device using that dtsi, so no point keeping it separate AND with a confusing name (bullhead is based on msm8992 and the file contains regulator values for that specific board). Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200624150107.76234-8-konradybcio@gmail.com [bjorn: Squashed with change that remove regulators from msm8992.dtsi] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: msm8994: Add support for SMD RPMKonrad Dybcio
Add support for SMD RPM, including pm8994 and pmi8994 regulators. Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200624150107.76234-7-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: msm8992: Add a label to rpm-requestsKonrad Dybcio
This enables the node to be referenced directly from other DTs. Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200624150107.76234-4-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: msm8994: Add SCM nodeKonrad Dybcio
Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200624150107.76234-3-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: sdm845-db845c: Add hdmi bridge nodesBjorn Andersson
Enable MDSS and DSI and add the LT9611 HDMI bridge. Also add the HDMI audio nodes. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Co-developed-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20200727075532.1932134-1-vkoul@kernel.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: add sm8250 GPU nodesJonathan Marek
This brings up the GPU. Tested on HDK865 by running vulkan CTS. Signed-off-by: Jonathan Marek <jonathan@marek.ca> Link: https://lore.kernel.org/r/20200709135251.643-15-jonathan@marek.ca Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: add sm8150 GPU nodesJonathan Marek
This brings up the GPU. Tested on HDK855 by running vulkan CTS. Signed-off-by: Jonathan Marek <jonathan@marek.ca> Link: https://lore.kernel.org/r/20200709135251.643-14-jonathan@marek.ca Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: sc7180: Add opp-peak-kBps to GPU oppSharat Masetty
Add opp-peak-kBps bindings to the GPU opp table, listing the peak GPU -> DDR bandwidth requirement for each opp level. This will be used to scale the DDR bandwidth along with the GPU frequency dynamically. Signed-off-by: Sharat Masetty <smasetty@codeaurora.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Akhil P Oommen <akhilpo@codeaurora.org> Link: https://lore.kernel.org/r/1594992579-20662-7-git-send-email-akhilpo@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: sc7180: Add interconnects property for GPUSharat Masetty
This patch adds the interconnects property to the GPU node. This enables the GPU->DDR path bandwidth voting. Signed-off-by: Sharat Masetty <smasetty@codeaurora.org> Signed-off-by: Akhil P Oommen <akhilpo@codeaurora.org> Link: https://lore.kernel.org/r/1594992579-20662-6-git-send-email-akhilpo@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: SDM845: Enable GPU DDR bw scalingSharat Masetty
This patch adds the interconnects property for the gpu node and the opp-peak-kBps property to the opps of the gpu opp table. This should help enable DDR bandwidth scaling dynamically and proportionally to the GPU frequency. Signed-off-by: Sharat Masetty <smasetty@codeaurora.org> Signed-off-by: Akhil P Oommen <akhilpo@codeaurora.org> Link: https://lore.kernel.org/r/1594992579-20662-5-git-send-email-akhilpo@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: sc7180: Add support for context losing replicatorSai Prakash Ranjan
Add "qcom,replicator-loses-context" property to the replicator in Always-on domain in SC7180 SoC to enable coresight replicator driver to handle this variation of replicator designs. Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Link: https://lore.kernel.org/r/5072d94849cfaee46748d26ac997212fb2d783c2.1591708204.git.saiprakash.ranjan@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
generated by cgit (git 2.34.1) at 2025-09-14 07:05:46 +0000