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2020-07-24Merge tag 'amlogic-dt64-2' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/dt arm64: dts: amlogic: updates for v5.9 (round 2) - new board: WeTek Core2 - audio playback support on more boards - add GPU DVFS * tag 'amlogic-dt64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: arm64: dts: amlogic: meson-g12: add the Mali OPP table and use DVFS arm64: dts: amlogic: meson-gxm: add the Mali OPP table and use DVFS arm64: dts: amlogic: meson-gx: add the Mali-450 OPP table and use DVFS arm64: dts: meson: add support for the WeTek Core 2 dt-bindings: arm: amlogic: add support for the WeTek Core 2 arm64: dts: meson: add audio playback to khadas-vim3l arm64: dts: meson: add audio playback to odroid-c4 arm64: dts: meson: update spifc node name on Khadas VIM3/VIM3L ARM: dts: meson: Align L2 cache-controller nodename with dtschema arm64: dts: meson-gxl-s805x: reduce initial Mali450 core frequency arm64: dts: meson: add missing gxl rng clock soc: amlogic: meson-gx-socinfo: Fix S905X3 and S905D3 ID's Link: https://lore.kernel.org/r/7h8sf8671u.fsf@baylibre.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-24arm64: enable time namespace supportAndrei Vagin
CONFIG_TIME_NS is dependes on GENERIC_VDSO_TIME_NS. Signed-off-by: Andrei Vagin <avagin@gmail.com> Reviewed-by: Vincenzo Frascino <vincenzo.frascino@arm.com> Reviewed-by: Dmitry Safonov <dima@arista.com> Link: https://lore.kernel.org/r/20200624083321.144975-7-avagin@gmail.com Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2020-07-24arm64/vdso: Restrict splitting VVAR VMAAndrei Vagin
Forbid splitting VVAR VMA resulting in a stricter ABI and reducing the amount of corner-cases to consider while working further on VDSO time namespace support. As the offset from timens to VVAR page is computed compile-time, the pages in VVAR should stay together and not being partically mremap()'ed. Signed-off-by: Andrei Vagin <avagin@gmail.com> Reviewed-by: Vincenzo Frascino <vincenzo.frascino@arm.com> Reviewed-by: Dmitry Safonov <dima@arista.com> Link: https://lore.kernel.org/r/20200624083321.144975-6-avagin@gmail.com Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2020-07-24arm64/vdso: Handle faults on timens pageAndrei Vagin
If a task belongs to a time namespace then the VVAR page which contains the system wide VDSO data is replaced with a namespace specific page which has the same layout as the VVAR page. Signed-off-by: Andrei Vagin <avagin@gmail.com> Reviewed-by: Vincenzo Frascino <vincenzo.frascino@arm.com> Reviewed-by: Dmitry Safonov <dima@arista.com> Link: https://lore.kernel.org/r/20200624083321.144975-5-avagin@gmail.com Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2020-07-24xen: Remove redundant initialization of irqColin Ian King
The variable irq is being initialized with a value that is never read and it is being updated later with a new value. The initialization is redundant and can be removed. Addresses-Coverity: ("Unused value") Link: https://lore.kernel.org/r/20200611123134.922395-1-colin.king@canonical.com Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2020-07-24x86/build: Move max-page-size option to LDFLAGS_vmlinuxArvind Sankar
This option is only required for vmlinux on 64-bit, to enforce 2MiB alignment, so set it in LDFLAGS_vmlinux instead of KBUILD_LDFLAGS. Also drop the ld-option check: this option was added in binutils-2.18 and all the other places that use it already don't have the check. This reduces the size of the intermediate ELF files arch/x86/boot/setup.elf and arch/x86/realmode/rm/realmode.elf by about 2MiB each. The binary versions are unchanged. Move the LDFLAGS settings to all be together and just after CFLAGS settings are done. Signed-off-by: Arvind Sankar <nivedita@alum.mit.edu> Signed-off-by: Ingo Molnar <mingo@kernel.org> Tested-by: Sedat Dilek <sedat.dilek@gmail.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Michal Marek <michal.lkml@markovi.net> Link: https://lore.kernel.org/r/20200722184334.3785418-1-nivedita@alum.mit.edu
2020-07-24Merge tag 'mvebu-fixes-5.8-1' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu into arm/fixes mvebu fixes for 5.8 (part 1) - DT change for Armada 38x allowing to add the register needed to fix NETA lockup when repeatedly switching speed. * tag 'mvebu-fixes-5.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu: ARM: dts: armada-38x: fix NETA lockup when repeatedly switching speeds
2020-07-24Merge tag 'ti-k3-config-for-v5.9' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/kristo/linux into arm/defconfig Texas Instruments K3 SoC config updates for v5.9 - Enable chipid driver for j721e/am65x - Enable SDHCI driver for am65x * tag 'ti-k3-config-for-v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/kristo/linux: arm64: defconfig: Enable AM654x SDHCI controller arm64: arch_k3: enable chipid driver Link: https://lore.kernel.org/r/c3e68831-c9ec-db06-d855-808ba3da3364@ti.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-24Merge tag 'mvebu-arm-5.9-1' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu into arm/soc mvebu arm for 5.9 (part 1) Use of for_each_requested_gpio() for gpio driver still in plat-orion for non DT platform. * tag 'mvebu-arm-5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu: ARM: orion/gpio: Make use of for_each_requested_gpio() Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-24Merge tag 'davinci-for-v5.9/soc' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into arm/soc DaVinci SoC updates for v5.9 This pull requests contains some clean-ups for SoC support. No functional changes included. * tag 'davinci-for-v5.9/soc' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci: ARM: davinci: dm646x-evm: Simplify error handling in 'evm_sw_setup()' ARM: davinci: Fix trivial spelling ARM: davinci: Replace HTTP links with HTTPS ones Link: https://lore.kernel.org/r/348578af-71ea-812e-ec42-31afe7847b85@ti.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-24Merge tag 'mvebu-dt64-5.9-1' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu into arm/dt mvebu dt64 for 5.9 (part 1) Add SMMU support for the Marvell AP806 based SoCs (Armada 70xx and Armada 80xx) * tag 'mvebu-dt64-5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu: arm64: dts: marvell: add SMMU support
2020-07-24Merge tag 'mvebu-dt-5.9-1' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu into arm/dt mvebu dt for 5.9 (part 1) - Fix the reg-init PHY for the dlink-dns327l (Armada 370) - Replace HTTP links with HTTPS one in device tree of the Excito Bubba B3 (Kirkwood) * tag 'mvebu-dt-5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu: ARM: dts: dlink-dns327l: fix reg-init PHY ARM: dts: kirkwood: Replace HTTP links with HTTPS ones Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-24Merge tag 'ti-k3-dt-for-v5.9' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/kristo/linux into arm/dt Texas Instruments K3 SoC DT updates for v5.9 - Add platforms chipid nodes for am65x and j721e - Update latest data sheet values for MMC on am65x - Add serdes and usb3 support for j721e - Add analog audio support for j721e - Add SD card support for am65x - Rename DT nodes for gic-its/smmu to their standard counterparts am65x/j721e - HTTP links replaced with HTTPS ones * tag 'ti-k3-dt-for-v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/kristo/linux: arm64: dts: k3-j721e-proc-board: Add wait time for sampling Type-C DIR line arm64: dts: ti: k3-j721e: Enable Super-Speed support for USB0 arm64: dts: ti: k3-j721e-main.dtsi: Add USB to SERDES MUX arm64: dts: ti: k3-j721e-main: Add system controller node and SERDES lane mux arm64: dts: ti: k3-j721e-main: Add WIZ and SERDES PHY nodes dt-bindings: mfd: ti,j721e-system-controller.yaml: Add J721e system controller arm64: dts: ti: k3-am65/j721e-main: rename gic-its node to msi-controller arm64: dts: ti: k3-j721e-main: rename smmu node to iommu arm64: dts: ti: k3-*: Replace HTTP links with HTTPS ones arm64: dts: ti: k3-am654-base-board: Add support for SD card arm64: dts: ti: k3-am65-main: Add support for sdhci1 arm64: dts: ti: j721e-common-proc-board: Analog audio support arm64: dts: ti: k3-j721e-common-proc-board: Remove duplicated main_i2c1_exp4_pins_default arm64: dts: ti: k3-am654-main: Update otap-del-sel values arm64: dts: ti: k3-j721e-mcu-wakeup: add k3 platforms chipid module node arm64: dts: ti: k3-am65-wakeup: add k3 platforms chipid module node Link: https://lore.kernel.org/r/3b3b9214-769d-ba1b-db5e-44414a8c5756@ti.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-24arm64: dts: amazon: add Amazon's Annapurna Labs Alpine v3 supportRonen Krupnik
This patch adds the initial support for the Amazon's Annapurna Labs Alpine v3 Soc and Evaluation Platform (EVP). Link: https://lore.kernel.org/r/20200724132654.16549-7-hhhawa@amazon.com Signed-off-by: Ronen Krupnik <ronenk@amazon.com> Signed-off-by: Talel Shenhar <talel@amazon.com> Signed-off-by: Hanna Hawa <hhhawa@amazon.com> Acked-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-24arm64: dts: amazon: rename al folder to be amazonHanna Hawa
As preparation to add device tree binding for Amazon's Annapurna Labs Alpine v3 support. Rename al device tree folder to be amazon. Link: https://lore.kernel.org/r/20200724132654.16549-3-hhhawa@amazon.com Signed-off-by: Hanna Hawa <hhhawa@amazon.com> Acked-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-24powerpc/sstep: Fix incorrect CONFIG symbol in scv handlingMichael Ellerman
When I "fixed" the ppc64e build in Nick's recent patch, I typoed the CONFIG symbol, resulting in one that doesn't exist. Fix it to use the correct symbol. Reported-by: Christophe Leroy <christophe.leroy@csgroup.eu> Fixes: 7fa95f9adaee ("powerpc/64s: system call support for scv/rfscv instructions") Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20200724131609.1640533-1-mpe@ellerman.id.au
2020-07-24x86/kvm: Use generic xfer to guest work functionThomas Gleixner
Use the generic infrastructure to check for and handle pending work before transitioning into guest mode. This now handles TIF_NOTIFY_RESUME as well which was ignored so far. Handling it is important as this covers task work and task work will be used to offload the heavy lifting of POSIX CPU timers to thread context. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lkml.kernel.org/r/20200722220520.979724969@linutronix.de
2020-07-24x86/entry: Cleanup idtentry_enter/exitThomas Gleixner
Remove the temporary defines and fixup all references. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Kees Cook <keescook@chromium.org> Link: https://lkml.kernel.org/r/20200722220520.855839271@linutronix.de
2020-07-24x86/entry: Use generic interrupt entry/exit codeThomas Gleixner
Replace the x86 code with the generic variant. Use temporary defines for idtentry_* which will be cleaned up in the next step. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lkml.kernel.org/r/20200722220520.711492752@linutronix.de
2020-07-24x86/entry: Cleanup idtentry_entry/exit_userThomas Gleixner
Cleanup the temporary defines and use irqentry_ instead of idtentry_. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Kees Cook <keescook@chromium.org> Link: https://lkml.kernel.org/r/20200722220520.602603691@linutronix.de
2020-07-24x86/entry: Use generic syscall exit functionalityThomas Gleixner
Replace the x86 variant with the generic version. Provide the relevant architecture specific helper functions and defines. Use a temporary define for idtentry_exit_user which will be cleaned up seperately. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Kees Cook <keescook@chromium.org> Link: https://lkml.kernel.org/r/20200722220520.494648601@linutronix.de
2020-07-24x86/entry: Use generic syscall entry functionThomas Gleixner
Replace the syscall entry work handling with the generic version. Provide the necessary helper inlines to handle the real architecture specific parts, e.g. ptrace. Use a temporary define for idtentry_enter_user which will be cleaned up seperately. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Kees Cook <keescook@chromium.org> Link: https://lkml.kernel.org/r/20200722220520.376213694@linutronix.de
2020-07-24x86/ptrace: Provide pt_regs helper for entry/exitThomas Gleixner
As a preparatory step for moving the syscall and interrupt entry/exit handling into generic code, provide a pt_regs helper which retrieves the interrupt state from pt_regs. This is required to check whether interrupts are reenabled by return from interrupt/exception. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Kees Cook <keescook@chromium.org> Link: https://lkml.kernel.org/r/20200722220520.258511584@linutronix.de
2020-07-24x86/entry: Move user return notifier out of loopThomas Gleixner
Guests and user space share certain MSRs. KVM sets these MSRs to guest values once and does not set them back to user space values on every VM exit to spare the costly MSR operations. User return notifiers ensure that these MSRs are set back to the correct values before returning to user space in exit_to_usermode_loop(). There is no reason to evaluate the TIF flag indicating that user return notifiers need to be invoked in the loop. The important point is that they are invoked before returning to user space. Move the invocation out of the loop into the section which does the last preperatory steps before returning to user space. That section is not preemptible and runs with interrupts disabled until the actual return. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lkml.kernel.org/r/20200722220520.159112003@linutronix.de
2020-07-24x86/entry: Consolidate 32/64 bit syscall entryThomas Gleixner
64bit and 32bit entry code have the same open coded syscall entry handling after the bitwidth specific bits. Move it to a helper function and share the code. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lkml.kernel.org/r/20200722220520.051234096@linutronix.de
2020-07-24x86/entry: Consolidate check_user_regs()Thomas Gleixner
The user register sanity check is sprinkled all over the place. Move it into enter_from_user_mode(). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Kees Cook <keescook@chromium.org> Link: https://lkml.kernel.org/r/20200722220519.943016204@linutronix.de
2020-07-24Merge branch 'core/entry' into x86/entryThomas Gleixner
Pick up generic entry code to migrate x86 over.
2020-07-24entry: Provide generic syscall entry functionalityThomas Gleixner
On syscall entry certain work needs to be done: - Establish state (lockdep, context tracking, tracing) - Conditional work (ptrace, seccomp, audit...) This code is needlessly duplicated and different in all architectures. Provide a generic version based on the x86 implementation which has all the RCU and instrumentation bits right. As interrupt/exception entry from user space needs parts of the same functionality, provide a function for this as well. syscall_enter_from_user_mode() and irqentry_enter_from_user_mode() must be called right after the low level ASM entry. The calling code must be non-instrumentable. After the functions returns state is correct and the subsequent functions can be instrumented. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Kees Cook <keescook@chromium.org> Link: https://lkml.kernel.org/r/20200722220519.513463269@linutronix.de
2020-07-24x86/defconfigs: Remove CONFIG_CRYPTO_AES_586 from i386_defconfigSedat Dilek
Initially CONFIG_CRYPTO_AES_586=y was added to the i386_defconfig file in: c1b362e3b4d3: ("x86: update defconfigs") The code and Kconfig for CONFIG_CRYPTO_AES_586 was removed in: 1d2c3279311e: ("crypto: x86/aes - drop scalar assembler implementations") Remove the leftover from the i386_defconfig file as well. Signed-off-by: Sedat Dilek <sedat.dilek@gmail.com> Signed-off-by: Ingo Molnar <mingo@kernel.org> Acked-by: Randy Dunlap <rdunlap@infradead.org> Link: https://lore.kernel.org/r/20200723171119.9881-1-sedat.dilek@gmail.com
2020-07-24arm64/vdso: Add time namespace pageAndrei Vagin
Allocate the time namespace page among VVAR pages. Provide __arch_get_timens_vdso_data() helper for VDSO code to get the code-relative position of VVARs on that special page. If a task belongs to a time namespace then the VVAR page which contains the system wide VDSO data is replaced with a namespace specific page which has the same layout as the VVAR page. That page has vdso_data->seq set to 1 to enforce the slow path and vdso_data->clock_mode set to VCLOCK_TIMENS to enforce the time namespace handling path. The extra check in the case that vdso_data->seq is odd, e.g. a concurrent update of the VDSO data is in progress, is not really affecting regular tasks which are not part of a time namespace as the task is spin waiting for the update to finish and vdso_data->seq to become even again. If a time namespace task hits that code path, it invokes the corresponding time getter function which retrieves the real VVAR page, reads host time and then adds the offset for the requested clock which is stored in the special VVAR page. The time-namespace page isn't allocated on !CONFIG_TIME_NAMESPACE, but vma is the same size, which simplifies criu/vdso migration between different kernel configs. Signed-off-by: Andrei Vagin <avagin@gmail.com> Reviewed-by: Vincenzo Frascino <vincenzo.frascino@arm.com> Reviewed-by: Dmitry Safonov <dima@arista.com> Cc: Mark Rutland <mark.rutland@arm.com> Link: https://lore.kernel.org/r/20200624083321.144975-4-avagin@gmail.com Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2020-07-24arm64/vdso: Zap vvar pages when switching to a time namespaceAndrei Vagin
The order of vvar pages depends on whether a task belongs to the root time namespace or not. In the root time namespace, a task doesn't have a per-namespace page. In a non-root namespace, the VVAR page which contains the system-wide VDSO data is replaced with a namespace specific page that contains clock offsets. Whenever a task changes its namespace, the VVAR page tables are cleared and then they will be re-faulted with a corresponding layout. A task can switch its time namespace only if its ->mm isn't shared with another task. Signed-off-by: Andrei Vagin <avagin@gmail.com> Reviewed-by: Vincenzo Frascino <vincenzo.frascino@arm.com> Reviewed-by: Dmitry Safonov <dima@arista.com> Reviewed-by: Christian Brauner <christian.brauner@ubuntu.com> Link: https://lore.kernel.org/r/20200624083321.144975-3-avagin@gmail.com Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2020-07-24arm64/vdso: use the fault callback to map vvar pagesAndrei Vagin
Currently the vdso has no awareness of time namespaces, which may apply distinct offsets to processes in different namespaces. To handle this within the vdso, we'll need to expose a per-namespace data page. As a preparatory step, this patch separates the vdso data page from the code pages, and has it faulted in via its own fault callback. Subsquent patches will extend this to support distinct pages per time namespace. The vvar vma has to be installed with the VM_PFNMAP flag to handle faults via its vma fault callback. Signed-off-by: Andrei Vagin <avagin@gmail.com> Reviewed-by: Vincenzo Frascino <vincenzo.frascino@arm.com> Reviewed-by: Dmitry Safonov <dima@arista.com> Link: https://lore.kernel.org/r/20200624083321.144975-2-avagin@gmail.com Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2020-07-24compiler.h: Move instrumentation_begin()/end() to new ↵Ingo Molnar
<linux/instrumentation.h> header Linus pointed out that compiler.h - which is a key header that gets included in every single one of the 28,000+ kernel files during a kernel build - was bloated in: 655389666643: ("vmlinux.lds.h: Create section for protection against instrumentation") Linus noted: > I have pulled this, but do we really want to add this to a header file > that is _so_ core that it gets included for basically every single > file built? > > I don't even see those instrumentation_begin/end() things used > anywhere right now. > > It seems excessive. That 53 lines is maybe not a lot, but it pushed > that header file to over 12kB, and while it's mostly comments, it's > extra IO and parsing basically for _every_ single file compiled in the > kernel. > > For what appears to be absolutely zero upside right now, and I really > don't see why this should be in such a core header file! Move these primitives into a new header: <linux/instrumentation.h>, and include that header in the headers that make use of it. Unfortunately one of these headers is asm-generic/bug.h, which does get included in a lot of places, similarly to compiler.h. So the de-bloating effect isn't as good as we'd like it to be - but at least the interfaces are defined separately. No change to functionality intended. Reported-by: Linus Torvalds <torvalds@linux-foundation.org> Signed-off-by: Ingo Molnar <mingo@kernel.org> Link: https://lore.kernel.org/r/20200604071921.GA1361070@gmail.com Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Borislav Petkov <bp@alien8.de> Cc: Peter Zijlstra <peterz@infradead.org>
2020-07-24arm64: Reserve HWCAP2_MTE as (1 << 18)Catalin Marinas
While MTE is not supported in the upstream kernel yet, add a comment that HWCAP2_MTE as (1 << 18) is reserved. Glibc makes use of it for the resolving (ifunc) of the MTE-safe string routines. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2020-07-24mips: traps, add __init to parity_protection_initJiri Slaby
It references __initdata and is called only from an __init function: trap_init. This avoids section mismatches (which I am seeing with gcc 10). Signed-off-by: Jiri Slaby <jslaby@suse.cz> Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Cc: linux-mips@vger.kernel.org Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-24MIPS: BCM63xx: improve CFE version detectionÁlvaro Fernández Rojas
There are some CFE variants that start with 'cfe-vd' instead of 'cfe-v', such as the one used in the Huawei HG556a: "cfe-vd081.5003". In this case, the CFE version is stored as is (string vs number bytes). Some newer devices have an additional version number, such as the Comtrend VR-3032u: "1.0.38-112.118-11". Finally, print the string as is if the version doesn't start with "cfe-v" or "cfe-vd", but starts with "cfe-". Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-24MIPS: X2000: Add X2000 system type.周琰杰 (Zhou Yanjie)
1.Add "PRID_COMP_INGENIC_13" and "PRID_IMP_XBURST2" for X2000. 2.Add X2000 system type for cat /proc/cpuinfo to give out X2000. Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-24MIPS: OCTEON: add missing put_device() call in dwc3_octeon_device_init()Yu Kuai
if of_find_device_by_node() succeed, dwc3_octeon_device_init() doesn't have a corresponding put_device(). Thus add put_device() to fix the exception handling for this function implementation. Fixes: 93e502b3c2d4 ("MIPS: OCTEON: Platform support for OCTEON III USB controller") Signed-off-by: Yu Kuai <yukuai3@huawei.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-24MIPS: Retire kvm paravirtJiaxun Yang
paravirt machine was introduced for Cavium's partial virtualization technology, however, it's host side support and QEMU support never landed in upstream. As Cavium was acquired by Marvel and they have no intention to maintain their MIPS product line, also paravirt is unlikely to be utilized by community users, it's time to retire it if nobody steps in to maintain it. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-24ARM: dts: armada-38x: fix NETA lockup when repeatedly switching speedsRussell King
To support the change in "phy: armada-38x: fix NETA lockup when repeatedly switching speeds" we need to update the DT with the additional register. Fixes: 14dc100b4411 ("phy: armada38x: add common phy support") Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2020-07-24x86: Correct noinstr qualifiersIra Weiny
The noinstr qualifier is to be specified before the return type in the same way inline is used. These 2 cases were missed by previous patches. Signed-off-by: Ira Weiny <ira.weiny@intel.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Tony Luck <tony.luck@intel.com> Link: https://lkml.kernel.org/r/20200723161405.852613-1-ira.weiny@intel.com
2020-07-24x86/mm: Drop unused MAX_PHYSADDR_BITSArvind Sankar
The macro is not used anywhere, and has an incorrect value (going by the comment) on x86_64 since commit c898faf91b3e ("x86: 46 bit physical address support on 64 bits") To avoid confusion, just remove the definition. Signed-off-by: Arvind Sankar <nivedita@alum.mit.edu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lkml.kernel.org/r/20200723231544.17274-2-nivedita@alum.mit.edu
2020-07-24ARM: dts: aspeed: wedge40: Enable pwm_tacho deviceTao Ren
Enable pwm_tacho device for fan control and monitoring in Wedge40. Signed-off-by: Tao Ren <rentao.bupt@gmail.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-07-24ARM: dts: aspeed: wedge40: Enable ADC deviceTao Ren
Enable ADC controller and corresponding voltage sensoring channels for Wedge40. Signed-off-by: Tao Ren <rentao.bupt@gmail.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-07-24ARM: dts: aspeed: wedge40: Disable unused i2c controllersTao Ren
Disable i2c bus #9, #10 and #13 as these i2c controllers are not used on Wedge40. Signed-off-by: Tao Ren <rentao.bupt@gmail.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-07-24ARM: dts: aspeed: cmm: Fixup I2C treeTao Ren
Create all the i2c switches in device tree and use aliases to assign child channels with consistent bus numbers. Besides, "i2c-mux-idle-disconnect" is set for all the i2c switches to avoid potential conflicts when multiple devices (beind the switches) use the same device address. Signed-off-by: Tao Ren <rentao.bupt@gmail.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-07-24ARM: dts: aspeed: tacoma: Add CFAM reset GPIOJoel Stanley
The GPIO on Q0 is used for resetting the CFAM of the processor that the ASPEED master is connected to. Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-07-24ARM: dts: aspeed: rainier: Add CFAM reset GPIOJoel Stanley
The GPIO on Q0 is used for resetting the CFAM of the processor that the ASPEED master is connected to. The signal is wired as active high on the first pass systems. Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-07-24powerpc/test_emulate_sstep: Fix build errorMichael Ellerman
ppc64_book3e_allmodconfig fails with: arch/powerpc/lib/test_emulate_step.c: In function 'test_pld': arch/powerpc/lib/test_emulate_step.c:113:7: error: implicit declaration of function 'cpu_has_feature' 113 | if (!cpu_has_feature(CPU_FTR_ARCH_31)) { | ^~~~~~~~~~~~~~~ Add an include of cpu_has_feature.h to fix it. Fixes: b6b54b42722a ("powerpc/sstep: Add tests for prefixed integer load/stores") Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20200724004109.1461709-1-mpe@ellerman.id.au
2020-07-24Merge v5.8-rc6 into drm-nextDave Airlie
I've got a silent conflict + two trees based on fixes to merge. Fixes a silent merge with amdgpu Signed-off-by: Dave Airlie <airlied@redhat.com>
generated by cgit (git 2.34.1) at 2025-09-15 09:54:49 +0000