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2021-10-21ARM: dts: aspeed: p10bmc: Fix ADC iio-hwmon battery node nameEddie James
In keeping with previous systems, call the iio-hwmon bridge node "iio-hwmon-battery" to distinguish it as the battery voltage sensor. Signed-off-by: Eddie James <eajames@linux.ibm.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20211020215321.33960-2-eajames@linux.ibm.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-10-20x86/ftrace: Make function graph use ftrace directlySteven Rostedt (VMware)
We don't need special hook for graph tracer entry point, but instead we can use graph_ops::func function to install the return_hooker. This moves the graph tracing setup _before_ the direct trampoline prepares the stack, so the return_hooker will be called when the direct trampoline is finished. This simplifies the code, because we don't need to take into account the direct trampoline setup when preparing the graph tracer hooker and we can allow function graph tracer on entries registered with direct trampoline. Link: https://lkml.kernel.org/r/20211008091336.33616-4-jolsa@kernel.org [fixed compile error reported by kernel test robot <lkp@intel.com>] Signed-off-by: Steven Rostedt (VMware) <rostedt@goodmis.org> Signed-off-by: Jiri Olsa <jolsa@kernel.org> Signed-off-by: Steven Rostedt (VMware) <rostedt@goodmis.org>
2021-10-20ftrace/x86_64: Have function graph tracer depend on DYNAMIC_FTRACESteven Rostedt (VMware)
The function graph tracer is going to now depend on ARCH_SUPPORTS_FTRACE_OPS, as that also means that it can support ftrace args. Since ARCH_SUPPORTS_FTRACE_OPS depends on DYNAMIC_FTRACE, this means that the function graph tracer for x86_64 will need to depend on DYNAMIC_FTRACE. Link: https://lkml.kernel.org/r/20211020233555.16b0dbf2@rorschach.local.home Signed-off-by: Steven Rostedt (VMware) <rostedt@goodmis.org>
2021-10-20KVM: PPC: Replace zero-length array with flexible array memberLen Baker
There is a regular need in the kernel to provide a way to declare having a dynamically sized set of trailing elements in a structure. Kernel code should always use "flexible array members" [1] for these cases. The older style of one-element or zero-length arrays should no longer be used[2]. Also, make use of the struct_size() helper in kzalloc(). [1] https://en.wikipedia.org/wiki/Flexible_array_member [2] https://www.kernel.org/doc/html/latest/process/deprecated.html#zero-length-and-one-element-arrays Signed-off-by: Len Baker <len.baker@gmx.com> Reviewed-by: Gustavo A. R. Silva <gustavoars@kernel.org> Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org>
2021-10-20arm64: dts: qcom: sdm845-oneplus: enable second wifi channelCaleb Connolly
Like the c630, the OnePlus 6 is also capable of using both antenna channels for 2.4 and 5ghz wifi, however unlike the c630 only the first channel is used for bluetooth. Signed-off-by: Caleb Connolly <caleb@connolly.tech> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211020163557.291803-1-caleb@connolly.tech
2021-10-20x86/fpu: Remove fpu::stateThomas Gleixner
All users converted. Remove it along with the sanity checks. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Borislav Petkov <bp@suse.de> Link: https://lkml.kernel.org/r/20211013145322.765063318@linutronix.de
2021-10-20x86/math-emu: Convert to fpstateThomas Gleixner
Convert math emulation code to the new register storage mechanism in preparation for dynamically sized buffers. No functional change. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Borislav Petkov <bp@suse.de> Link: https://lkml.kernel.org/r/20211013145322.711347464@linutronix.de
2021-10-20x86/fpu/core: Convert to fpstateThomas Gleixner
Convert the rest of the core code to the new register storage mechanism in preparation for dynamically sized buffers. No functional change. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Borislav Petkov <bp@suse.de> Link: https://lkml.kernel.org/r/20211013145322.659456185@linutronix.de
2021-10-20Merge tag 'imx-defconfig-5.16' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/defconfigs i.MX defconfig update for 5.16: - A series from Marcel Ziswiler to update imx_v6_v7_defconfig for the new Colibri iMX6ULL eMMC variant support. - Enable HID I2C in the imx_v6_v7_defconfig as it is used for a HID compliant wacom device on the reMarkable2 tablet. * tag 'imx-defconfig-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: ARM: imx_v6_v7_defconfig: Enable HID I2C ARM: imx_v6_v7_defconfig: enable bpf syscall and cgroup bpf ARM: imx_v6_v7_defconfig: build imx sdma driver as module ARM: imx_v6_v7_defconfig: rebuild default configuration ARM: imx_v6_v7_defconfig: change snd soc tlv320aic3x to i2c variant ARM: imx_v6_v7_defconfig: enable mtd physmap Link: https://lore.kernel.org/r/20211016140138.1603-5-shawnguo@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-20Merge tag 'visconti-arm-defconfig-for-v5.16' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/iwamatsu/linux-visconti into arm/defconfigs Visconti defconfig updates for v5.16 - Enable Visconti's PCIe host controller in the ARM64 defconfig * tag 'visconti-arm-defconfig-for-v5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/iwamatsu/linux-visconti: arm64: defconfig: Visconti: Enable PCIe host controller Link: https://lore.kernel.org/r/YWoIf4xPoQtLhC3x@toshiba.co.jp Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-20Merge tag 'mvebu-defconfig-5.16-1' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu into arm/defconfigs mvebu defconfig for 5.16 (part 1) Update defconfig and enable mtd physmap * tag 'mvebu-defconfig-5.16-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu: ARM: mvebu_v7_defconfig: rebuild default configuration ARM: mvebu_v7_defconfig: enable mtd physmap Link: https://lore.kernel.org/r/871r4mmecw.fsf@BL-laptop Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-20Merge tag 'sunxi-core-for-5.16-1' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/soc Platform core changes for the Allwinner SoCs, this time adding SPDX headers to our files. * tag 'sunxi-core-for-5.16-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: ARM: sunxi: Add a missing SPDX license header ARM: sunxi: Add a missing SPDX license header Link: https://lore.kernel.org/r/0ceaad3e-dc26-4be6-b98f-d25e51a41b81.lettre@localhost Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-20Merge tag 'stm32-soc-for-v5.16-1' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/soc STM32 SoC for v5.16, round 1 Highlights: ---------- Add support of new STM32MP13 SoC which enhances current STM32 MPU family. It is mainly a derivative of STM32MP15 SoCs (one Cortex-A7 plus standard peripherals). The STM32MP13 SoC diversity is composed by: -STM32MP131: -core: 1*CA7, 17*TIMERS, 5*LPTIMERS, DMA/MDMA/DMAMUX -storage: 3*SDMCC, 1*QSPI, FMC -com: USB (OHCI/EHCI, OTG), 5*I2C, 5*SPI/I2S, 8*U(S)ART -audio: 2*SAI -network: 1*ETH(GMAC) -STM32MP133: STM32MP131 + 2*CAN, ETH2(GMAC), ADC1 -STM32MP135: STM32MP133 + DCMIPP, LTDC * tag 'stm32-soc-for-v5.16-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: ARM: stm32: add initial support for STM32MP13 family docs: arm: stm32: introduce STM32MP13 SoCs Link: https://lore.kernel.org/r/0b6c9657-dcca-3bad-601f-610dfc81d9ae@foss.st.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-20Merge tag 'omap-for-v5.16/gpmc-signed' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt Changes for omap gpmc bindings and devicetree files for v5.16 A series of changes to update the gpmc related bindings to yaml format, and a few non-urgent dts fixes. * tag 'omap-for-v5.16/gpmc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: dts: omap: fix gpmc,mux-add-data type ARM: dts: omap: Fix boolean properties gpmc,cycle2cycle-{same|diff}csen dt-bindings: memory-controllers: ti,gpmc: Convert to yaml dt-bindings: mtd: ti,gpmc-onenand: Convert to yaml dt-bindings: mtd: ti,gpmc-nand: Convert to yaml dt-bindings: memory-controllers: Introduce ti,gpmc-child dt-bindings: net: Remove gpmc-eth.txt dt-bindings: mtd: Remove gpmc-nor.txt Link: https://lore.kernel.org/r/pull-1634280279-284035@atomide.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-20Merge branch 'mstar-dt-next' of https://github.com/linux-chenxing/linux into ↵Arnd Bergmann
arm/dt * 'mstar-dt-next' of https://github.com/linux-chenxing/linux: ARM: dts: mstar: Mark timer with arm,cpu-registers-not-fw-configured ARM: dts: mstar: Add rtc device node Link: https://lore.kernel.org/r/20211020163010.3079-1-romain.perier@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-20x86/fpu/signal: Convert to fpstateThomas Gleixner
Convert signal related code to the new register storage mechanism in preparation for dynamically sized buffers. No functional change. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Borislav Petkov <bp@suse.de> Link: https://lkml.kernel.org/r/20211013145322.607370221@linutronix.de
2021-10-20x86/fpu/regset: Convert to fpstateThomas Gleixner
Convert regset related code to the new register storage mechanism in preparation for dynamically sized buffers. No functional change. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Borislav Petkov <bp@suse.de> Link: https://lkml.kernel.org/r/20211013145322.555239736@linutronix.de
2021-10-20x86/fpu: Convert tracing to fpstateThomas Gleixner
Convert FPU tracing code to the new register storage mechanism in preparation for dynamically sized buffers. No functional change. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Borislav Petkov <bp@suse.de> Link: https://lkml.kernel.org/r/20211013145322.503327333@linutronix.de
2021-10-20x86/KVM: Convert to fpstateThomas Gleixner
Convert KVM code to the new register storage mechanism in preparation for dynamically sized buffers. No functional change. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Borislav Petkov <bp@suse.de> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Cc: kvm@vger.kernel.org Link: https://lkml.kernel.org/r/20211013145322.451439983@linutronix.de
2021-10-20x86/fpu: Replace KVMs xstate component clearingThomas Gleixner
In order to prepare for the support of dynamically enabled FPU features, move the clearing of xstate components to the FPU core code. No functional change. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Borislav Petkov <bp@suse.de> Cc: kvm@vger.kernel.org Link: https://lkml.kernel.org/r/20211013145322.399567049@linutronix.de
2021-10-20x86/fpu: Convert restore_fpregs_from_fpstate() to struct fpstateThomas Gleixner
Convert restore_fpregs_from_fpstate() and related code to the new register storage mechanism in preparation for dynamically sized buffers. No functional change. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Borislav Petkov <bp@suse.de> Link: https://lkml.kernel.org/r/20211013145322.347395546@linutronix.de
2021-10-20x86/fpu: Convert fpstate_init() to struct fpstateThomas Gleixner
Convert fpstate_init() and related code to the new register storage mechanism in preparation for dynamically sized buffers. No functional change. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Borislav Petkov <bp@suse.de> Link: https://lkml.kernel.org/r/20211013145322.292157401@linutronix.de
2021-10-20x86/fpu: Provide struct fpstateThomas Gleixner
New xfeatures will not longer be automatically stored in the regular XSAVE buffer in thread_struct::fpu. The kernel will provide the default sized buffer for storing the regular features up to AVX512 in thread_struct::fpu and if a task requests to use one of the new features then the register storage has to be extended. The state will be accessed via a pointer in thread_struct::fpu which defaults to the builtin storage and can be switched when extended storage is required. To avoid conditionals all over the code, create a new container for the register storage which will gain other information, e.g. size, feature masks etc., later. For now it just contains the register storage, which gives it exactly the same layout as the exiting fpu::state. Stick fpu::state and the new fpu::__fpstate into an anonymous union and initialize the pointer. Add build time checks to validate that both are at the same place and have the same size. This allows step by step conversion of all users. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Borislav Petkov <bp@suse.de> Link: https://lkml.kernel.org/r/20211013145322.234458659@linutronix.de
2021-10-20x86/fpu: Replace KVMs home brewed FPU copy to userThomas Gleixner
Similar to the copy from user function the FPU core has this already implemented with all bells and whistles. Get rid of the duplicated code and use the core functionality. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Borislav Petkov <bp@suse.de> Cc: kvm@vger.kernel.org Link: https://lkml.kernel.org/r/20211015011539.244101845@linutronix.de
2021-10-20ARM: bcm: Removed forced select of interrupt controllersFlorian Fainelli
Now that the various second level interrupt controllers have been moved to IRQCHIP_PLATFORM_DRIVER and they do default to ARCH_BRCMSTB and ARCH_BCM2835 where relevant, remove their forced selection from the machine entry to allow an user to build them as modules. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20211020184859.2705451-13-f.fainelli@gmail.com
2021-10-20arm64: broadcom: Removed forced select of interrupt controllersFlorian Fainelli
Now that the various second level interrupt controllers have been moved to IRQCHIP_PLATFORM_DRIVER and they do default to ARCH_BRCMSTB and ARCH_BCM2835 where relevant, remove their forced selection from the machine entry to allow an user to build them as modules. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20211020184859.2705451-12-f.fainelli@gmail.com
2021-10-20MIPS: BMIPS: Remove use of irq_cpu_offlineFlorian Fainelli
irq_cpu_offline() is only used by MIPS and we should instead use irq_migrate_all_off_this_cpu(). This will be helpful in order to remove drivers/irqchip/irq-bcm7038-l1.c irq_cpu_offline callback which would have got in the way of making this driver modular. Suggested-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20211020184859.2705451-2-f.fainelli@gmail.com
2021-10-20arm64: meson: remove MESON_IRQ_GPIO selectionNeil Armstrong
Selecting MESON_IRQ_GPIO forces it as built-in, but we may need to build it as a module, thus remove it here and let the "default ARCH_MESON" build as built-in by default with the option to switch it to module. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20210902134914.176986-3-narmstrong@baylibre.com
2021-10-20x86: dt: Use of_get_cpu_hwid()Rob Herring
Replace open coded parsing of CPU nodes' 'reg' property with of_get_cpu_hwid(). Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@redhat.com> Cc: Borislav Petkov <bp@alien8.de> Cc: x86@kernel.org Cc: "H. Peter Anvin" <hpa@zytor.com> Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211006164332.1981454-11-robh@kernel.org
2021-10-20sh: Use of_get_cpu_hwid()Rob Herring
Replace open coded parsing of CPU nodes' 'reg' property with of_get_cpu_hwid(). Cc: Yoshinori Sato <ysato@users.sourceforge.jp> Cc: Rich Felker <dalias@libc.org> Cc: linux-sh@vger.kernel.org Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211006164332.1981454-10-robh@kernel.org
2021-10-20riscv: Use of_get_cpu_hwid()Rob Herring
Replace open coded parsing of CPU nodes' 'reg' property with of_get_cpu_hwid(). Cc: Paul Walmsley <paul.walmsley@sifive.com> Cc: Palmer Dabbelt <palmer@dabbelt.com> Cc: Albert Ou <aou@eecs.berkeley.edu> Cc: linux-riscv@lists.infradead.org Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211006164332.1981454-9-robh@kernel.org
2021-10-20powerpc: Use of_get_cpu_hwid()Rob Herring
Replace open coded parsing of CPU nodes' 'reg' property with of_get_cpu_hwid(). Cc: Michael Ellerman <mpe@ellerman.id.au> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Cc: linuxppc-dev@lists.ozlabs.org Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20211006164332.1981454-8-robh@kernel.org
2021-10-20openrisc: Use of_get_cpu_hwid()Rob Herring
Replace open coded parsing of CPU nodes' 'reg' property with of_get_cpu_hwid(). Cc: Jonas Bonn <jonas@southpole.se> Cc: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> Cc: Stafford Horne <shorne@gmail.com> Cc: openrisc@lists.librecores.org Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Stafford Horne <shorne@gmail.com> Link: https://lore.kernel.org/r/20211006164332.1981454-7-robh@kernel.org
2021-10-20csky: Use of_get_cpu_hwid()Rob Herring
Replace open coded parsing of CPU nodes 'reg' property with of_get_cpu_hwid(). Cc: Guo Ren <guoren@kernel.org> Cc: linux-csky@vger.kernel.org Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211006164332.1981454-6-robh@kernel.org
2021-10-20arm64: Use of_get_cpu_hwid()Rob Herring
Replace the open coded parsing of CPU nodes' 'reg' property with of_get_cpu_hwid(). This change drops an error message for missing 'reg' property, but that should not be necessary as the DT tools will ensure 'reg' is present. Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will@kernel.org> Signed-off-by: Rob Herring <robh@kernel.org> Tested-by: Florian Fainelli <f.fainelli@gmail.com> Acked-by: Will Deacon <will@kernel.org> Reviewed-by: Sudeep Holla <sudeep.holla@arm.com> Link: https://lore.kernel.org/r/20211006164332.1981454-5-robh@kernel.org
2021-10-20ARM: broadcom: Use of_get_cpu_hwid()Rob Herring
Replace open coded parsing of CPU nodes 'reg' property with of_get_cpu_hwid(). Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: Ray Jui <rjui@broadcom.com> Cc: Scott Branden <sbranden@broadcom.com> Cc: bcm-kernel-feedback-list@broadcom.com Cc: Russell King <linux@armlinux.org.uk> Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Tested-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20211006164332.1981454-4-robh@kernel.org
2021-10-20ARM: Use of_get_cpu_hwid()Rob Herring
Replace the open coded parsing of CPU nodes' 'reg' property with of_get_cpu_hwid(). This change drops an error message for missing 'reg' property, but that should not be necessary as the DT tools will ensure 'reg' is present. Cc: Russell King <linux@armlinux.org.uk> Signed-off-by: Rob Herring <robh@kernel.org> Tested-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20211006164332.1981454-3-robh@kernel.org
2021-10-20Merge tag 'nios2_fixes_for_v5.15_part2' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux Pull nios2 fix from Dinh Nguyen: - Renamed CTL_STATUS to CTL_FSTATUS to fix a redefined warning * tag 'nios2_fixes_for_v5.15_part2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux: NIOS2: irqflags: rename a redefined register name
2021-10-20Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvmLinus Torvalds
Pull kvm fixes from Paolo Bonzini: "Tools: - kvm_stat: do not show halt_wait_ns since it is not a cumulative statistic x86: - clean ups and fixes for bus lock vmexit and lazy allocation of rmaps - two fixes for SEV-ES (one more coming as soon as I get reviews) - fix for static_key underflow ARM: - Properly refcount pages used as a concatenated stage-2 PGD - Fix missing unlock when detecting the use of MTE+VM_SHARED" * tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: KVM: SEV-ES: reduce ghcb_sa_len to 32 bits KVM: VMX: Remove redundant handling of bus lock vmexit KVM: kvm_stat: do not show halt_wait_ns KVM: x86: WARN if APIC HW/SW disable static keys are non-zero on unload Revert "KVM: x86: Open code necessary bits of kvm_lapic_set_base() at vCPU RESET" KVM: SEV-ES: Set guest_state_protected after VMSA update KVM: X86: fix lazy allocation of rmaps KVM: SEV-ES: fix length of string I/O KVM: arm64: Release mmap_lock when using VM_SHARED with MTE KVM: arm64: Report corrupted refcount at EL2 KVM: arm64: Fix host stage-2 PGD refcount KVM: s390: Function documentation fixes
2021-10-20dt-bindings: net: wireless: ti,wlcore: Convert to json-schemaGeert Uytterhoeven
The Texas Instruments Wilink 6/7/8 (wl12xx/wl18xx) Wireless LAN Controllers can be connected via SPI or via SDIO. Convert the two Device Tree binding documents to json-schema, and merge them into a single document. Add missing ti,wl1285 compatible value. Add missing interrupt-names property. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/23a2fbc46255a988e5d36f6c14abb7130480d200.1634646975.git.geert+renesas@glider.be Signed-off-by: Rob Herring <robh@kernel.org>
2021-10-20ep93xx: clock: convert in-place to COMMON_CLKNikita Shubin
Converted in-place without moving file to drivers/clk. tested on ts7250 (EP9302). Only setting rate and change parent tested for, as they are missing on ts7250: - video - I2S - ADC/KEYPAD - PWM Only video and I2S clock are interesting, as they are GATE + double DIV + MUX, all other are pretty much common but require ep93xx_syscon_swlocked_write to set registers. Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me> Signed-off-by: Alexander Sverdlin <alexander.sverdlin@gmail.com> Tested-by: Alexander Sverdlin <alexander.sverdlin@gmail.com> Acked-by: Alexander Sverdlin <alexander.sverdlin@gmail.com> Link: https://lore.kernel.org/r/20211018103105.146380-3-alexander.sverdlin@gmail.com' Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-20ARM: dts: mstar: Mark timer with arm,cpu-registers-not-fw-configuredRomain Perier
The vendor u-boot does not configure the arch timer correctly on MStar, let Linux do it. Signed-off-by: Romain Perier <romain.perier@gmail.com> Signed-off-by: Daniel Palmer <daniel@0x0f.com> Link: https://lore.kernel.org/linux-arm-kernel/20210923170747.5786-2-romain.perier@gmail.com
2021-10-20ARM: dts: mstar: Add rtc device nodeRomain Perier
This adds the definition of the rtc device node. The RTC being able to work with the oscillator at 12Mhz for now, it shares the same xtal than the watchdog. Signed-off-by: Romain Perier <romain.perier@gmail.com> Signed-off-by: Daniel Palmer <daniel@0x0f.com> Link: https://lore.kernel.org/all/20210823171613.18941-4-romain.perier@gmail.com
2021-10-20Merge tag 'sunxi-fixes-for-5.15-1' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/fixes Two patches to fix the GMAC PHY mode on some boards. * tag 'sunxi-fixes-for-5.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: ARM: dts: sun7i: A20-olinuxino-lime2: Fix ethernet phy-mode arm64: dts: allwinner: h5: NanoPI Neo 2: Fix ethernet node Link: https://lore.kernel.org/r/d4c41c71-f1ff-4464-a26f-1bfd4b52fd78.lettre@localhost Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-20Merge tag 'imx-fixes-5.15-4' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes i.MX fixes for 5.15, round 4: - A series from Frieder Schrempf to fix i.MX8MM Kontron N801x board on various aspects, voltage settings, GPIO polarity, SPI clock frequency and Ethernet PHY type. * tag 'imx-fixes-5.15-4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: arm64: dts: imx8mm-kontron: Fix connection type for VSC8531 RGMII PHY arm64: dts: imx8mm-kontron: Fix CAN SPI clock frequency arm64: dts: imx8mm-kontron: Fix polarity of reg_rst_eth2 arm64: dts: imx8mm-kontron: Set lower limit of VDD_SNVS to 800 mV arm64: dts: imx8mm-kontron: Make sure SOC and DRAM supply voltages are correct Link: https://lore.kernel.org/r/20211018000958.GC25810@dragon Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-20Merge tag 'arm-soc/for-5.15/devicetree' of ↵Arnd Bergmann
https://github.com/Broadcom/stblinux into arm/dt This is already in v5.15-rc5, but I'm adding it here as well to get a clean build of the dts files. * tag 'arm-soc/for-5.15/devicetree': ARM: dts: bcm2711-rpi-4-b: Fix usb's unit address ARM: dts: bcm2711-rpi-4-b: Fix pcie0's unit address formatting ARM: dts: bcm2711-rpi-4-b: fix sd_io_1v8_reg regulator states ARM: dts: bcm2711: fix MDIO #address- and #size-cells ARM: dts: bcm283x: Fix VEC address for BCM2711
2021-10-20Merge tag 'v5.16-rockchip-dts32-2' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt Adapt gpio subnode names to match the yaml binding and removal of the actually non-matching fallback-string for usb-phys on rk3066/rk3188 (most-specific compatible is and must always be used). * tag 'v5.16-rockchip-dts32-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: ARM: dts: rockchip: remove usb-phy fallback string from rk3066a/rk3188 ARM: dts: rockchip: change gpio nodenames Link: https://lore.kernel.org/r/3630369.N7QejLDta5@phil Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-20Merge tag 'v5.16-rockchip-dts64-2' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt Idle-cooling information for rk3399, rk356x additions (tsadc resets, i2s, spdif, pwm), rk3368 powerdomains, fixes to make gpio subnodes compliant with the new pinctrl yaml binding and addition of the chassis-type for the non-sbc devices. * tag 'v5.16-rockchip-dts64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: arm64: dts: rockchip: Add idle cooling devices to rk3399 arm64: dts: rockchip: fix resets in tsadc node for rk356x arm64: dts: rockchip: Add analog audio on Quartz64 arm64: dts: rockchip: Add i2s1 on rk356x arm64: dts: rockchip: change gpio nodenames arm64: dts: rockchip: add 'chassis-type' property arm64: dts: rockchip: add powerdomains to rk3368 dt-bindings: arm: rockchip: add rk3368 compatible string to pmu.yaml arm64: dts: rockchip: enable spdif on Quartz64 A arm64: dts: rockchip: add spdif node to rk356x arm64: dts: rockchip: add pwm nodes for rk3568 Link: https://lore.kernel.org/r/4536780.s7XYDJ6uuW@phil Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-20Merge tag 'gemini-dts-for-v5.16' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into arm/dt Gemini changes for the v5.16 kernel cycle: - Add device trees for Edimax NS2502 and SSI 1328 - Consolidate PCI interrupts * tag 'gemini-dts-for-v5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik: ARM: dts: gemini: Consolidate PCI interrupt-map properties ARM: gemini: add device tree for ssi1328 ARM: gemini: add device tree for edimax NS2502 dt-bindings: add vendor prefix for ssi dt-bindings: add vendor prefix for edimax ARM: dts: gemini: add labels for USB, IDE, flash and ethernet Link: https://lore.kernel.org/r/CACRpkdac5Sbt42CtuLMgCazfHdhcP98mEKGjeZ-DVcb=_N90Bg@mail.gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-20Merge tag 'ixp4xx-dts-for-v5.16' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into arm/dt IXP4xx DTS changes for the v5.16 kernel: - Add the PTP timesource - Push down PCI interrupt properties to the individual board files. * tag 'ixp4xx-dts-for-v5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik: ARM: dts: ixp4xx: Group PCI interrupt properties together ARM: dts: Add PTP timesource to the IXP456x Link: https://lore.kernel.org/r/CACRpkdbSJ662h_B9mAGdXWBeq8ZwKTQvSJ7cZ2x2d8UgELP5QA@mail.gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
generated by cgit (git 2.34.1) at 2025-09-19 01:49:22 +0000