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2021-10-12arm64: dts: exynos: add initial support for exynosautov9 SoCChanho Park
Add minimal support for ExynosAuto v9 SoC[1]. - Enumarate all pinctrl nodes - UART with exynos850 compatible - UFS0 HCI + Phy Like exynos850, this also uses fixed-rate clock nodes until clock driver has been supported. The clock nodes are initialized on bootloader stage thus we don't need to control them so far. [1]: https://www.samsung.com/semiconductor/minisite/exynos/products/automotiveprocessor/exynos-auto-v9/ Signed-off-by: Chanho Park <chanho61.park@samsung.com> Link: https://lore.kernel.org/r/20211012002314.38965-3-chanho61.park@samsung.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-10-12s390: fix strrchr() implementationRoberto Sassu
Fix two problems found in the strrchr() implementation for s390 architectures: evaluate empty strings (return the string address instead of NULL, if '\0' is passed as second argument); evaluate the first character of non-empty strings (the current implementation stops at the second). Fixes: 1da177e4c3f4 ("Linux-2.6.12-rc2") Cc: stable@vger.kernel.org Reported-by: Heiko Carstens <hca@linux.ibm.com> (incorrect behavior with empty strings) Signed-off-by: Roberto Sassu <roberto.sassu@huawei.com> Link: https://lore.kernel.org/r/20211005120836.60630-1-roberto.sassu@huawei.com Signed-off-by: Heiko Carstens <hca@linux.ibm.com> Signed-off-by: Vasily Gorbik <gor@linux.ibm.com>
2021-10-12arm64: ftrace: use function_nocfi for _mcount as wellSumit Garg
Commit 800618f955a9 ("arm64: ftrace: use function_nocfi for ftrace_call") only fixed address of ftrace_call but address of _mcount needs to be fixed as well. Use function_nocfi() to get the actual address of _mcount function as with CONFIG_CFI_CLANG, the compiler replaces function pointers with jump table addresses which breaks dynamic ftrace as the address of _mcount is replaced with the address of _mcount.cfi_jt. With mainline, this won't be a problem since by default CONFIG_DYNAMIC_FTRACE_WITH_REGS=y with Clang >= 10 as it supports -fpatchable-function-entry and CFI requires Clang 12 but for consistency we should add function_nocfi() for _mcount as well. Signed-off-by: Sumit Garg <sumit.garg@linaro.org> Acked-by: Mark Rutland <mark.rutland@arm.com> Reviewed-by: Sami Tolvanen <samitolvanen@google.com> Link: https://lore.kernel.org/r/20211011125059.3378646-1-sumit.garg@linaro.org Signed-off-by: Will Deacon <will@kernel.org>
2021-10-12arm64: asm: setup.h: export common variablesAnders Roxell
When building the kernel with sparse enabled 'C=1' the following warnings can be seen: arch/arm64/kernel/setup.c:58:13: warning: symbol '__fdt_pointer' was not declared. Should it be static? arch/arm64/kernel/setup.c:84:25: warning: symbol 'boot_args' was not declared. Should it be static? Rework so the variables are exported, since these two variable are created and used in setup.c, also used in head.S. Signed-off-by: Anders Roxell <anders.roxell@linaro.org> Link: https://lore.kernel.org/r/20211007195601.677474-1-anders.roxell@linaro.org Signed-off-by: Will Deacon <will@kernel.org>
2021-10-12powerpc/perf: Expose instruction and data address registers as part of ↵Athira Rajeev
extended regs Patch adds support to include Sampled Instruction Address Register (SIAR) and Sampled Data Address Register (SDAR) SPRs as part of extended registers. Update the definition of PERF_REG_PMU_MASK_300/31 and PERF_REG_EXTENDED_MAX to include these SPR's. Signed-off-by: Athira Rajeev <atrajeev@linux.vnet.ibm.com> Reviewed-by: Daniel Axtens <dja@axtens.net> Reviewed-by: Kajol Jain<kjain@linux.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20211007065505.27809-4-atrajeev@linux.vnet.ibm.com
2021-10-12powerpc/perf: Refactor the code definition of perf reg extended maskAthira Rajeev
PERF_REG_PMU_MASK_300 and PERF_REG_PMU_MASK_31 defines the mask value for extended registers. Current definition of these mask values uses hex constant and does not use registers by name, making it less readable. Patch refactor the macro values by or'ing together the actual register value constants. Also include PERF_REG_EXTENDED_MAX as part of enum definition. Suggested-by: Michael Ellerman <mpe@ellerman.id.au> Signed-off-by: Athira Rajeev <atrajeev@linux.vnet.ibm.com> Reviewed-by: Kajol Jain<kjain@linux.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20211007065505.27809-2-atrajeev@linux.vnet.ibm.com
2021-10-12Merge tag 'at91-soc-5.16' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/soc AT91 SoC #1 for 5.16: - Documentation for sama7g5 and lan966 families - Kconfig entry for lan966 new SoC. * tag 'at91-soc-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: ARM: at91: add basic support for new SoC family lan966 dt-bindings: arm: at91: Document lan966 pcb8291 and pcb8290 boards ARM: at91: Documentation: add lan966 family ARM: at91: Documentation: add sama7g5 family Link: https://lore.kernel.org/r/20211011124650.17218-1-nicolas.ferre@microchip.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-12Merge tag 'omap-for-v5.16/soc-signed' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/soc SoC changes for omaps for v5.16 Few non-urgent comment typo fixes and few changes to drop unused auxdata. Then a series of changes to drop some a pile of old unused defines. These can be now dropped for the SoCs that have been updated to use devicetree data with drivers/clock and drivers/soc device drivers. * tag 'omap-for-v5.16/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: OMAP2+: Drop unused CM defines for am3 ARM: OMAP2+: Drop unused CM and SCRM defines for omap4 ARM: OMAP2+: Drop unused CM and SCRM defines for omap5 ARM: OMAP2+: Drop unused CM defines for dra7 ARM: OMAP2+: Drop unused PRM defines for am3 ARM: OMAP2+: Drop unused PRM defines for am4 ARM: OMAP2+: Drop unused PRM defines for omap4 ARM: OMAP2+: Drop unused PRM defines for omap5 ARM: OMAP2+: Drop unused PRM defines for dra7 ARM: OMAP2+: Fix comment typo ARM: OMAP2+: Fix typo in some comments ARM: OMAP2+: Drop unused old auxdata for dra7x_evm_mmc_quirk() ARM: OMAP2+: Drop old unused omap5_uevm_legacy_init() Link: https://lore.kernel.org/r/pull-1633950030-501948@atomide.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-12Merge tag 'tegra-for-5.16-arm64-defconfig' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/defconfigs arm64: tegra: Default configuration changes for v5.16-rc1 This enables drivers for the various audio processors found on Tegra210 and later. * tag 'tegra-for-5.16-arm64-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: arm64: defconfig: Enable few Tegra210 based AHUB drivers Link: https://lore.kernel.org/r/20211008201132.1678814-8-thierry.reding@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-12ARM: dts: aspeed: Add TYAN S7106 BMC machineOskar Senft
The TYAN S7106 is a server platform with an ASPEED AST2500 BMC. Signed-off-by: Oskar Senft <osk@google.com> Reviewed-by: Jeremy Kerr <jk@codeconstruct.com.au> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20210909004920.1634322-1-osk@google.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-10-12ARM: dts: aspeed: rainier: Add power-config-full-load gpioAdriana Kobylak
Add the power-config-full-load described in: https://github.com/openbmc/docs/blob/master/designs/device-tree-gpio-naming.md#power-config-full-load The power-config-full-load gpio is designed to be used to specify how many power supplies the system should have, in rainier it is 2 or 4. If enough power supplies fail so that the system no longer has redundancy (no longer n+1), the hardware will signal to the Onboard Chip Controller that the system may be oversubscribed, and performance may need to be reduced so the system can maintain it's powered on state. Signed-off-by: Adriana Kobylak <anoo@us.ibm.com> Reviewed-by: Eddie James <eajames@linux.ibm.com> Link: https://lore.kernel.org/r/20211005192226.213539-1-anoo@linux.ibm.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-10-11Merge tag 'tegra-for-5.16-arm-dt' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt ARM: tegra: Device tree changes for v5.16-rc1 This contains various cleanup patches to 32-bit ARM Tegra device trees and enables USB OTG mode on the Nexus 7. * tag 'tegra-for-5.16-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: ARM: tegra: Remove useless usb-ehci compatible string ARM: tegra: Remove unused backlight-boot-off property ARM: tegra: nexus7: Enable USB OTG mode ARM: tegra: Add new properties to USB PHY device-tree nodes ARM: tegra: Update Broadcom Bluetooth device-tree nodes ARM: tegra: acer-a500: Correct compatible of ak8975 magnetometer Link: https://lore.kernel.org/r/20211008201132.1678814-6-thierry.reding@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-11Revert "arm64: dts: Add support for Unisoc's UMS512"Arnd Bergmann
The patch uses the "dt-bindings/clock/sprd,ums512-clk.h header, which is not merged yet. This caused a build regression, and it means the patch was not ready to get merged anyway. This reverts commit 23410de5796cd49abb3f9b6d377822e18298e0a0. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-11Merge tag 'at91-dt-5.16' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/dt AT91 DT #1 for 5.16: - Addition of a new variant in the sama5d2 family: the sama5d29 with significant updates being CAN and Ethernet controllers; - Add support for Exegin Q5xR5 and CalAmp LMU5000 boards which were maintained up to this moment, separately, in OpenWrt tree; - Two more boards gained I2C bus recovery support; - Tse850 updated with one Ethernet fix; - Sama7g5ek gained ADC nodes and sama5d27_wlsom1 WiFi support. * tag 'at91-dt-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: ARM: at91: dts: sama5d29: Add dtsi file for sama5d29 ARM: dts: at91-sama5d2_icp.dts: Added I2C bus recovery support ARM: dts: at91: tse850: the emac<->phy interface is rmii ARM: dts: at91: add Exegin Q5xR5 board dt-bindings: ARM: at91: document exegin q5xr5 board dt-bindings: add vendor prefix for exegin ARM: dts: at91: add CalAmp LMU5000 board dt-bindings: ARM: at91: document CalAmp LMU5000 board dt-bindings: add vendor prefix for calamp ARM: dts: at91: at91sam9260: add pinctrl label ARM: dts: at91-sama5d27_som1_ek: Added I2C bus recovery support ARM: dts: at91: sama7g5ek: enable ADC on the board ARM: dts: at91: sama7g5: add node for the ADC ARM: dts: at91: sama5d27_wlsom1: add wifi device Link: https://lore.kernel.org/r/20211011123438.16562-1-nicolas.ferre@microchip.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-11Merge tag 'omap-for-v5.16/dt-signed' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt Devicetree changes for omaps for v5.16 These changes configure devices for am335x and dra7, and fixes various devicetree check warnings for gta04: - Update am335x-pocketbeagle to use pinconf-single - A series of devicetree warning fixes for omap3 and gta04 - Configure bb2d Vivante GC 2D Accelerator for dra7 * tag 'omap-for-v5.16/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: dts: dra7: add entry for bb2d module arm: dts: omap3-gta04: cleanup led node names arm: dts: omap3-gta04a4: accelerometer irq fix arm: dts: omap3-gta04a5: fix missing sensor supply arm: dts: omap3-gta04: fix missing sensor supply arm: dts: omap3-gta04: cleanup LCD definition ARM: dts: omap3: fix cpu thermal label name ARM: dts: am335x-pocketbeagle: switch to pinconf-single Link: https://lore.kernel.org/r/pull-1633950030-501948@atomide.com-3 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-11Merge tag 'v5.15-next-dts32' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/dt mt7623: add USB nodes mt7629: update PCIe node to new format * tag 'v5.15-next-dts32' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux: dt-bindings: arm: Add MT6589 Fairphone 1 ARM: dts: mediatek: Update MT7629 PCIe node for new format arm: dts: mt7623: add otg nodes for bpi-r2 arm: dts: mt7623: add musb device nodes Link: https://lore.kernel.org/r/7135d46f-5fb9-b46d-96d4-3b38548fe23e@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-11Merge tag 'tegra-for-5.16-arm64-dt' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt arm64: tegra: Device tree changes for v5.16-rc1 This enables additional interrupts on the Tegra194 GPIO controller for better load balancing and/or virtualization, adds audio support on Jetson TX2 NX, enables the NVDEC video decoder on Tegra186 and later and enables more audio processors that are found on Tegra210 and later. Various cleanups across the board top things off. * tag 'tegra-for-5.16-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: arm64: tegra: Fix pcie-ep DT nodes arm64: tegra: Remove useless usb-ehci compatible string arm64: tegra: Extend APE audio support on Jetson platforms arm64: tegra: Add few AHUB devices for Tegra210 and later arm64: tegra: Remove unused backlight-boot-off property arm64: tegra: Add NVDEC to Tegra186/194 device trees arm64: tegra: Add new USB PHY properties on Tegra132 arm64: tegra: Update HDA card name on Jetson TX2 NX arm64: tegra: Audio graph sound card for Jetson TX2 NX arm64: tegra: Add additional GPIO interrupt entries on Tegra194 Link: https://lore.kernel.org/r/20211008201132.1678814-7-thierry.reding@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-11arm64: dts: Add support for Unisoc's UMS512Chunyan Zhang
Add basic DT to support Unisoc's UMS512, with this patch, the board ums512-1h10 can run into console. Signed-off-by: Chunyan Zhang <chunyan.zhang@unisoc.com> Link: https://lore.kernel.org/r/20211008034533.343167-3-zhang.lyra@gmail.com' Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-11arm64/hugetlb: fix CMA gigantic page order for non-4K PAGE_SIZEMike Kravetz
For non-4K PAGE_SIZE configs, the largest gigantic huge page size is CONT_PMD_SHIFT order. On arm64 with 64K PAGE_SIZE, the gigantic page is 16G. Therefore, one should be able to specify 'hugetlb_cma=16G' on the kernel command line so that one gigantic page can be allocated from CMA. However, when adding such an option the following message is produced: hugetlb_cma: cma area should be at least 8796093022208 MiB This is because the calculation for non-4K gigantic page order is incorrect in the arm64 specific routine arm64_hugetlb_cma_reserve(). Fixes: abb7962adc80 ("arm64/hugetlb: Reserve CMA areas for gigantic pages on 16K and 64K configs") Cc: <stable@vger.kernel.org> # 5.9.x Signed-off-by: Mike Kravetz <mike.kravetz@oracle.com> Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com> Link: https://lore.kernel.org/r/20211005202529.213812-1-mike.kravetz@oracle.com Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2021-10-11x86/Kconfig: Do not enable AMD_MEM_ENCRYPT_ACTIVE_BY_DEFAULT automaticallyBorislav Petkov
This Kconfig option was added initially so that memory encryption is enabled by default on machines which support it. However, devices which have DMA masks that are less than the bit position of the encryption bit, aka C-bit, require the use of an IOMMU or the use of SWIOTLB. If the IOMMU is disabled or in passthrough mode, the kernel would switch to SWIOTLB bounce-buffering for those transfers. In order to avoid that, 2cc13bb4f59f ("iommu: Disable passthrough mode when SME is active") disables the default IOMMU passthrough mode so that devices for which the default 256K DMA is insufficient, can use the IOMMU instead. However 2, there are cases where the IOMMU is disabled in the BIOS, etc. (think the usual hardware folk "oops, I dropped the ball there" cases) or a driver doesn't properly use the DMA APIs or a device has a firmware or hardware bug, e.g.: ea68573d408f ("drm/amdgpu: Fail to load on RAVEN if SME is active") However 3, in the above GPU use case, there are APIs like Vulkan and some OpenGL/OpenCL extensions which are under the assumption that user-allocated memory can be passed in to the kernel driver and both the GPU and CPU can do coherent and concurrent access to the same memory. That cannot work with SWIOTLB bounce buffers, of course. So, in order for those devices to function, drop the "default y" for the SME by default active option so that users who want to have SME enabled, will need to either enable it in their config or use "mem_encrypt=on" on the kernel command line. [ tlendacky: Generalize commit message. ] Fixes: 7744ccdbc16f ("x86/mm: Add Secure Memory Encryption (SME) support") Reported-by: Paul Menzel <pmenzel@molgen.mpg.de> Signed-off-by: Borislav Petkov <bp@suse.de> Acked-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Tom Lendacky <thomas.lendacky@amd.com> Cc: <stable@vger.kernel.org> Link: https://lkml.kernel.org/r/8bbacd0e-4580-3194-19d2-a0ecad7df09c@molgen.mpg.de
2021-10-11Merge tag 'amlogic-arm64-dt-for-v5.16' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into arm/dt Amlogic ARM64 DT changes for v5.16: - New Boards (with bindings): - Radxa Zero - Jethub D1 & H1 home automation controllers - Misc Changes: - add Ethernet PHY reset line for ODROID-C4/HC4 - add audio playback nodes to rbox-pro - Fix the pwm regulator supply properties - meson-g12b-odroid-n2: add missing 5v regulator gpio * tag 'amlogic-arm64-dt-for-v5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux: arm64: dts: meson-g12b-odroid-n2: add 5v regulator gpio arm64: dts: meson-sm1: Fix the pwm regulator supply properties arm64: dts: meson-g12b: Fix the pwm regulator supply properties arm64: dts: meson-g12a: Fix the pwm regulator supply properties arm64: dts: meson: add audio playback to rbox-pro arm64: dts: meson-axg: add support for JetHub D1 arm64: dts: meson-gxl: add support for JetHub H1 dt-bindings: vendor-prefixes: add jethome prefix dt-bindings: arm: amlogic: add bindings for Jethub D1/H1 arm64: dts: amlogic: add support for Radxa Zero dt-bindings: arm: amlogic: add support for Radxa Zero arm64: dts: meson: sm1: add Ethernet PHY reset line for ODROID-C4/HC4 Link: https://lore.kernel.org/r/cc0a3af0-b1b1-dbe1-f553-cf58a1c63d0b@baylibre.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-11Merge tag 'zynqmp-dt-for-v5.16-v2' of https://github.com/Xilinx/linux-xlnx ↵Arnd Bergmann
into arm/dt arm64: dts: ZynqMP DT changes for v5.16-v2 - Add support for Kria SOM board * tag 'zynqmp-dt-for-v5.16-v2' of https://github.com/Xilinx/linux-xlnx: arm64: zynqmp: Add support for Xilinx Kria SOM board Link: https://lore.kernel.org/r/9815867c-ffbb-fc9d-64b9-badee5e2862b@xilinx.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-11KVM: arm64: Handle protected guests at 32 bitsFuad Tabba
Protected KVM does not support protected AArch32 guests. However, it is possible for the guest to force run AArch32, potentially causing problems. Add an extra check so that if the hypervisor catches the guest doing that, it can prevent the guest from running again by resetting vcpu->arch.target and returning ARM_EXCEPTION_IL. If this were to happen, The VMM can try and fix it by re- initializing the vcpu with KVM_ARM_VCPU_INIT, however, this is likely not possible for protected VMs. Adapted from commit 22f553842b14 ("KVM: arm64: Handle Asymmetric AArch32 systems") Signed-off-by: Fuad Tabba <tabba@google.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20211010145636.1950948-12-tabba@google.com
2021-10-11KVM: arm64: Trap access to pVM restricted featuresFuad Tabba
Trap accesses to restricted features for VMs running in protected mode. Access to feature registers are emulated, and only supported features are exposed to protected VMs. Accesses to restricted registers as well as restricted instructions are trapped, and an undefined exception is injected into the protected guests, i.e., with EC = 0x0 (unknown reason). This EC is the one used, according to the Arm Architecture Reference Manual, for unallocated or undefined system registers or instructions. Only affects the functionality of protected VMs. Otherwise, should not affect non-protected VMs when KVM is running in protected mode. Signed-off-by: Fuad Tabba <tabba@google.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20211010145636.1950948-11-tabba@google.com
2021-10-11KVM: arm64: Move sanitized copies of CPU featuresFuad Tabba
Move the sanitized copies of the CPU feature registers to the recently created sys_regs.c. This consolidates all copies in a more relevant file. No functional change intended. Acked-by: Will Deacon <will@kernel.org> Signed-off-by: Fuad Tabba <tabba@google.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20211010145636.1950948-10-tabba@google.com
2021-10-11KVM: arm64: Initialize trap registers for protected VMsFuad Tabba
Protected VMs have more restricted features that need to be trapped. Moreover, the host should not be trusted to set the appropriate trapping registers and their values. Initialize the trapping registers, i.e., hcr_el2, mdcr_el2, and cptr_el2 at EL2 for protected guests, based on the values of the guest's feature id registers. No functional change intended as trap handlers introduced in the previous patch are still not hooked in to the guest exit handlers. Reviewed-by: Andrew Jones <drjones@redhat.com> Signed-off-by: Fuad Tabba <tabba@google.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20211010145636.1950948-9-tabba@google.com
2021-10-11KVM: arm64: Add handlers for protected VM System RegistersFuad Tabba
Add system register handlers for protected VMs. These cover Sys64 registers (including feature id registers), and debug. No functional change intended as these are not hooked in yet to the guest exit handlers introduced earlier. So when trapping is triggered, the exit handlers let the host handle it, as before. Reviewed-by: Andrew Jones <drjones@redhat.com> Signed-off-by: Fuad Tabba <tabba@google.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20211010145636.1950948-8-tabba@google.com
2021-10-11KVM: arm64: Simplify masking out MTE in feature id regFuad Tabba
Simplify code for hiding MTE support in feature id register when MTE is not enabled/supported by KVM. No functional change intended. Signed-off-by: Fuad Tabba <tabba@google.com> Reviewed-by: Andrew Jones <drjones@redhat.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20211010145636.1950948-7-tabba@google.com
2021-10-11KVM: arm64: Add missing field descriptor for MDCR_EL2Fuad Tabba
It's not currently used. Added for completeness. No functional change intended. Suggested-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Fuad Tabba <tabba@google.com> Reviewed-by: Andrew Jones <drjones@redhat.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20211010145636.1950948-6-tabba@google.com
2021-10-11KVM: arm64: Pass struct kvm to per-EC handlersFuad Tabba
We need struct kvm to check for protected VMs to be able to pick the right handlers for them in subsequent patches. Signed-off-by: Fuad Tabba <tabba@google.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20211010145636.1950948-5-tabba@google.com
2021-10-11KVM: arm64: Move early handlers to per-EC handlersMarc Zyngier
Simplify the early exception handling by slicing the gigantic decoding tree into a more manageable set of functions, similar to what we have in handle_exit.c. This will also make the structure reusable for pKVM's own early exit handling. Signed-off-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Fuad Tabba <tabba@google.com> Link: https://lore.kernel.org/r/20211010145636.1950948-4-tabba@google.com
2021-10-11KVM: arm64: Don't include switch.h into nvhe/kvm-main.cMarc Zyngier
hyp-main.c includes switch.h while it only requires adjust-pc.h. Fix it to remove an unnecessary dependency. Signed-off-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Fuad Tabba <tabba@google.com> Link: https://lore.kernel.org/r/20211010145636.1950948-3-tabba@google.com
2021-10-11KVM: arm64: Move __get_fault_info() and co into their own include fileMarc Zyngier
In order to avoid including the whole of the switching helpers in unrelated files, move the __get_fault_info() and related helpers into their own include file. Signed-off-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Fuad Tabba <tabba@google.com> Link: https://lore.kernel.org/r/20211010145636.1950948-2-tabba@google.com
2021-10-11bpf, mips: Fix comment on tail call count limitingTiezhu Yang
In emit_tail_call() of bpf_jit_comp32.c, "blez t2" (t2 <= 0) is not consistent with the comment "t2 < 0", update the comment to keep consistency. Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn> Signed-off-by: Daniel Borkmann <daniel@iogearbox.net> Acked-by: Johan Almbladh <johan.almbladh@anyfinetworks.com> Link: https://lore.kernel.org/bpf/1633915150-13220-3-git-send-email-yangtiezhu@loongson.cn
2021-10-11bpf, mips: Clean up config options about JITTiezhu Yang
The config options MIPS_CBPF_JIT and MIPS_EBPF_JIT are useless, remove them in arch/mips/Kconfig, and then modify arch/mips/net/Makefile. Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn> Signed-off-by: Daniel Borkmann <daniel@iogearbox.net> Acked-by: Johan Almbladh <johan.almbladh@anyfinetworks.com> Link: https://lore.kernel.org/bpf/1633915150-13220-2-git-send-email-yangtiezhu@loongson.cn
2021-10-11Merge branch kvm-arm64/raz-sysregs into kvmarm-master/nextMarc Zyngier
* kvm-arm64/raz-sysregs: : . : Simplify the handling of RAZ register, removing pointless indirections. : . KVM: arm64: Replace get_raz_id_reg() with get_raz_reg() KVM: arm64: Use get_raz_reg() for userspace reads of PMSWINC_EL0 KVM: arm64: Return early from read_id_reg() if register is RAZ Signed-off-by: Marc Zyngier <maz@kernel.org>
2021-10-11KVM: arm64: Replace get_raz_id_reg() with get_raz_reg()Alexandru Elisei
Reading a RAZ ID register isn't different from reading any other RAZ register, so get rid of get_raz_id_reg() and replace it with get_raz_reg(), which does the same thing, but does it without going through two layers of indirection. No functional change. Suggested-by: Andrew Jones <drjones@redhat.com> Signed-off-by: Alexandru Elisei <alexandru.elisei@arm.com> Reviewed-by: Andrew Jones <drjones@redhat.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20211011105840.155815-4-alexandru.elisei@arm.com
2021-10-11KVM: arm64: Use get_raz_reg() for userspace reads of PMSWINC_EL0Alexandru Elisei
PMSWINC_EL0 is a write-only register and was initially part of the VCPU register state, but was later removed in commit 7a3ba3095a32 ("KVM: arm64: Remove PMSWINC_EL0 shadow register"). To prevent regressions, the register was kept accessible from userspace as Read-As-Zero (RAZ). The read function that is used to handle userspace reads of this register is get_raz_id_reg(), which, while technically correct, as it returns 0, it is not semantically correct, as PMSWINC_EL0 is not an ID register as the function name suggests. Add a new function, get_raz_reg(), to use it as the accessor for PMSWINC_EL0, as to not conflate get_raz_id_reg() to handle other types of registers. No functional change intended. Signed-off-by: Alexandru Elisei <alexandru.elisei@arm.com> Reviewed-by: Andrew Jones <drjones@redhat.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20211011105840.155815-3-alexandru.elisei@arm.com
2021-10-11KVM: arm64: Return early from read_id_reg() if register is RAZAlexandru Elisei
If read_id_reg() is called for an ID register which is Read-As-Zero (RAZ), it initializes the return value to zero, then goes through a list of registers which require special handling before returning the final value. By not returning as soon as it checks that the register should be RAZ, the function creates the opportunity for bugs, if, for example, a patch changes a register to RAZ (like has happened with PMSWINC_EL0 in commit 11663111cd49), but doesn't remove the special handling from read_id_reg(); or if a register is RAZ in certain situations, but readable in others. Return early to make it impossible for a RAZ register to be anything other than zero. Reviewed-by: Andrew Jones <drjones@redhat.com> Signed-off-by: Alexandru Elisei <alexandru.elisei@arm.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20211011105840.155815-2-alexandru.elisei@arm.com
2021-10-11sh: Use modern ASoC DAI format terminologyMark Brown
The SH machine drivers have some ASoC DAI format specifications that use older defines based on outdated terminology which we're trying to retire, update to the new bindings. Signed-off-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20210915172302.36677-1-broonie@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
2021-10-11ARM: dts: omap: fix gpmc,mux-add-data typeRoger Quadros
gpmc,mux-add-data is not boolean. Fixes the below errors flagged by dtbs_check. "ethernet@4,0:gpmc,mux-add-data: True is not of type 'array'" Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-10-11ARM: dts: omap: Fix boolean properties gpmc,cycle2cycle-{same|diff}csenRoger Quadros
gpmc,cycle2cycle-{same|diff}csen are boolean properties. Fix them to prevent dtbs_check errors. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-10-11Merge branch kvm-arm64/misc-5.16 into kvmarm-master/nextMarc Zyngier
* kvm-arm64/misc-5.16: : . : - Allow KVM to be disabled from the command-line : - Clean up CONFIG_KVM vs CONFIG_HAVE_KVM : . KVM: arm64: Depend on HAVE_KVM instead of OF KVM: arm64: Unconditionally include generic KVM's Kconfig KVM: arm64: Allow KVM to be disabled from the command line Signed-off-by: Marc Zyngier <maz@kernel.org>
2021-10-11KVM: arm64: Depend on HAVE_KVM instead of OFSean Christopherson
Select HAVE_KVM at all times on arm64, as the OF requirement is always there (even in the case of an ACPI system, we still depend on some of the OF infrastructure), and won't fo away. No functional change intended. Signed-off-by: Sean Christopherson <seanjc@google.com> Acked-by: Will Deacon <will@kernel.org> [maz: Drop the "HAVE_KVM if OF" dependency, as OF is always there on arm64, new commit message] Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20210921222231.518092-3-seanjc@google.com
2021-10-11KVM: arm64: Unconditionally include generic KVM's KconfigSean Christopherson
Unconditionally "source" the generic KVM Kconfig instead of wrapping it with KVM=y. A future patch will select HAVE_KVM so that referencing HAVE_KVM in common kernel code doesn't break, and because KVM=y and HAVE_KVM=n is weird. Source the generic KVM Kconfig unconditionally so that HAVE_KVM and KVM don't end up with a circular dependency. Note, all but one of generic KVM's "configs" are of the HAVE_XYZ nature, and the one outlier correctly takes a dependency on CONFIG_KVM, i.e. the generic Kconfig is intended to be included unconditionally. No functional change intended. Signed-off-by: Sean Christopherson <seanjc@google.com> [maz: made NVHE_EL2_DEBUG depend on KVM] Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20210921222231.518092-2-seanjc@google.com
2021-10-11arm64: dts: renesas: rzg2l-smarc: Enable microSD on SMARC platformBiju Das
This patch enables microSD card slot connected to SDHI1 on RZ/G2L SMARC platform. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20211010142520.21976-3-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-10-11arm64: dts: renesas: rzg2l-smarc-som: Enable eMMC on SMARC platformBiju Das
RZ/G2L SoM has both 64 GB eMMC and microSD connected to SDHI0. Both these interfaces are mutually exclusive and the SD0 device selection is based on the XOR between GPIO_SD0_DEV_SEL and SW1[2] switch position. This patch sets GPIO_SD0_DEV_SEL to high in DT. Use the below switch setting logic for device selection between eMMC and microSD slot connected to SDHI0. Set SW1[2] to position 2/OFF for selecting eMMC Set SW1[2] to position 3/ON for selecting microSD This patch enables eMMC on RZ/G2L SMARC platform by default. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20211010142520.21976-2-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-10-11KVM: arm64: Allow KVM to be disabled from the command lineMarc Zyngier
Although KVM can be compiled out of the kernel, it cannot be disabled at runtime. Allow this possibility by introducing a new mode that will prevent KVM from initialising. This is useful in the (limited) circumstances where you don't want KVM to be available (what is wrong with you?), or when you want to install another hypervisor instead (good luck with that). Reviewed-by: David Brazdil <dbrazdil@google.com> Acked-by: Will Deacon <will@kernel.org> Acked-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Reviewed-by: Andrew Scull <ascull@google.com> Link: https://lore.kernel.org/r/20211001170553.3062988-1-maz@kernel.org
2021-10-11Merge branch kvm-arm64/vgic-ipa-checks into kvmarm-master/nextMarc Zyngier
* kvm-arm64/vgic-ipa-checks: : . : Add extra checks to prevent ther various GIC regions to land : outside of the IPA space (and tests to verify that it works). : . KVM: arm64: selftests: Add init ITS device test KVM: arm64: selftests: Add test for legacy GICv3 REDIST base partially above IPA range KVM: arm64: selftests: Add tests for GIC redist/cpuif partially above IPA range KVM: arm64: selftests: Add some tests for GICv2 in vgic_init KVM: arm64: selftests: Make vgic_init/vm_gic_create version agnostic KVM: arm64: selftests: Make vgic_init gic version agnostic KVM: arm64: vgic: Drop vgic_check_ioaddr() KVM: arm64: vgic-v3: Check ITS region is not above the VM IPA size KVM: arm64: vgic-v2: Check cpu interface region is not above the VM IPA size KVM: arm64: vgic-v3: Check redist region is not above the VM IPA size kvm: arm64: vgic: Introduce vgic_check_iorange Signed-off-by: Marc Zyngier <maz@kernel.org>
2021-10-11m68k: defconfig: Update defconfigs for v5.15-rc1Geert Uytterhoeven
- Enable modular build of the new MCTP networking core protocol, - Enable modular build of the new NTFS Read-Write file system support (incl. external compressions lzx/xpress), - Enable modular build of the MD4 digest algorithm (no longer auto-selected since commit 42c21973fa3c0f48 ("cifs: create a MD4 module and switch cifs.ko to use it")), - Move CONFIG_STRING_SELFTEST=m (moved in commit b2ff70a01a7a8083 ("lib/test_string.c: move string selftest in the Runtime Testing menu")). - Drop CONFIG_TEST_SORT=m (auto-enabled since commit 36f33b562936295a ("lib/test: convert test_sort.c to use KUnit")). Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Link: https://lore.kernel.org/r/20210914073034.3883338-1-geert@linux-m68k.org
generated by cgit (git 2.34.1) at 2025-09-21 00:09:46 +0000