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2018-07-20kernfs: allow creating kernfs objects with arbitrary uid/gidDmitry Torokhov
This change allows creating kernfs files and directories with arbitrary uid/gid instead of always using GLOBAL_ROOT_UID/GID by extending kernfs_create_dir_ns() and kernfs_create_file_ns() with uid/gid arguments. The "simple" kernfs_create_file() and kernfs_create_dir() are left alone and always create objects belonging to the global root. When creating symlinks ownership (uid/gid) is taken from the target kernfs object. Co-Developed-by: Tyler Hicks <tyhicks@canonical.com> Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Signed-off-by: Tyler Hicks <tyhicks@canonical.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-07-21arm64: dts: qcom: Add pmu node to sdm845Stephen Boyd
Add the CPU PMU on sdm845 to get perf support for hardware events. Signed-off-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-07-20Merge branch 'omap-for-v4.19/dt-sysc-v2' into omap-for-v4.19/dtTony Lindgren
2018-07-20ARM: dts: omap4: Add l4 ranges for 4460Tony Lindgren
Compared to 4430, 4460 and 4470 just have slightly different l4 cfg ranges. Signed-off-by: Tony Lindgren <tony@atomide.com>
2018-07-20ARM: dts: omap4: Move l4 child devices to probe them with ti-syscTony Lindgren
With l4 interconnect hierarchy and ti-sysc interconnect target module data in place, we can simply move all the related child devices to their proper location and enable probing using ti-sysc. In general the first child device address range starts at range 0 from the ti-sysc interconnect target so the move involves adjusting the child device reg properties for that. And we cannot yet move mmu_dsp until we have a proper reset controller driver for rstctrl registers. In case of any regressions, problem devices can be reverted to probe with legacy platform data as needed by moving them back and removing the related interconnect target module node. Signed-off-by: Tony Lindgren <tony@atomide.com>
2018-07-20ARM: dts: omap4: Probe watchdog 3 with ti-syscTony Lindgren
Before updating wdt2 to probe with ti-sysc we want to have wdt3 probed with ti-sysc to avoid having them unnecessarily swap order. With ti-sysc, we probe child devices at module_init time while and until l4 abe interconnect is converted to use ti-sysc, wdt3 will probe earlier with legacy platform data. Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2018-07-20ARM: dts: omap4: Add l4 interconnect hierarchy and ti-sysc dataTony Lindgren
Let's add proper interconnect hierarchy for l4 interconnect instances with the related ti-sysc interconnect module data as documented in Documentation/devicetree/bindings/bus/ti-sysc.txt. Using ti-sysc driver binding allows us to start dropping legacy platform data in arch/arm/mach-omap2/omap*hwmod*data.c files later on in favor of ti-sysc dts data. For setting up a proper hierarchy for the interconnect and ti-sysc data, there are multiple reasons: 1. We can use dts ranges to protect registers from being ioremapped from other devices and prevent hard to track issues with failed flush of posted write between modules 2. Some of the ranges may not be accessible to operating systems at all if configured so on high-security devices 3. The interconnect hierarchy provides proper clockdomain hierarchy that can be used for genpd later on 4. We can avoid almost all deferred probe related issues simply by probing the resource providing interconnect instance first for l4 wkup instance 5. With deferred probe issues gone, we can probe everything later at module_init time except for system timer and interrupt controller and their clocks. This data is generated based on platform data from a booted system and the interconnect acces protection registers for ranges. To avoid regressions, we initially validate the device tree provided data against the existing platform data on boot. Each interconnect instance is typically divided into segments to avoid powering up the whole interconnect. And each segment has one or more ranges TI specific interconnect target modules connected to it. Some devices can also have a separate data access port directly to the parent L3 interconnect for DMA that can be set up as a separate range. Note that we cannot yet include this file from omap4.dtsi until child devices are moved to their proper locations in the interconnect hierarchy in the following patch. Otherwise we would have the each module probed twice. Also note that this does not yet add l4 abe instance, that will be added separately later on. Signed-off-by: Tony Lindgren <tony@atomide.com>
2018-07-21openrisc: use generic dma_noncoherent_opsChristoph Hellwig
Switch to the generic noncoherent direct mapping implementation. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Stafford Horne <shorne@gmail.com>
2018-07-21openrisc: fix cache maintainance the the sync_single_for_device DMA operationChristoph Hellwig
The cache maintaince in the sync_single_for_device operation should be equivalent to the map_page operation to facilitate reusing buffers. Fix the openrisc implementation by moving the cache maintaince performed in map_page into the sync_single method, and calling that from map_page. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Stafford Horne <shorne@gmail.com>
2018-07-21openrisc: remove the no-op unmap_page and unmap_sg DMA operationsChristoph Hellwig
Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Stafford Horne <shorne@gmail.com>
2018-07-21openrisc: remove the sync_single_for_cpu DMA operationChristoph Hellwig
openrisc does all the required cache maintainance at dma map time, and none at unmap time. It thus has to implement sync_single_for_device to match the map cace for buffer reuse, but there is no point in doing another invalidation in the sync_single_cpu_case, which in terms of cache maintainance is equivalent to the unmap case. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Stafford Horne <shorne@gmail.com>
2018-07-20Merge ra.kernel.org:/pub/scm/linux/kernel/git/torvalds/linuxDavid S. Miller
All conflicts were trivial overlapping changes, so reasonably easy to resolve. Signed-off-by: David S. Miller <davem@davemloft.net>
2018-07-21ARM: imx_v6_v7_defconfig: add DMATEST supportRobin Gong
Add DMATEST support and remove invalid options, such as CONFIG_BT_HCIUART_H4 is default enabled and CONFIG_SND_SOC_IMX_WM8962 is out of date and not appear in any config file. Please refer to Documentation/driver-api/dmaengine/dmatest.rst to test MEMCPY feature of imx-sdma. Signed-off-by: Robin Gong <yibin.gong@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-07-21ARM: dts: imx7d: remove "operating-points" property for cpu1Anson Huang
Commit b97872d4eb22 ("ARM: dts: imx: Add missing OPP properties for CPUs") added "operating-points" property for all CPUs, but i.MX7D already has "operating-points-v2" property on both CPUs, so no need to add "operating-points" property again, this patch removes it. Fixes: b97872d4eb22 ("ARM: dts: imx: Add missing OPP properties for CPUs") Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-07-21ARM: dts: vf610-zii-ssmb-spu3: Fix W=1 level warningsAndrey Smirnov
Fix a couple of things that were causing warning when building DTB with W=1. Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: cphealy@gmail.com Cc: linux-arm-kernel@lists.infradead.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-07-21ARM: dts: vf610: Add ZII CFU1 boardAndrey Smirnov
Add support for the Zodiac Inflight Innovations CFU1 board (VF610-based). Cc: linux-arm-kernel@lists.infradead.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Tested-by: Chris Healy <cphealy@gmail.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-07-20mips: mm: Discard ioremap_cacheable_cow() methodSerge Semin
This macro substitution is the shortcut to map cacheable IO memory with coherent and write-back attributes. Since it is entirely unused by kernel, lets just remove it. Signed-off-by: Serge Semin <fancer.lancer@gmail.com> Signed-off-by: Paul Burton <paul.burton@mips.com> Suggested-by: Christoph Hellwig <hch@infradead.org> Patchwork: https://patchwork.linux-mips.org/patch/19937/ CC: Paul Burton <paul.burton@mips.com> Cc: James Hogan <jhogan@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Sinan Kaya <okaya@codeaurora.org> Cc: Huacai Chen <chenhc@lemote.com> Cc: Sergey.Semin@t-platforms.ru Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org
2018-07-20Merge tag 'imx-fixes-4.18-4' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into fixes i.MX fixes for 4.18, round 4: - A fix for i.MX6 RDU2 board on the wrong IRQ type of Marvell switch, which might result in a race condition in the interrupt handler and cause the OS to miss all future events. * tag 'imx-fixes-4.18-4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: ARM: dts: imx6: RDU2: fix irq type for mv88e6xxx switch Signed-off-by: Olof Johansson <olof@lixom.net>
2018-07-20x86/entry/32: Check for VM86 mode in slow-path checkJoerg Roedel
The SWITCH_TO_KERNEL_STACK macro only checks for CPL == 0 to go down the slow and paranoid entry path. The problem is that this check also returns true when coming from VM86 mode. This is not a problem by itself, as the paranoid path handles VM86 stack-frames just fine, but it is not necessary as the normal code path handles VM86 mode as well (and faster). Extend the check to include VM86 mode. This also makes an optimization of the paranoid path possible. Signed-off-by: Joerg Roedel <jroedel@suse.de> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: "H . Peter Anvin" <hpa@zytor.com> Cc: linux-mm@kvack.org Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Andy Lutomirski <luto@kernel.org> Cc: Dave Hansen <dave.hansen@intel.com> Cc: Josh Poimboeuf <jpoimboe@redhat.com> Cc: Juergen Gross <jgross@suse.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Borislav Petkov <bp@alien8.de> Cc: Jiri Kosina <jkosina@suse.cz> Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com> Cc: Brian Gerst <brgerst@gmail.com> Cc: David Laight <David.Laight@aculab.com> Cc: Denys Vlasenko <dvlasenk@redhat.com> Cc: Eduardo Valentin <eduval@amazon.com> Cc: Greg KH <gregkh@linuxfoundation.org> Cc: Will Deacon <will.deacon@arm.com> Cc: aliguori@amazon.com Cc: daniel.gruss@iaik.tugraz.at Cc: hughd@google.com Cc: keescook@google.com Cc: Andrea Arcangeli <aarcange@redhat.com> Cc: Waiman Long <llong@redhat.com> Cc: Pavel Machek <pavel@ucw.cz> Cc: "David H . Gutteridge" <dhgutteridge@sympatico.ca> Cc: Arnaldo Carvalho de Melo <acme@kernel.org> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: joro@8bytes.org Link: https://lkml.kernel.org/r/1532103744-31902-3-git-send-email-joro@8bytes.org
2018-07-20Merge tag 'arc-4.18-rc6' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc Pull ARC fixes from Vineet Gupta: "ARC is back after radio silence in 4.17: - Fix CONFIG_SWAP [Alexey] - Robustify cmpxchg emulation for systems w/o atomics [Alexey / PeterZ] - Allow mprotext(PROT_EXEC) for stack mappings [Vineet] - HSDK platform enable PCIe, APG GPIO [Gustavo] - miscll other fixes, config updates etc" * tag 'arc-4.18-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc: ARCv2: [plat-hsdk]: Save accl reg pair by default ARC: mm: allow mprotect to make stack mappings executable ARC: Fix CONFIG_SWAP ARC: [arcompact] entry.S: minor code movement ARC: configs: Remove CONFIG_INITRAMFS_SOURCE from defconfigs ARC: configs: remove no longer needed CONFIG_DEVPTS_MULTIPLE_INSTANCES ARC: Improve cmpxchg syscall implementation ARC: [plat-hsdk]: Configure APB GPIO controller on ARC HSDK platform ARC: [plat-hsdk] Add PCIe support ARC: Enable machine_desc->init_per_cpu for !CONFIG_SMP ARC: Explicitly add -mmedium-calls to CFLAGS
2018-07-20Merge tag 'nds32-for-linus-4.18' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/greentime/linux Pull nds32 updates from Greentime Hu: "Bug fixes and build ixes for nds32" * tag 'nds32-for-linus-4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/greentime/linux: nds32: fix build error "relocation truncated to fit: R_NDS32_25_PCREL_RELA" when make allyesconfig nds32: To simplify the implementation of update_mmu_cache() nds32: Fix the dts pointer is not passed correctly issue. nds32: To implement these icache invalidation APIs since nds32 cores don't snoop data cache. This issue is found by Guo Ren. Based on the Documentation/core-api/cachetlb.rst and it says: nds32: Fix build error caused by configuration flag rename nds32: define __NDS32_E[BL]__ for sparse
2018-07-20MIPS: ath79: fix register address in ath79_ddr_wb_flush()Felix Fietkau
ath79_ddr_wb_flush_base has the type void __iomem *, so register offsets need to be a multiple of 4 in order to access the intended register. Signed-off-by: Felix Fietkau <nbd@nbd.name> Signed-off-by: John Crispin <john@phrozen.org> Signed-off-by: Paul Burton <paul.burton@mips.com> Fixes: 24b0e3e84fbf ("MIPS: ath79: Improve the DDR controller interface") Patchwork: https://patchwork.linux-mips.org/patch/19912/ Cc: Alban Bedel <albeu@free.fr> Cc: James Hogan <jhogan@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: linux-mips@linux-mips.org Cc: stable@vger.kernel.org # 4.2+
2018-07-20kvm: x86: vmx: fix vpid leakRoman Kagan
VPID for the nested vcpu is allocated at vmx_create_vcpu whenever nested vmx is turned on with the module parameter. However, it's only freed if the L1 guest has executed VMXON which is not a given. As a result, on a system with nested==on every creation+deletion of an L1 vcpu without running an L2 guest results in leaking one vpid. Since the total number of vpids is limited to 64k, they can eventually get exhausted, preventing L2 from starting. Delay allocation of the L2 vpid until VMXON emulation, thus matching its freeing. Fixes: 5c614b3583e7b6dab0c86356fa36c2bcbb8322a0 Cc: stable@vger.kernel.org Signed-off-by: Roman Kagan <rkagan@virtuozzo.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-07-20ARM64: dts: meson-gxl: add support for the Oranth Tanix TX3 MiniMartin Blumenstingl
The Tanix TX3 Mini is a TV box based on the Amlogic S905W chipset. There are two variants: - 1 GiB or 2 GiB of DDR3 memory - 8 GB or 16 GB eMMC flash Both variants come with: - 802.11 b/g/n wifi (Silicon Valley Microelectronics SSV6051, does not support Bluetooth) - an LED 7 segment display with an FD628 controller - HDMI and AV (CVBS) output - 2x USB (utilizing both USB ports provided by the SoC) - micro SD card slot - serial console (uart_AO) has to be soldered after opening the case The board seems to be very similar to the P23x and Q20x reference boards, which is why it includes meson-gx-p23x-q20x.dtsi: - eMMC reset routed to BOOT_9 - the SDIO wifi chip's reset line is routed to GPIOX_6 and the reference clock is 32.768KHz on PWM_E - SD card detection is routed to CARD_6 - vqmmc of all MMC controllers is hard-wired to 1.8V (VDDIO_BOOT) - uart_AO can be accessed after opening the case and soldering RX, TX and GND lines onto the exposed solder points (marked with RX, TX and GND) Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-07-20ARM64: dts: meson-gxl: add support for the S905W SoC and the P281 boardMartin Blumenstingl
S905W is a new SoC from the GXL series. It is a cost-reduced version of the S905X. The P281 development board from Amlogic uses the same layout as the P231 (S905D development board). Thus the new P281 board inherits meson-gx-p23x-q20x.dtsi to avoid code-duplication. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-07-20ARM64: dts: meson-axg: add the audio clock controllerJerome Brunet
Add the audio clock controller which is part of the audio bus This controller takes 8 input plls, and the usual clock gate, from the main clock controller. It provides the clocs for the all the devices of the audio subsystem, such as tdms, spdif, pdm, etc. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-07-20arm64: dts: Add Mediatek X20 Development Board supportManivannan Sadhasivam
Add initial device tree support for Mediatek X20 Development Board based on MT6797 Deca core SoC. This board is one of the 96Boards Consumer Edition platform. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2018-07-20KVM: vmx: use local variable for current_vmptr when emulating VMPTRSTSean Christopherson
Do not expose the address of vmx->nested.current_vmptr to kvm_write_guest_virt_system() as the resulting __copy_to_user() call will trigger a WARN when CONFIG_HARDENED_USERCOPY is enabled. Opportunistically clean up variable names in handle_vmptrst() to improve readability, e.g. vmcs_gva is misleading as the memory operand of VMPTRST is plain memory, not a VMCS. Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com> Tested-by: Peter Shier <pshier@google.com> Reviewed-by: Peter Shier <pshier@google.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-07-20ARM64: dts: meson-axg: add pdm pinsJerome Brunet
Add pdm input pin definitions to meson AXG Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-07-20ARM64: dts: meson-axg: add spdif input pinsJerome Brunet
Add spdif input pin definitions to meson AXG Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-07-20ARM64: dts: meson-axg: remove spdif out from gpio a7Jerome Brunet
Spdif out in not multiplexed on gpio A7 (spdif in is) Remove this entry to fix the problem. Fixes: 53c03b0aff36 ("ARM64: dts: meson-axg: add spdif output pins") Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-07-20ARM64: dts: meson-axg: add adc buttons the S400Jerome Brunet
Add the 6 adc buttons of the amlogic S400 Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-07-20ARM64: dts: meson-axg: remove vddio_ao18 from SoC dtsiJerome Brunet
Regulator should not be defined inside the SoC dtsi file. vddio_ao18 is already defined in the S400 board dts anyway. Fixes: bb8a2ebd0498 ("ARM64: dts: meson-axg: add saradc support") Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-07-20ARM64: dts: meson-axg: add saradc supportXingyu Chen
Add the DT info for SAR ADC of the Amlogic's Meson-AXG SoC. Signed-off-by: Xingyu Chen <xingyu.chen@amlogic.com> Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-07-20ARM64: dts: add S805X based P241 boardNeil Armstrong
The Amlogic P241 board is the Reference Design board for the S805X variant of the Amlogic Meson GXL SoC family. The P241 board has the following features : - 1GiB DDR4 Memory - HDMI Connector with CEC - A/V jack with Stereo Audio and CVBS - 10/100 Ethernet - 2x USB2.0 Type-A - On-board WiFi SDIO Module - On-board eMMC storage - Infraread Received - Factory Reset button - UART connector Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-07-20ARM64: dts: amlogic: Add missing cooling device properties for CPUsViresh Kumar
The cooling device properties, like "#cooling-cells" and "dynamic-power-coefficient", should either be present for all the CPUs of a cluster or none. If these are present only for a subset of CPUs of a cluster then things will start falling apart as soon as the CPUs are brought online in a different order. For example, this will happen because the operating system looks for such properties in the CPU node it is trying to bring up, so that it can register a cooling device. Add such missing properties. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> [khilman: s/arm64/ARM64/ in Subject] Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-07-20ARM64: dts: meson-axg: add spdif output pinsJerome Brunet
Add the different pin configurations for the spdif output Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-07-20ARM64: dts: meson-axg: add s400 speaker amplifierJerome Brunet
Add the first of the two tas5707 power amplifier present on the speaker daughter board. According to the schematics of the S400 v3, only I2SB_DIN3 and I2SC_DOUT2 will be available to the speaker board. 9R83, 9R84 and 9R18 are not connected so no audio signal will be provided to the second amplifier. There is no point in enabling it even if it is visible on the i2c bus. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-07-20ARM64: dts: meson-axg: add s400 main 12v supplyJerome Brunet
Add a fixed regulator for the main 12v which is the main power supply of the board. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-07-20ARM64: dts: meson-axg: add s400 microphone card ledsJerome Brunet
The microphone card connected to the s400 has 6 leds controlled through an additional i2c gpio controller. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-07-20ARM64: dts: meson-gxbb-nanopi-k2: Add HDMI, CEC and CVBS nodesNeil Armstrong
The Amlogic Meson GXBB based Nanopi-K2 board has an HDMI connector with CEC and CVBS available on the 40pin header. This patch adds the nodes to enable HDMI, CEC and CVBS functionnalities. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-07-20ARM64: dts: meson-gx-p23x-q20x: move the wifi node to each board's .dtsMartin Blumenstingl
meson-gx-p23x-q20x.dtsi is currently used by five boards: - Amlogic P230 and P231 (which should be identical, apart from the external RGMII PHY on P230 whereas P231 can only use the internal PHY) - Amlogic Q200 (identical to P230 but with an S912 GXM SoC instead of a GXL S905D SoC) and Q201 (identical to P231 but with an S912 GXM SoC instead of a GXL S905D SoC) - NEXBOX A1 (based on the S912 GXM SoC) The Amlogic P230 board uses a Broadcom BCM4356 SDIO wifi chip. Since the other Amlogic reference design boards are very similar it's safe to assume that these also use a Broadcom based SDIO wifi chip (which is also how it was configured in meson-gx-p23x-q20x.dtsi). However, NEXBOX A1 comes with a "longsys LTM8830" SDIO wifi module, which is based on the "Qualcomm Atheros QCA9377-3(QCA1023-0)" chipset. Thus move the wifi node from meson-gx-p23x-q20x.dtsi to each of the four Amlogic reference board's .dts files. There are no devicetree bindings for the QCA9377 SDIO wifi module yet, so nothing is added to meson-gxm-nexbox-a1.dts. Fixes: f51b454549b812 ("ARM64: dts: meson-gxm: Add support for the Nexbox A1") Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-07-20ARM64: dts: meson: enable the saradc node in meson-gx-p23x-q20x.dtsiMartin Blumenstingl
meson-gxl-s905d-p230.dts and meson-gxm-q200.dts enable the saradc node (and configure it's vref-supply "VDDIO_AO18") in their corresponding .dts file. Move both (the saradc node as well as the VDDIO_AO18 regulator) to remove some duplicate code. As a positive side-effect this enables the saradc also for the P231 (GXL S905D) and Q201 (GXM S912) development boards which are similar to the P230/Q200 boards (P231 and Q201 use the internal 100Mbit/s PHY, while P230 and Q200 have an external RGMII PHY). Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-07-20microblaze: remove consistent_sync and consistent_sync_pageChristoph Hellwig
Both unused. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-07-20microblaze: use generic dma_noncoherent_opsChristoph Hellwig
Switch to the generic noncoherent direct mapping implementation. This removes the direction-based optimizations in sync_{single,sg}_for_{cpu,device} which were marked untestested and do not match the usually very well tested {un,}map_{single,sg} implementations. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-07-20arm64: dts: renesas: r8a77980: add INTC-EX supportSergei Shtylyov
Describe the INTC-EX interrupt controller in the R8A77980 device tree. Based on the original (and large) patch by Vladimir Barinov. Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-07-20arm64: dts: renesas: r8a77990: Enable USB3.0 host for Ebisu boardYoshihiro Shimoda
This patch adds and USB3.0 host device node and enable it for R-Car E3 Ebisu board. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-07-20arm64: dts: renesas: r8a77995: Add SCIF {0,1,3,4,5} and all HSCIF device nodesTakeshi Kihara
This patch adds the device nodes for SCIF {0,1,3,4,5} and all HSCIF serial ports, incl. clocks, power domain and DMAs. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
2018-07-20ARM: shmobile: Always enable ARCH_TIMER on SoCs with A7 and/or A15Geert Uytterhoeven
R-Mobile APE6, R-Car Gen2, and RZ/G1 SoCs have Cortex-A7 and/or Cortex-A15 CPU cores, all of which have ARM architectured timers. Force use of the ARM architectured timer on these SoCs. This allows to: - Remove the calls to shmobile_init_delay() from the corresponding machine vectors, - Remove a check in timer setup specific to R-Car Gen2, - Remove a check in shmobile_init_delay(). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-07-20ARM: shmobile: r8a7779: hide unused r8a7779_platform_cpu_killArnd Bergmann
After the cleanup in r8a7779_smp_prepare_cpus(), the only remaining caller of r8a7779_platform_cpu_kill() is in an ifdef, which leads to a build warning without CONFIG_HOTPLUG_CPU: arch/arm/mach-shmobile/smp-r8a7779.c:26:12: error: 'r8a7779_platform_cpu_kill' defined but not used [-Werror=unused-function] This moves the function inside of that #ifdef to avoid the warning. Fixes: 62f55ce683e3 ("ARM: shmobile: r8a7779: Stop powering down secondary CPUs during early boot") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>