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2009-09-03OMAP3 clock: remove superfluous calls to omap2_init_clk_clkdmPaul Walmsley
omap2_init_clk_clkdm() is called as part of the chip architecture-specific initialization code, so calling it again from the struct clk init pointer just wastes cycles. Signed-off-by: Paul Walmsley <paul@pwsan.com>
2009-09-03OMAP clock: associate MPU clocks with the mpu_clkdmPaul Walmsley
All MPU-related clocks should be in the mpu_clkdm. This is needed for the upcoming omap_hwmod patches, which needs to know the clockdomain that arm_fck is in. Signed-off-by: Paul Walmsley <paul@pwsan.com>
2009-09-03OMAP3 clock: Fixed processing of bootarg 'mpurate'Sanjeev Premi
The argument 'mpurate' had no effect on the MPU frequency. This patch fixes the same. Signed-off-by: Sanjeev Premi <premi@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
2009-09-03OMAP: SDRC: Add several new register definitionsTero Kristo
Add missing SDRC register offset macros. Signed-off-by: Tero Kristo <tero.kristo@nokia.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> [paul@pwsan.com: added commit message] Signed-off-by: Paul Walmsley <paul@pwsan.com>
2009-09-03OMAP: powerdomain: Fix overflow when doing powerdomain deps lookups.Paul Walmsley
At the end of the list pd is a pointer to a NULL struct, so checking if the address == NULL doesn't help here. In fact the original code will just keep running past the struct to read who knows what in memory. This case manifests itself when from clkdms_setup() when enabling auto idle for a clock domain and the clockdomain usecount is greater than 0. When _clkdm_add_autodeps() tries to add the a dependency that does not exist in the powerdomain->wkdep_srcs array the for loop will run past the wkdep_srcs array. Currently in linux-omap you won't hit this because the not found case is never executed, unless you start modifying powerdomains and their wakeup/sleep deps. Signed-off-by: Mike Chan <mike@android.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
2009-09-03Merge branch 'amd-iommu/pagetable' into amd-iommu/2.6.32Joerg Roedel
Conflicts: arch/x86/kernel/amd_iommu.c
2009-09-03Merge branch 'amd-iommu/passthrough' into amd-iommu/2.6.32Joerg Roedel
Conflicts: arch/x86/kernel/amd_iommu.c arch/x86/kernel/amd_iommu_init.c
2009-09-03Merge branches 'gart/fixes', 'amd-iommu/fixes+cleanups' and ↵Joerg Roedel
'amd-iommu/fault-handling' into amd-iommu/2.6.32
2009-09-03x86/gart: Do not select AGP for GART_IOMMUPavel Vasilyev
There is no dependency from the gart code to the agp code. And since a lot of systems today do not have agp anymore remove this dependency from the kernel configuration. Signed-off-by: Pavel Vasilyev <pavel@pavlinux.ru> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-09-03x86/amd-iommu: Initialize passthrough mode when requestedJoerg Roedel
This patch enables the passthrough mode for AMD IOMMU by running the initialization function when iommu=pt is passed on the kernel command line. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-09-03x86/amd-iommu: Don't detach device from pt domain on driver unbindJoerg Roedel
This patch makes sure a device is not detached from the passthrough domain when the device driver is unloaded or does otherwise release the device. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-09-03x86/amd-iommu: Make sure a device is assigned in passthrough modeJoerg Roedel
When the IOMMU driver runs in passthrough mode it has to make sure that every device not assigned to an IOMMU-API domain must be put into the passthrough domain instead of keeping it unassigned. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-09-03x86/amd-iommu: Align locking between attach_device and detach_deviceJoerg Roedel
This patch makes the locking behavior between the functions attach_device and __attach_device consistent with the locking behavior between detach_device and __detach_device. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-09-03x86/amd-iommu: Fix device table write orderJoerg Roedel
The V bit of the device table entry has to be set after the rest of the entry is written to not confuse the hardware. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-09-03x86/amd-iommu: Add passthrough mode initialization functionsJoerg Roedel
When iommu=pt is passed on kernel command line the devices should run untranslated. This requires the allocation of a special domain for that purpose. This patch implements the allocation and initialization path for iommu=pt. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-09-03x86/amd-iommu: Add core functions for pd allocation/freeingJoerg Roedel
This patch factors some code of protection domain allocation into seperate functions. This way the logic can be used to allocate the passthrough domain later. As a side effect this patch fixes an unlikely domain id leakage bug. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-09-03x86/dma: Mark iommu_pass_through as __read_mostlyJoerg Roedel
This variable is read most of the time. This patch marks it as such. It also documents the meaning the this variable while at it. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-09-03x86/amd-iommu: Change iommu_map_page to support multiple page sizesJoerg Roedel
This patch adds a map_size parameter to the iommu_map_page function which makes it generic enough to handle multiple page sizes. This also requires a change to alloc_pte which is also done in this patch. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-09-03x86/amd-iommu: Support higher level PTEs in iommu_page_unmapJoerg Roedel
This patch changes fetch_pte and iommu_page_unmap to support different page sizes too. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-09-03x86/amd-iommu: Remove old page table handling macrosJoerg Roedel
These macros are not longer required. So remove them. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-09-03x86/amd-iommu: Use 2-level page tables for dma_ops domainsJoerg Roedel
The driver now supports a dynamic number of levels for IO page tables. This allows to reduce the number of levels for dma_ops domains by one because a dma_ops domain has usually an address space size between 128MB and 4G. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-09-03x86/amd-iommu: Remove bus_addr check in iommu_map_pageJoerg Roedel
The driver now supports full 64 bit device address spaces. So this check is not longer required. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-09-03x86/amd-iommu: Remove last usages of IOMMU_PTE_L0_INDEXJoerg Roedel
This change allows to remove these old macros later. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-09-03x86/amd-iommu: Change alloc_pte to support 64 bit address spaceJoerg Roedel
This patch changes the alloc_pte function to be able to map pages into the whole 64 bit address space supported by AMD IOMMU hardware from the old limit of 2**39 bytes. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-09-03x86/amd-iommu: Introduce increase_address_space functionJoerg Roedel
This function will be used to increase the address space size of a protection domain. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-09-03x86/amd-iommu: Flush domains if address space size was increasedJoerg Roedel
Thist patch introduces the update_domain function which propagates the larger address space of a protection domain to the device table and flushes all relevant DTEs and the domain TLB. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-09-03x86/amd-iommu: Introduce set_dte_entry functionJoerg Roedel
This function factors out some logic of attach_device to a seperate function. This new function will be used to update device table entries when necessary. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-09-03x86/amd-iommu: Add a gneric version of amd_iommu_flush_all_devicesJoerg Roedel
This patch adds a generic variant of amd_iommu_flush_all_devices function which flushes only the DTEs for a given protection domain. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-09-03x86/amd-iommu: Use fetch_pte in amd_iommu_iova_to_physJoerg Roedel
Don't reimplement the page table walker in this function. Use the generic one. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-09-03x86/amd-iommu: Use fetch_pte in iommu_unmap_pageJoerg Roedel
Instead of reimplementing existing logic use fetch_pte to walk the page table in iommu_unmap_page. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-09-03x86/amd-iommu: Make fetch_pte aware of dynamic mapping levelsJoerg Roedel
This patch changes the fetch_pte function in the AMD IOMMU driver to support dynamic mapping levels. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-09-03x86/amd-iommu: Reset command buffer if wait loop failsJoerg Roedel
Instead of a panic on an comletion wait loop failure, try to recover from that event from resetting the command buffer. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-09-03x86/amd-iommu: Panic if IOMMU command buffer reset failsJoerg Roedel
To prevent the driver from doing recursive command buffer resets, just panic when that recursion happens. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-09-03x86/amd-iommu: Reset command buffer on ILLEGAL_COMMAND_ERRORJoerg Roedel
On an ILLEGAL_COMMAND_ERROR the IOMMU stops executing further commands. This patch changes the code to handle this case better by resetting the command buffer in the IOMMU. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-09-03x86/amd-iommu: Add reset function for command buffersJoerg Roedel
This patch factors parts of the command buffer initialization code into a seperate function which can be used to reset the command buffer later. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-09-03x86/amd-iommu: Add function to flush all DTEs on one IOMMUJoerg Roedel
This function flushes all DTE entries on one IOMMU for all devices behind this IOMMU. This is required for command buffer resetting later. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-09-03x86/amd-iommu: fix broken check in amd_iommu_flush_all_devicesJoerg Roedel
The amd_iommu_pd_table is indexed by protection domain number and not by device id. So this check is broken and must be removed. Cc: stable@kernel.org Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-09-03x86/amd-iommu: Remove redundant 'IOMMU' stringJoerg Roedel
The 'IOMMU: ' prefix is not necessary because the DUMP_printk macro already prints its own prefix. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-09-03x86/amd-iommu: replace "AMD IOMMU" by "AMD-Vi"Joerg Roedel
This patch replaces the "AMD IOMMU" printk strings with the official name for the hardware: "AMD-Vi". Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-09-03x86/amd-iommu: Remove some merge helper codeJoerg Roedel
This patch removes some left-overs which where put into the code to simplify merging code which also depends on changes in other trees. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-09-03x86/amd-iommu: Introduce function for iommu-local domain flushJoerg Roedel
This patch introduces a function to flush all domain tlbs for on one given IOMMU. This is required later to reset the command buffer on one IOMMU. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-09-03x86/amd-iommu: Dump illegal command on ILLEGAL_COMMAND_ERRORJoerg Roedel
This patch adds code to dump the command which caused an ILLEGAL_COMMAND_ERROR raised by the IOMMU hardware. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-09-03x86/amd-iommu: Dump fault entry on DTE errorJoerg Roedel
This patch adds code to dump the content of the device table entry which caused an ILLEGAL_DEV_TABLE_ENTRY error from the IOMMU hardware. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-09-03sparc64: Kill spurious NMI watchdog triggers by increasing limit to 30 seconds.David S. Miller
This is a compromise and a temporary workaround for bootup NMI watchdog triggers some people see with qla2xxx devices present. This happens when, for example: CPU 0 is in the driver init and looping submitting mailbox commands to load the firmware, then waiting for completion. CPU 1 is receiving the device interrupts. CPU 1 is where the NMI watchdog triggers. CPU 0 is submitting mailbox commands fast enough that by the time CPU 1 returns from the device interrupt handler, a new one is pending. This sequence runs for more than 5 seconds. The problematic case is CPU 1's timer interrupt running when the barrage of device interrupts begin. Then we have: timer interrupt return for softirq checking pending, thus enable interrupts qla2xxx interrupt return qla2xxx interrupt return ... 5+ seconds pass final qla2xxx interrupt for fw load return run timer softirq return At some point in the multi-second qla2xxx interrupt storm we trigger the NMI watchdog on CPU 1 from the NMI interrupt handler. The timer softirq, once we get back to running it, is smart enough to run the timer work enough times to make up for the missed timer interrupts. However, the NMI watchdogs (both x86 and sparc) use the timer interrupt count to notice the cpu is wedged. But in the above scenerio we'll receive only one such timer interrupt even if we last all the way back to running the timer softirq. The default watchdog trigger point is only 5 seconds, which is pretty low (the softwatchdog triggers at 60 seconds). So increase it to 30 seconds for now. Signed-off-by: David S. Miller <davem@davemloft.net>
2009-09-03sh: Fix up and optimize the kmap_coherent() interface.Paul Mundt
This fixes up the kmap_coherent/kunmap_coherent() interface for recent changes both in the page fault path and the shared cache flushers, as well as adding in some optimizations. One of the key things to note here is that the TLB flush itself is deferred until the unmap, and the call in to update_mmu_cache() itself goes away, relying on the regular page fault path to handle the lazy dcache writeback if necessary. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-09-03perf_counter/powerpc: Fix cache event codes for POWER7Paul Mackerras
I had the codes for L1 D-cache load accesses and misses swapped around, and the wrong codes for LL-cache accesses and misses. This corrects them. Reported-by: Corey Ashford <cjashfor@linux.vnet.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: <stable@kernel.org> LKML-Reference: <19103.8514.709300.585484@cargo.ozlabs.ibm.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-09-02Merge branch 'pm-upstream/debug' of ↵Tony Lindgren
git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm into for-next
2009-09-02OMAP: PM: Added suspend target state control to debugfs for OMAP3Tero Kristo
Target state can be read / programmed via files under: [debugfs]/pm_debug/[pwrdm]/suspend Signed-off-by: Tero Kristo <tero.kristo@nokia.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-09-02OMAP: PM debug: Add PRCM register dump supportTero Kristo
Allows dumping out current register contents from the debug filesystem, and also allows user to add arbitrary register save points into code. Current register contents are available under debugfs at: [debugfs]/pm_debug/registers/current To add a save point, do following: From module init (or somewhere before the save call, called only once): pm_dbg_init_regset(n); // n=1..4, allocates memory for dump area #n From arbitrary code location: pm_dbg_regset_save(n); // n=1..4, saves registers to dump area #n After this, the register dump can be seen under [debugfs]/pm_debug/registers/n Signed-off-by: Tero Kristo <tero.kristo@nokia.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-09-02OMAP: PM debug: make powerdomains use PM-debug countersPeter 'p2' De Schrijver
Make the powerdomain code call the new hook for updating the time. Also implement the updated pwrdm_for_each. Signed-off-by: Peter 'p2' De Schrijver <peter.de-schrijver@nokia.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>