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2019-04-09ARM: dts: Add l4 abe interconnect hierarchy and ti-sysc data for omap5Tony Lindgren
We can now add l4 abe interconnect hierarchy and ti-sysc data with ti-sysc driver supporting external optional clocks needed by mcpdm. This data is generated based on platform data from a booted system and the interconnect acces protection registers for ranges. To avoid regressions, we initially validate the device tree provided data against the existing platform data on boot. Note that mcpdm we now need to enable at module level only for devices that have the external pdmclk wired from the PMIC as the clock is needed for the module to be accessible. Also note that abe seems to be the same as on omap4 except for domains and clocks and we may be able to combine the l4 abe data later on. But let's play it safe and just initially use what we have already defined in the platform data. Cc: devicetree@vger.kernel.org Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-09ARM: dts: Add l4 abe interconnect hierarchy and ti-sysc data for omap4Tony Lindgren
We can now add l4 abe interconnect hierarchy and ti-sysc data with ti-sysc driver supporting external optional clocks needed by mcpdm. This data is generated based on platform data from a booted system and the interconnect acces protection registers for ranges. To avoid regressions, we initially validate the device tree provided data against the existing platform data on boot. Note that mcpdm we now need to enable at module level only for devices that have the external pdmclk wired from the PMIC as the clock is needed for the module to be accessible. Cc: devicetree@vger.kernel.org Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-09ARM: dts: Add common mcpdm dts file for omap4Tony Lindgren
The mcpdm module found on omap4 and 5 needs pdmclk clock from the pmic that may or may not be wired. Without this clock we cannot read the registers for mcpdm at all. For the external mcpdm clock to work, it needs to be muxed at the module level for ti-sysc driver probe to mux it early enough for probe. Let's set up a common file for it to make things a bit easier to make l4 abe interconnect to probe with ti-sysc driver. Note that this is not needed for omap5 as we can just update mcpdm muxing in omap5-board-common.dtsi in later patches. Cc: devicetree@vger.kernel.org Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-09ARM: OMAP2+: sleep43xx: Run EMIF HW leveling on resume pathDave Gerlach
When returning from DeepSleep mode on AM437x platforms the EMIF must run DDR hardware leveling, same as done during u-boot, to properly restore the EMIF PHY to it's operational state on platforms using DDR3. Call the ti-emif-sram-pm run_hw_leveling routine to perform this. This happens after all other EMIF values are restored so the exact same configuration used at boot is used at the end of EMIF resume as well. Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-09ARM: dts: omap2420-n810: Use new CODEC reset pin nameAndrew F. Davis
The correct DT property for specifying a GPIO used for reset is "reset-gpios", the driver now accepts this name, use it here. Signed-off-by: Andrew F. Davis <afd@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-09ARM: OMAP2+: pm33xx-core: Do not Turn OFF CEFUSE as PPA may be using itKabir Sahane
This area is used to store keys by HSPPA in case of AM438x SOC. Leave it active. Signed-off-by: Kabir Sahane <x0153567@ti.com> Signed-off-by: Andrew F. Davis <afd@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-09ARM: OMAP2+: Wakeupgen: AM43xx HS devices should save context like non-HSAndrew F. Davis
Unlike some previous generation devices, AM43xx HS IRQ and Wakegen context is handled by the ROM for us, and no secure service call is needed or supported. Non-GP AM43xx devices should take the same path as GP. Signed-off-by: Andrew F. Davis <afd@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-09ARM: dts: am43xx-epos-evm: Add matrix keypad as wakeup sourceAndrew F. Davis
Mark matrix-keypad as a wakeup source. Signed-off-by: Andrew F. Davis <afd@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-09ARM: dts: am43xx-epos-evm: Keep DCDC3 regulator on in suspend to memoryMike Erdahl
When going to suspend to ram mode (or rtc-only mode), the DDR regulator must be told to stay on, else this rail will go down when the PMIC_EN signal is deasserted. Signed-off-by: Mike Erdahl <m-erdahl@ti.com> Signed-off-by: Andrew F. Davis <afd@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-09ARM: dts: am43xx-epos-evm: Keep DCDC5 and DCDC6 always onKabir Sahane
These regulator outputs are needed even in deep sleep modes to prevent low-voltage detection events. Make these always ON to avoid this. Signed-off-by: Kabir Sahane <x0153567@ti.com> Signed-off-by: Andrew F. Davis <afd@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-09ARM: dts: dra7: Add properties to enable PCIe x2 lane modeKishon Vijay Abraham I
ti,syscon-lane-sel and ti,syscon-lane-conf properties specific to enable PCIe x2 lane mode are added here. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-09ARM: tegra: Add firmware calls required for suspend-resume on Tegra30Dmitry Osipenko
In order to suspend-resume CPU with Trusted Foundations firmware being present on Tegra30, the LP1/LP2 boot vectors and CPU caches need to be set up using the firmware calls and then suspend code shall avoid re-disabling parts that were disabled by the firmware. Tested-by: Robert Yang <decatf@gmail.com> Tested-by: Michał Mirosław <mirq-linux@rere.qmqm.pl> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-04-09ARM: tegra: Always boot CPU in ARM-modeDmitry Osipenko
CPU always jumps into reset handler in ARM-mode from the Trusted Foundations firmware, hence let's make CPU to always jump into kernel in ARM-mode regardless of the firmware presence. This is required to make Thumb-2 kernel working with the Trusted Foundations firmware on Tegra30. Tested-by: Robert Yang <decatf@gmail.com> Tested-by: Michał Mirosław <mirq-linux@rere.qmqm.pl> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-04-09ARM: tegra: Don't apply CPU erratas in insecure modeDmitry Osipenko
CPU isn't allowed to touch secure registers while running under secure monitor. Hence skip applying of CPU erratas in the reset handler if Trusted Foundations firmware presents. Partially based on work done by Michał Mirosław [1]. [1] https://www.spinics.net/lists/arm-kernel/msg594768.html Tested-by: Robert Yang <decatf@gmail.com> Tested-by: Michał Mirosław <mirq-linux@rere.qmqm.pl> Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-04-09ARM: tegra: Set up L2 cache using Trusted Foundations firmwareDmitry Osipenko
On Tegra30 L2 cache should be initialized using firmware call if CPU is running in insecure mode. Set up the required outer-cache write_sec() callback early during boot using the firmware API, it is always a NO-OP on T114+ and is NO-OP on T20/30 if Trusted Foundations firmware node isn't present in device-tree. Tested-by: Robert Yang <decatf@gmail.com> Tested-by: Michał Mirosław <mirq-linux@rere.qmqm.pl> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-04-09ARM: trusted_foundations: Provide information about whether firmware is ↵Dmitry Osipenko
registered Add a helper that provides information about whether Trusted Foundations firmware operations have been registered. Tested-by: Robert Yang <decatf@gmail.com> Tested-by: Michał Mirosław <mirq-linux@rere.qmqm.pl> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-04-09ARM: trusted_foundations: Make prepare_idle call to take mode argumentDmitry Osipenko
The Trusted Foundations firmware call varies depending on the required suspend-mode. Make the firmware API to take the mode argument in order to expose all of the modes to firmware user. Tested-by: Robert Yang <decatf@gmail.com> Tested-by: Michał Mirosław <mirq-linux@rere.qmqm.pl> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-04-09ARM: trusted_foundations: Support L2 cache maintenanceDmitry Osipenko
Implement L2 cache initialization firmware callback that should be invoked early during boot in order to set up the required outer cache driver's callbacks and add the callback required for L2X0 maintenance. Partially based on work done by Michał Mirosław [1]. [1] https://www.spinics.net/lists/arm-kernel/msg594765.html Tested-by: Robert Yang <decatf@gmail.com> Tested-by: Michał Mirosław <mirq-linux@rere.qmqm.pl> Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-04-09ARM: exynos: Fix infinite loops on CPU powerup failureMarek Szyprowski
Add timeout to infinite loops during the CPU powerup procedures. It is better to report an error instead of busylooping for infinite time in case of failure. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-04-09treewide: Switch printk users from %pf and %pF to %ps and %pS, respectivelySakari Ailus
%pF and %pf are functionally equivalent to %pS and %ps conversion specifiers. The former are deprecated, therefore switch the current users to use the preferred variant. The changes have been produced by the following command: git grep -l '%p[fF]' | grep -v '^\(tools\|Documentation\)/' | \ while read i; do perl -i -pe 's/%pf/%ps/g; s/%pF/%pS/g;' $i; done And verifying the result. Link: http://lkml.kernel.org/r/20190325193229.23390-1-sakari.ailus@linux.intel.com Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Cc: linux-arm-kernel@lists.infradead.org Cc: sparclinux@vger.kernel.org Cc: linux-um@lists.infradead.org Cc: xen-devel@lists.xenproject.org Cc: linux-acpi@vger.kernel.org Cc: linux-pm@vger.kernel.org Cc: drbd-dev@lists.linbit.com Cc: linux-block@vger.kernel.org Cc: linux-mmc@vger.kernel.org Cc: linux-nvdimm@lists.01.org Cc: linux-pci@vger.kernel.org Cc: linux-scsi@vger.kernel.org Cc: linux-btrfs@vger.kernel.org Cc: linux-f2fs-devel@lists.sourceforge.net Cc: linux-mm@kvack.org Cc: ceph-devel@vger.kernel.org Cc: netdev@vger.kernel.org Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Acked-by: David Sterba <dsterba@suse.com> (for btrfs) Acked-by: Mike Rapoport <rppt@linux.ibm.com> (for mm/memblock.c) Acked-by: Bjorn Helgaas <bhelgaas@google.com> (for drivers/pci) Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Signed-off-by: Petr Mladek <pmladek@suse.com>
2019-04-09arm64: dts: allwinner: h6: Add Orange Pi 3 DTSOndrej Jirman
Orange Pi 3 is a H6 based SBC made by Xulong, released in January 2019. It has the following features: - Allwinner H6 quad-core 64-bit ARM Cortex-A53 - GPU Mali-T720 - 1GB or 2GB LPDDR3 RAM - AXP805 PMIC - AP6256 Wifi/BT 5.0 - USB 2.0 host port (A) - USB 2.0 micro usb, OTG - USB 3.0 Host + 4 port USB hub (GL3510) - Gigabit Ethernet (Realtek RTL8211E phy) - HDMI 2.0 port - soldered eMMC (optional) - 3x LED (one is on the bottom) - microphone - audio jack - PCIe Add basic support for the board. Signed-off-by: Ondrej Jirman <megous@megous.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-04-09arm64: Save and restore OSDLR_EL1 across suspend/resumeJean-Philippe Brucker
When the CPU comes out of suspend, the firmware may have modified the OS Double Lock Register. Save it in an unused slot of cpu_suspend_ctx, and restore it on resume. Cc: <stable@vger.kernel.org> Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
2019-04-09arm64: Clear OSDLR_EL1 on CPU bootJean-Philippe Brucker
Some firmwares may reboot CPUs with OS Double Lock set. Make sure that it is unlocked, in order to use debug exceptions. Cc: <stable@vger.kernel.org> Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
2019-04-09arm64: mm: Consolidate early page table allocationWill Deacon
The logic for early allocation of page tables is duplicated between pgd_kernel_pgtable_alloc() and pgd_pgtable_alloc(). Drop the duplication by calling one from the other and renaming pgd_kernel_pgtable_alloc() accordingly. Signed-off-by: Will Deacon <will.deacon@arm.com>
2019-04-09arm64: mm: enable per pmd page table lockYu Zhao
Switch from per mm_struct to per pmd page table lock by enabling ARCH_ENABLE_SPLIT_PMD_PTLOCK. This provides better granularity for large system. I'm not sure if there is contention on mm->page_table_lock. Given the option comes at no cost (apart from initializing more spin locks), why not enable it now. We only do so when pmd is not folded, so we don't mistakenly call pgtable_pmd_page_ctor() on pud or p4d in pgd_pgtable_alloc(). Signed-off-by: Yu Zhao <yuzhao@google.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
2019-04-09KVM: ARM: Remove pgtable page standard functions from stage-2 page tablesAnshuman Khandual
ARM64 standard pgtable functions are going to use pgtable_page_[ctor|dtor] or pgtable_pmd_page_[ctor|dtor] constructs. At present KVM guest stage-2 PUD|PMD|PTE level page tabe pages are allocated with __get_free_page() via mmu_memory_cache_alloc() but released with standard pud|pmd_free() or pte_free_kernel(). These will fail once they start calling into pgtable_ [pmd]_page_dtor() for pages which never originally went through respective constructor functions. Hence convert all stage-2 page table page release functions to call buddy directly while freeing pages. Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Acked-by: Yu Zhao <yuzhao@google.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
2019-04-09arm64: mm: don't call page table ctors for init_mmYu Zhao
init_mm doesn't require page table lock to be initialized at any level. Add a separate page table allocator for it, and the new one skips page table ctors. The ctors allocate memory when ALLOC_SPLIT_PTLOCKS is set. Not calling them avoids memory leak in case we call pte_free_kernel() on init_mm. Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Yu Zhao <yuzhao@google.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
2019-04-09arm64: mm: use appropriate ctors for page tablesYu Zhao
For pte page, use pgtable_page_ctor(); for pmd page, use pgtable_pmd_page_ctor(); and for the rest (pud, p4d and pgd), don't use any. For now, we don't select ARCH_ENABLE_SPLIT_PMD_PTLOCK and pgtable_pmd_page_ctor() is a nop. When we do in patch 3, we make sure pmd is not folded so we won't mistakenly call pgtable_pmd_page_ctor() on pud or p4d. Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Yu Zhao <yuzhao@google.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
2019-04-09arm64: debug: Clean up brk_handler()Will Deacon
brk_handler() now looks pretty strange and can be refactored to drop its funny 'handler_found' local variable altogether. Reviewed-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
2019-04-09arm64: probes: Move magic BRK values into brk-imm.hWill Deacon
kprobes and uprobes reserve some BRK immediates for installing their probes. Define these along with the other reservations in brk-imm.h and rename the ESR definitions to be consistent with the others that we already have. Reviewed-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
2019-04-09arm64: debug: Remove redundant user_mode(regs) checks from debug handlersWill Deacon
Now that the debug hook dispatching code takes the triggering exception level into account, there's no need for the hooks themselves to poke around with user_mode(regs). Reviewed-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
2019-04-09arm64: kprobes: Avoid calling kprobes debug handlers explicitlyWill Deacon
Kprobes bypasses our debug hook registration code so that it doesn't get tangled up with recursive debug exceptions from things like lockdep: http://lists.infradead.org/pipermail/linux-arm-kernel/2015-February/324385.html However, since then, (a) the hook list has become RCU protected and (b) the kprobes hooks were found not to filter out exceptions from userspace correctly. On top of that, the step handler is invoked directly from single_step_handler(), which *does* use the debug hook list, so it's clearly not the end of the world. For now, have kprobes use the debug hook registration API like everybody else. We can revisit this in the future if this is found to limit coverage significantly. Reviewed-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
2019-04-09arm64: debug: Separate debug hooks based on target exception levelWill Deacon
Mixing kernel and user debug hooks together is highly error-prone as it relies on all of the hooks to figure out whether the exception came from kernel or user, and then to act accordingly. Make our debug hook code a little more robust by maintaining separate hook lists for user and kernel, with separate registration functions to force callers to be explicit about the exception levels that they care about. Reviewed-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
2019-04-09arm64: debug: Remove meaningless commentWill Deacon
The comment next to the definition of our 'break_hook' list head is at best wrong but mainly just meaningless. Rip it out. Reviewed-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
2019-04-09arm64: debug: Rename addr parameter for non-watchpoint exception hooksWill Deacon
Since the 'addr' parameter contains an UNKNOWN value for non-watchpoint debug exceptions, rename it to 'unused' for those hooks so we don't get tempted to use it in the future. Reviewed-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
2019-04-09arm64: debug: Remove unused return value from do_debug_exception()Will Deacon
do_debug_exception() goes out of its way to return a value that isn't ever used, so just make the thing void. Reviewed-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
2019-04-09arm64: Makefile: Replace -pg with CC_FLAGS_FTRACETorsten Duwe
In preparation for arm64 supporting ftrace built on other compiler options, let's have the arm64 Makefiles remove the $(CC_FLAGS_FTRACE) flags, whatever these may be, rather than assuming '-pg'. There should be no functional change as a result of this patch. Reviewed-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Torsten Duwe <duwe@suse.de> Signed-off-by: Will Deacon <will.deacon@arm.com>
2019-04-09ACPICA: Rename nameseg compare macro for clarityBob Moore
ACPICA commit 92ec0935f27e217dff0b176fca02c2ec3d782bb5 ACPI_COMPARE_NAME changed to ACPI_COMPARE_NAMESEG This clarifies (1) this is a compare on 4-byte namesegs, not a generic compare. Improves understanding of the code. Link: https://github.com/acpica/acpica/commit/92ec0935 Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2019-04-09ARM: dts: sun8i: a83t: Add I2C2 pinmux setting for PE pinsChen-Yu Tsai
I2C2 is available on the PE pingroup, on the same pins as the camera sensor interface (CSI) controller's camera control interface pins. This provides an option to use I2C2 instead of that control interface to configure camera sensors. Add a pinctrl node for it. The property /omit-if-no-ref/ is added to keep the device tree blob size down if it is unused. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-04-09arm64: dts: allwinner: h6: Introduce Beelink GS1 boardClément Péron
Beelink GS1 is an Allwinner H6 based TV box, which support: - Allwinner H6 Quad-core 64-bit ARM Cortex-A53 - GPU Mali-T720 - 2GB LPDDR3 RAM - AXP805 PMIC - 1Gbps GMAC via RTL8211E - FN-Link 6222B-SRB Wifi/BT - 1x USB 2.0 Host and 1x USB 3.0 Host - HDMI port - S/PDIF Tx - IR receiver - 5V/2A DC power supply Signed-off-by: Clément Péron <peron.clem@gmail.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-04-09arm64: dts: allwinner: h6: move MMC pinctrl to dtsiClément Péron
There is only one pinmuxing available for each MMC controller. Move the pinctrl to the SOC Signed-off-by: Clément Péron <peron.clem@gmail.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-04-09ARM: dts: sun8i: tbs-a711: Add support for volume keys inputOndrej Jirman
TBS A711 tablet has volume up/down keys connected to r_lradc. Add support for these keys. Signed-off-by: Ondrej Jirman <megous@megous.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-04-09ARM: dts: sunxi: Add R_LRADC support for A83TZiping Chen
Allwinner A83T SoC has a low res adc like the one in Allwinner A10 SoC. Now the driver has been modified to support it. Add support for it. Signed-off-by: Ziping Chen <techping.chan@gmail.com> Signed-off-by: Ondrej Jirman <megous@megous.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-04-08Merge tag 'xtensa-20190408' of git://github.com/jcmvbkbc/linux-xtensaLinus Torvalds
Pull xtensa fixes from Max Filippov: - fix syscall number passed to trace_sys_exit - fix syscall number initialization in start_thread - fix level interpretation in the return_address - fix format string warning in init_pmd * tag 'xtensa-20190408' of git://github.com/jcmvbkbc/linux-xtensa: xtensa: fix format string warning in init_pmd xtensa: fix return_address xtensa: fix initialization of pt_regs::syscall in start_thread xtensa: use actual syscall number in do_syscall_trace_leave
2019-04-08ARM: OMAP2+: pm33xx: Add support for rtc+ddr in self refresh modeKeerthy
Add support for rtc+ddr in self refresh mode. Add addtional pm hooks for save/restore and rtc suspend/resume. Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-08ARM: OMAP2+: Drop mcspi platform data for omap4Tony Lindgren
We can now drop legacy platform data one interconnect target module at a time in favor of the device tree based data that has been added earlier. Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-08ARM: OMAP2+: Drop uart platform data for dra7Tony Lindgren
We can now drop legacy platform data one interconnect target module at a time in favor of the device tree based data that has been added earlier. Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-08ARM: OMAP2+: Drop gpio platform data for dra7Tony Lindgren
We can now drop legacy platform data one interconnect target module at a time in favor of the device tree based data that has been added earlier. Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-08ARM: OMAP2+: Drop i2c platform data for dra7Tony Lindgren
We can now drop legacy platform data one interconnect target module at a time in favor of the device tree based data that has been added earlier. Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-08ARM: OMAP2+: Drop mmc platform data for dra7Tony Lindgren
We can now drop legacy platform data one interconnect target module at a time in favor of the device tree based data that has been added earlier. Signed-off-by: Tony Lindgren <tony@atomide.com>