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2017-03-31ARM: at91: pm: Move global variables into at91_pm_dataAlexandre Belloni
Instead of having separate global variables to hold IP addresses, move them to struct at91_pm_data. Acked-by: Wenyou Yang <wenyou.yang@atmel.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2017-03-31ARM: at91: pm: Move at91_ramc_read/write to pm.cAlexandre Belloni
Those macros are only used in pm.c, move them there so we can remove the test on __ASSEMBLY__. Acked-by: Wenyou Yang <wenyou.yang@atmel.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2017-03-31ARM: at91: pm: Cleanup headersAlexandre Belloni
Remove unnecessary header inclusions and reorder the remaining ones. Acked-by: Wenyou Yang <wenyou.yang@atmel.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2017-03-31x86/mm: Make in_compat_syscall() work during execDmitry Safonov
The x86 mmap() code selects the mmap base for an allocation depending on the bitness of the syscall. For 64bit sycalls it select mm->mmap_base and for 32bit mm->mmap_compat_base. On execve the registers of the task invoking exec() are copied to the child pt_regs. So child->pt_regs->orig_ax contains the execve syscall number of the parent. exec() calls mmap() which in turn uses in_compat_syscall() to check whether the mapping is for a 32bit or a 64bit task. The decision is made on the following criteria: ia32 child->thread.status & TS_COMPAT x32 child->pt_regs.orig_ax & __X32_SYSCALL_BIT ia64 !ia32 && !x32 child->thread.status is corretly set up in set_personality_*(), but the syscall number in child->pt_regs.orig_ax is left unmodified. Therefore the parent/child combinations work or fail in the following way: Parent Child Child->thread_status child->pt_regs.orig_ax in_compat() Works ia64 ia64 TS_COMPAT == 0 __X32_SYSCALL_BIT == 0 false Y ia64 ia32 TS_COMPAT == 1 __X32_SYSCALL_BIT == 0 true Y ia64 x32 TS_COMPAT == 0 __X32_SYSCALL_BIT == 0 false N ia32 ia64 TS_COMPAT == 0 __X32_SYSCALL_BIT == 0 false Y ia32 ia32 TS_COMPAT == 1 __X32_SYSCALL_BIT == 0 true Y ia32 x32 TS_COMPAT == 0 __X32_SYSCALL_BIT == 0 false N x32 ia64 TS_COMPAT == 0 __X32_SYSCALL_BIT == 1 true N x32 ia32 TS_COMPAT == 1 __X32_SYSCALL_BIT == 1 true Y x32 x32 TS_COMPAT == 0 __X32_SYSCALL_BIT == 1 true Y Make set_personality_*() store the syscall number incl. __X32_SYSCALL_BIT which corresponds to the newly started ELF executable in the childs pt_regs, i.e. pretend that the exec was invoked from a task with the same executable format. So both thread.status and pt_regs.orig_ax correspond to the new ELF format and in_compat_syscall() returns the correct result. [ tglx: Rewrote changelog ] Fixes: commit 1b028f784e8c ("x86/mm: Introduce mmap_compat_base() for 32-bit mmap()") Reported-by: Adam Borowski <kilobyte@angband.pl> Suggested-by: H. Peter Anvin <hpa@zytor.com> Suggested-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Dmitry Safonov <dsafonov@virtuozzo.com> Cc: 0x7f454c46@gmail.com Cc: linux-mm@kvack.org Cc: Andrei Vagin <avagin@gmail.com> Cc: Andy Lutomirski <luto@kernel.org> Cc: Cyrill Gorcunov <gorcunov@openvz.org> Cc: Borislav Petkov <bp@suse.de> Cc: "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> Link: http://lkml.kernel.org/r/20170331111137.28170-1-dsafonov@virtuozzo.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2017-03-31ARM: configs: Add new config fragment to change RAM start pointAlexandre TORGUE
Add a new fragment to over-ride the RAM start point to 0xd0000000. Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
2017-03-31ARM: configs: stm32: Add I2C supportM'boumba Cedric Madianga
This patch adds I2C support for STM32 default configuration Signed-off-by: M'boumba Cedric Madianga <cedric.madianga@gmail.com> Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
2017-03-31powerpc/mm/hash: Increase VA range to 128TBAneesh Kumar K.V
We update the hash linux page table layout such that we can support 512TB. But we limit the TASK_SIZE to 128TB. We can switch to 128TB by default without conditional because that is the max virtual address supported by other architectures. We will later add a mechanism to on-demand increase the application's effective address range to 512TB. Having the page table layout changed to accommodate 512TB makes testing large memory configuration easier with less code changes to kernel Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2017-03-31powerpc/mm/hash: Convert mask to unsigned longAneesh Kumar K.V
This doesn't have any functional change. But helps in avoiding mistakes in case the shift bit changes Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2017-03-31powerpc/mm/hash: Support 68 bit VAAneesh Kumar K.V
Inorder to support large effective address range (512TB), we want to increase the virtual address bits to 68. But we do have platforms like p4 and p5 that can only do 65 bit VA. We support those platforms by limiting context bits on them to 16. The protovsid -> vsid conversion is verified to work with both 65 and 68 bit va values. I also documented the restrictions in a table format as part of code comments. Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2017-03-31powerpc/mm/hash: Check for non-kernel address in get_kernel_vsid()Michael Ellerman
get_kernel_vsid() has a very stern comment saying that it's only valid for kernel addresses, but there's nothing in the code to enforce that. Rather than hoping our callers are well behaved, add a check and return a VSID of 0 (invalid). Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2017-03-31powerpc/mm/hash: Use context ids 1-4 for the kernelAneesh Kumar K.V
Currently we use the top 4 context ids (0x7fffc-0x7ffff) for the kernel. Kernel VSIDs are built using these top context values and effective the segement ID. In subsequent patches we want to increase the max effective address to 512TB. We will achieve that by increasing the effective segment IDs there by increasing virtual address range. We will be switching to a 68bit virtual address in the following patch. But platforms like Power4 and Power5 only support a 65 bit virtual address. We will handle that by limiting the context bits to 16 instead of 19 on those platforms. That means the max context id will have a different value on different platforms. So that we don't have to deal with the kernel context ids changing between different platforms, move the kernel context ids down to use context ids 1-4. We can't use segment 0 of context-id 0, because that maps to VSID 0, which we want to keep as invalid, so we avoid context-id 0 entirely. Similarly we can't use the last segment of the maximum context, so we avoid it too. Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> [mpe: Switch from 0-3 to 1-4 so VSID=0 remains invalid] Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2017-03-31powerpc/mm: Split radix vs hash mm context initialisationMichael Ellerman
Complete the split of the radix vs hash mm context initialisation. This is mostly code movement, with the exception that we now limit the context allocation to PRTB_ENTRIES - 1 on radix. Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2017-03-31powerpc/mm/hash: Pull hash constants into hash__alloc_context_id()Michael Ellerman
The min and max context id values used in alloc_context_id() are currently the right values for use on hash, and happen to also be safe for use on radix. But we need to change that in a subsequent patch, so make the min/max ids parameters and pull the hash values into hsah__alloc_context_id(). Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2017-03-31powerpc/mm/hash: Abstract context id allocation for KVMMichael Ellerman
KVM wants to be able to allocate an MMU context id, which it does currently by calling __init_new_context(). We're about to rework that code, so provide a wrapper for KVM so it can not worry about the details. Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2017-03-31powerpc/mm/slice: Update slice mask printing to use bitmap printing.Aneesh Kumar K.V
We now get output like below which is much better. [ 0.935306] good_mask low_slice: 0-15 [ 0.935360] good_mask high_slice: 0-511 Compared to [ 0.953414] good_mask:1111111111111111 - 1111111111111......... I also fixed an error with slice_dbg printing. Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2017-03-31powerpc/mm/slice: Move slice_mask struct definition to slice.cAneesh Kumar K.V
This structure definition need not be in a header since this is used only by slice.c file. So move it to slice.c. This also allow us to use SLICE_NUM_HIGH instead of 64. I also switch the low_slices type to u64 from u16. This doesn't have an impact on size of struct due to padding added with u16 type. This helps in using bitmap printing function for printing slice mask. Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2017-03-31powerpc/mm: Remove checks that TASK_SIZE_USER64 is too smallAneesh Kumar K.V
Remove the checks that TASK_SIZE_USER64 is smaller than H_PGTABLE_RANGE and USER_VSID_RANGE. In a following patch we will deliberately add support for a TASK_SIZE smaller than both ranges, so this will no longer be an error condition. Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> [mpe: Keep the check in pgtable_64.c that we don't exceed USER_VSID_RANGE] Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2017-03-31powerpc/mm: Move copy_mm_to_paca to paca.cAneesh Kumar K.V
We also update the function arg to struct mm_struct. Move this so that function finds the definition of struct mm_struct. No functional change in this patch. Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2017-03-31powerpc/mm/slice: Update the function prototypeAneesh Kumar K.V
This avoid copying the slice_mask struct as function return value Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2017-03-31powerpc/mm/slice: Convert slice_mask high slice to a bitmapAneesh Kumar K.V
In followup patch we want to increase the va range which will result in us requiring high_slices to have more than 64 bits. To enable this convert high_slices to bitmap. We keep the number bits same in this patch and later change that to higher value Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> [mpe: Fold in fix to use bitmap_empty()] Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2017-03-31powerpc/mm: Move hash specific pte bits to be top bits of RPNAneesh Kumar K.V
We don't support the full 57 bits of physical address and hence can overload the top bits of RPN as hash specific pte bits. Add a BUILD_BUG_ON() to enforce the relationship between H_PAGE_F_SECOND and H_PAGE_F_GIX. Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Reviewed-by: Paul Mackerras <paulus@ozlabs.org> [mpe: Move the BUILD_BUG_ON() into hash_utils_64.c and comment it] Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2017-03-31powerpc/mm: Lower the max real address to 53 bitsAneesh Kumar K.V
Max value supported by hardware is 51 bits address. Radix page table define a slot of 57 bits for future expansion. We restrict the value supported in linux kernel 53 bits, so that we can use the bits between 57-53 for storing hash linux page table bits. This is done in the next patch. This will free up the software page table bits to be used for features that are needed for both hash and radix. The current hash linux page table format doesn't have any free software bits. Moving hash linux page table specific bits to top of RPN field free up the software bits for other purpose. Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Reviewed-by: Paul Mackerras <paulus@ozlabs.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2017-03-31powerpc/mm: Define all PTE bits based on radix definitions.Aneesh Kumar K.V
Reviewed-by: Paul Mackerras <paulus@ozlabs.org> Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2017-03-31powerpc/mm: Define _PAGE_SOFT_DIRTY unconditionallyAneesh Kumar K.V
Conditional PTE bit definition is confusing and results in coding error. Reviewed-by: Paul Mackerras <paulus@ozlabs.org> Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2017-03-31powerpc/mm/hugetlb: Filter out hugepage size not supported by page table layoutAneesh Kumar K.V
Without this if firmware reports 1MB page size support we will crash trying to use 1MB as hugetlb page size. echo 300 > /sys/kernel/mm/hugepages/hugepages-1024kB/nr_hugepages kernel BUG at ./arch/powerpc/include/asm/hugetlb.h:19! ..... .... [c0000000e2c27b30] c00000000029dae8 .hugetlb_fault+0x638/0xda0 [c0000000e2c27c30] c00000000026fb64 .handle_mm_fault+0x844/0x1d70 [c0000000e2c27d70] c00000000004805c .do_page_fault+0x3dc/0x7c0 [c0000000e2c27e30] c00000000000ac98 handle_page_fault+0x10/0x30 With fix, we don't enable 1MB as hugepage size. bash-4.2# cd /sys/kernel/mm/hugepages/ bash-4.2# ls hugepages-16384kB hugepages-16777216kB Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2017-03-31powerpc/mm: Add translation mode information in /proc/cpuinfoAneesh Kumar K.V
With this we have on powernv and pseries /proc/cpuinfo reporting timebase : 512000000 platform : PowerNV model : 8247-22L machine : PowerNV 8247-22L firmware : OPAL MMU : Hash Reviewed-by: Paul Mackerras <paulus@ozlabs.org> Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2017-03-31powerpc/mm/radix: rename _PAGE_LARGE to R_PAGE_LARGEAneesh Kumar K.V
This bit is only used by radix and it is nice to follow the naming style of having bit name start with H_/R_ depending on which translation mode they are used. No functional change in this patch. Reviewed-by: Paul Mackerras <paulus@ozlabs.org> Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2017-03-31powerpc/mm: Cleanup bits definition between hash and radix.Aneesh Kumar K.V
Define everything based on bits present in pgtable.h. This will help in easily identifying overlapping bits between hash/radix. No functional change with this patch. Reviewed-by: Paul Mackerras <paulus@ozlabs.org> Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2017-03-31powerpc/mm/slice: Fix off-by-1 error when computing slice maskAneesh Kumar K.V
For low slice, max addr should be less than 4G. Without limiting this correctly we will end up with a low slice mask which has 17th bit set. This is not a problem with the current code because our low slice mask is of type u16. But in later patch I am switching low slice mask to u64 type and having the 17bit set result in wrong slice mask which in turn results in mmap failures. Reviewed-by: Paul Mackerras <paulus@ozlabs.org> Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2017-03-31powerpc/mm/nohash: MM_SLICE is only used by book3s 64Aneesh Kumar K.V
BOOKE code is dead code as per the Kconfig details. So make it simpler by enabling MM_SLICE only for book3s_64. The changes w.r.t nohash is just removing deadcode. W.r.t ppc64, 4k without hugetlb will now enable MM_SLICE. But that is good, because we reduce one extra variant which probably is not getting tested much. Reviewed-by: Paul Mackerras <paulus@ozlabs.org> Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2017-03-31powerpc/4xx: Make sam440ep_setup_rtc() initYang Shi
sam440ep_setup_rtc() is just called by machine_device_initcall() so make it __init. Signed-off-by: Yang Shi <yang.shi@windriver.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2017-03-31powerpc/fadump: Reserve memory at an offset closer to bottom of RAMHari Bathini
Currently, the area to preserve boot memory is reserved at the top of RAM. This leaves fadump vulnerable to memory hot-remove operations. As memory for fadump has to be reserved early in the boot process, fadump can't be registered after a memory hot-remove operation. Though this problem can't be eleminated completely, the impact can be minimized by reserving memory at an offset closer to bottom of the RAM. The offset for fadump memory reservation can be any value greater than fadump boot memory size. Signed-off-by: Hari Bathini <hbathini@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2017-03-31Merge branch 'vfio-ccw-for-martin' of ↵Martin Schwidefsky
git://git.kernel.org/pub/scm/linux/kernel/git/kvms390/vfio-ccw into features Pull vfio-ccw branch to add the basic channel I/O passthrough intrastructure based on vfio. The focus is on supporting dasd-eckd(cu_type/dev_type = 0x3990/0x3390) as the target device. Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2017-03-31vfio: ccw: introduce support for ccw0Dong Jia Shi
Although Linux does not use format-0 channel command words (CCW0) these are a non-optional part of the platform spec, and for the sake of platform compliance, and possibly some non-Linux guests, we have to support CCW0. Making the kernel execute a format 0 channel program is too much hassle because we would need to allocate and use memory which can be addressed by 24 bit physical addresses (because of CCW0.cda). So we implement CCW0 support by translating the channel program into an equivalent CCW1 program instead. Based upon an orginal patch by Kai Yue Wang. Signed-off-by: Dong Jia Shi <bjsdjshi@linux.vnet.ibm.com> Message-Id: <20170317031743.40128-16-bjsdjshi@linux.vnet.ibm.com> Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
2017-03-31vfio: ccw: register vfio_ccw to the mediated device frameworkDong Jia Shi
To make vfio support subchannel devices, we need to leverage the mediated device framework to create a mediated device for the subchannel device. This registers the subchannel device to the mediated device framework during probe to enable mediated device creation. Reviewed-by: Pierre Morel <pmorel@linux.vnet.ibm.com> Signed-off-by: Dong Jia Shi <bjsdjshi@linux.vnet.ibm.com> Message-Id: <20170317031743.40128-7-bjsdjshi@linux.vnet.ibm.com> Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
2017-03-31vfio: ccw: basic implementation for vfio_ccw driverDong Jia Shi
To make vfio support subchannel devices, we need a css driver for the vfio subchannels. This patch adds a basic vfio-ccw subchannel driver for this purpose. To enable VFIO for vfio-ccw, enable S390_CCW_IOMMU config option and configure VFIO as required. Acked-by: Pierre Morel <pmorel@linux.vnet.ibm.com> Signed-off-by: Dong Jia Shi <bjsdjshi@linux.vnet.ibm.com> Message-Id: <20170317031743.40128-5-bjsdjshi@linux.vnet.ibm.com> Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
2017-03-31multi_v7_defconfig: make Rockchip DRM drivers built-inArnd Bergmann
These cause warnings in linux-next, as the symbols have become 'bool' there: arch/arm/configs/multi_v7_defconfig:600:warning: symbol value 'm' invalid for ROCKCHIP_INNO_HDMI arch/arm/configs/multi_v7_defconfig:599:warning: symbol value 'm' invalid for ROCKCHIP_DW_MIPI_DSI arch/arm/configs/multi_v7_defconfig:598:warning: symbol value 'm' invalid for ROCKCHIP_DW_HDMI arch/arm/configs/multi_v7_defconfig:597:warning: symbol value 'm' invalid for ROCKCHIP_ANALOGIX_DP Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2017-03-31Merge tag 'arm-soc/for-4.11/devicetree-fixes' of ↵Arnd Bergmann
http://github.com/Broadcom/stblinux into fixes There was a little conflict between the v4.11 bugfixes and the new changes for 4.12, this merges the fixes into the 4.12 branch to avoid having to resolve it again. * Broadcom fixes in mainline ARM: dts: BCM5301X: Correct GIC_PPI interrupt flags ARM: dts: BCM5301X: Fix memory start address ARM: dts: BCM5301X: Fix UARTs on bcm953012k Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2017-03-31Merge tag 'omap-for-v4.12/dt-v2-signed' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt Pull "Devicetree changes for omaps for v4.12 merge window" from Tony Lindgren: - Add hecc node for am35x - Add onenand support for omap3-igep - Add bluetooth binding for n900/n9/n950 - Configure clocks and SATA for dm81xx - Update operating points tables for am33xx, am43xx and dra7 - Update SPI flash documentation for w25q64 - Configure SPI NOR for am335x-icev2 - Mux uart0 for am437x-gp-evm - Add thermal zones for omap3, omap4, omap5, dra7 - Configure LEDs for am335x-baltos - A series of droid 4 changes to configure various devices such as keypad, regulators, gpio-keys, rtc, power button, compass, accelerometer, touchscreen, backlight, poweroff, tmp105, HDMI, LCD panel and LEDs, EHCI, and micro-SD * tag 'omap-for-v4.12/dt-v2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (35 commits) ARM: dts: am335x-baltos: add LED support ARM: dts: omap4-droid4: Fix MMC1 card for detect GPIO and regulator ARM: dts: OMAP4460: Thermal: Add slope and offset values ARM: dts: OMAP443x: Thermal: Add slope and offset values ARM: dts: OMAP5: Thermal: Add slope and offset values ARM: dts: DRA7: Thermal: Add slope and offset values ARM: dts: omap3: Add cpu_thermal zone ARM: dts: am437x-gp-evm: Add pinmux for uart0 ARM: dts: am335x-icev2: Add SPI based NOR Documentation: devicetree: mtd: add w25q64 to list of supported SPI flashes ARM: dts: dra7: Add updated operating-points-v2 table for cpu ARM: dts: am4372: Update operating-points-v2 table for cpu ARM: dts: am335x-boneblack: Enable 1GHz OPP for cpu ARM: dts: am33xx: Add updated operating-points-v2 table for cpu ARM: dts: dm8168-evm: add SATA node ARM: dts: dm8168-evm: add the external reference clock for SATA ARM: dts: N9/N950: add bluetooth ARM: dts: N900: Add bluetooth ARM: dts: omap4-droid4: Configure EHCI so modems can be accessed ARM: dts: motorola-cpcap-mapphone: add LEDs ...
2017-03-31Merge tag 'v4.12-rockchip-dts32-1' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt Pull "Rockchip dts32 updates for 4.12 part1" from Heiko Stübner: Contains one new board, the Tinkerboard from Asus based on the rk3288, definitions for the mmc resets in the socs reset controller, sound support for the Rock2, dma support for mmc controllers on the rk3188 and a led-fix for the MiQi board and and irq-fix for older Cortex-A9 socs. * tag 'v4.12-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: ARM: dts: rockchip: setup DMA-channels for mmc0 and emmc for rk3188 ARM: dts: rockchip: fix PPI misconfiguration on Cortex-A9 socs ARM: dts: rockchip: add rk322x dw-mmc resets ARM: dts: rockchip: add rk3066/rk3188 dw-mmc resets ARM: dts: rockchip: add rk3036 dw-mmc resets ARM: dts: rockchip: add rk3288 dw-mmc resets ARM: dts: rockchip: add dts for RK3288-Tinker board dt-bindings: add rk3288-based Asus Tinker board ARM: dts: rockchip: fix the MiQi board's LED definition ARM: dts: rockchip: Add support for ES8388 to the Radxa Rock 2
2017-03-31Merge tag 'gemini-dts-2' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into next/dt Pull "DTS updates for the Gemini on top of the multiplatform base" from Linus Walleij: - Add the power controller to the DTS. - Augment the GPIO nodes to also include the Faraday compatible. - Add the PCI bus host and config to the Gemini device trees. * tag 'gemini-dts-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik: ARM: dts: add PCI to the Gemini device trees ARM: dts: augment Gemini GPIO nodes ARM: dts: add power controller to the Gemini DTS
2017-03-31arm64: dts: juno: fix PCI bus dtc warningsRob Herring
dtc recently added PCI bus checks. Fix these warnings. Signed-off-by: Rob Herring <robh@kernel.org> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Liviu Dudau <liviu.dudau@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2017-03-31Merge tag 'arm-soc/for-4.12/devicetree' of ↵Arnd Bergmann
http://github.com/Broadcom/stblinux into next/dt Pull "Broadcom devicetree changes for 4.12" from Florian Fainelli: This pull request contains Broadcom ARM-based SoCs Device Tree updates for 4.12, please pull the following: - Rafal: * adds basic support for the Linksys EA9200, Linksys EA6300 V1, Linksys EA9500, TP-Link Archer C5 V2 which are all based on BCM470x SoCs with a bunch of BCM43602 radios. * updates the BCM5301X DTS and DTS include file and moves the serial console parameters to the DTS include file since all BCM5301X that we have so far are consistent in using the same UART. He also does the same for the BCM53573 DTS. * makes some updates to the Tenda AC9 platform by describing its PCIe controllers and endpoints in order to be able to represent GPIOs attached to the on-chip Wi-Fi module. Once done, he adds the 2Ghz LED which is connected to one of these GPIOs. * re-licenses the DTS files he created to the ISC license * removes the use of the non-existend "default-off" LED trigger in the BCM53573 and BCM5301X DTS files - Aditya adds missing Netgear R8000 LEDS and keys for WAN status LEDS and brightness - Jon: * adds NAND controller Device Tree nodes to the BCM953012K reference board * converts the BCM5301X SoC to use the recently introduced Broadcom QSPI controller Device Tree nodes. * fixes the GIC PPI interrupt flags that the kernel now reports about. * adds ARM TWD watchdog entries to the BCM5301X DTS include file * adds I2C entries to the BCM5301X DTS include files. * disables i2c by default in the Northstar Plus DTS include file, and ,enables it at the board level instead. * adds USB (OHCI & EHCI) Device Tree nodes to the Northstar Plus DTS include files. - Steven adds the mailbox (PDC) unit and the crytographic unit (SPU) to the Broadcom Northstar Plus SoC DTS include file. Steven also adds proper ethernet aliases to the BCM53012HR board since some bootloaders require that for MAC address patching. - Eric adds the DSI and its corresponding clock nodes to the BCM283x DTS files but leaves them disabled by default (overlays should take care of enabling it) - Boris adds support for HDMI audio and related DMA channels to the BCM283x SoCs - Gerd adds support for the BCM2835 specific SDHCI controller to the BCM283x SoCs - Rob fixes the iProc msi-controller name and unit address now that DTC can produce additional errors * tag 'arm-soc/for-4.12/devicetree' of http://github.com/Broadcom/stblinux: (27 commits) ARM: dts: bcm: fix msi-controller name and unit address ARM: dts: BCM53573: Specify serial console parameters ARM: dts: BCM5301X: Specify serial console params in dtsi files ARM: dts: NSP: Add crypto (SPU) to dtsi ARM: dts: NSP: Add mailbox (PDC) to NSP ARM: dts: BCM953012HR: Add ethernet aliases ARM: dts: BCM5301X: Add support for TP-LINK Archer C5 V2 ARM: dts: NSP: disable i2c DT entry by default ARM: dts: NSP: Add EHCI/OHCI USB nodes to device tree ARM: dts: BCM5301X: Add I2C support to the DT ARM: dts: BCM5301X: Add TWD WD Support to DT ARM: dts: BCM5301X: Correct GIC_PPI interrupt flags ARM: dts: bcm2835: add sdhost controller to devicetree ARM: dts: bcm283x: Add HDMI audio related properties ARM: dts: BCM5301X: Don't use nonexistent "default-off" LED trigger ARM: dts: BCM53573: Don't use nonexistent "default-off" LED trigger ARM: dts: BCM5301X: Add missing Netgear R8000 LEDs and Keys ARM: dts: BCM5301X: Relicense DTS files I created to the ISC ARM: dts: bcm2835: Add the DSI module nodes and clocks. ARM: dts: BCM53573: Add Tenda AC9 2 GHz LED ...
2017-03-31Merge tag 'mvebu-dt-4.12-1' of git://git.infradead.org/linux-mvebu into next/dtArnd Bergmann
Pull "mvebu dt for 4.12 (part 1)" from Gregory CLEMENT: - Add node lable for Armada 38x - Add support for Synology DS116 NAS and Linksys WRT1900ACS - Update mbus controller description on Armada 38x allowing entering in standby - Add default trigger for sata led on various linksys boards - Update newly added armada-xp-98dx3236 - Enable hardware buffer manager support for the devices in the Linksys WRT AC Serie * tag 'mvebu-dt-4.12-1' of git://git.infradead.org/linux-mvebu: ARM: dts: mvebu: linksys: enable buffer manager support ARM: dts: mvebu: remove unnecessary PCI range from 98dx3236 ARM: dts: mvebu: Move mv98dx3236 clock bindings ARM: dts: Use armada-370-xp as a base for armada-xp-98dx3236 ARM: dts: armada-xp-98dx3236: combine dfx server nodes ARM: dts: armada: Add default trigger for sata led ARM: dts: armada-38x: Adjust mbus controller description on Armada 38x ARM: dts: armada-385: add support for the Linksys WRT1900ACS (Shelby) ARM: dts: armada-385-synology-ds116: add support for Synology DS116 NAS ARM: dts: armada-38x add node labels
2017-03-31Merge tag 'davinci-for-v4.12/dt' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/dt Pull "DaVinci DT updates for v4.12" from Sekhar Nori: DaVinci device tree updates to enable Video display on DA850 along with some whitespace clean-up. Also, enables sound and ADC support on Lego EV3. * tag 'davinci-for-v4.12/dt' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci: ARM: dts: da850-evm: add the output port to the vpif node ARM: dts: da850-evm: add IO expander node on UI card ARM: dts: da850: add vpif video display pins ARM: dts: da850-evm: fix whitespace errors ARM: da850-lego-ev3: Add device tree node for sound ARM: da850-lego-ev3: Add device tree node for A/DC
2017-03-31ARM: dts: augment Moxa ART GPIO nodeLinus Walleij
The Moxa ART GPIO is a Faraday FTGPIO010. Augment the DTS node to indicate both compatible values for the SoC and the IP part. Also increase the register range to 0x100, it has at least 0x48 bytes of registers, and a few extra will not hurt. Tested-by: Jonas Jensen <jonas.jensen@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2017-03-31Merge tag 'uniphier-dt-v4.12' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier into next/dt Pull "UniPhier ARM SoC DT updates for v4.12" from Masahiro Yamada: - Remove skeleton.dtsi inclusion - Fix W=* build warnings - Fix eMMC pin-mux node - Add pagesize properties to EEPROM nodes * tag 'uniphier-dt-v4.12' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier: ARM: dts: uniphier: add pagesize property to EEPROM of proto boards ARM: dts: uniphier: add pagesize property to EEPROM of Support Card ARM: dts: uniphier: fix pin groups of eMMC pin-mux node ARM: dts: uniphier: move memory node below aliases node ARM: dts: uniphier: fix no unit name warnings ARM: dts: uniphier: remove skeleton.dtsi inclusion
2017-03-31Merge tag 'v4.12-rockchip-dts64-symlinks-1' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt64 Pull "Rockchip dts64 updates (using arm/arm64 symlinks) for 4.12 part1" from Heiko Stübner Rockchip dts changes based on the newly created arm/arm64 symlinks. The core addition is the support for the rk3399-based Gru family of ChromeOS devices, like the Kevin board which is the recently released Samsung Chromebook Plus. Additionally the usb3 controllers are added to rk3399 as they're used on Gru devices and even without full type-c support they can at least drive usb2 devices already. * tag 'v4.12-rockchip-dts64-symlinks-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: arm64: dts: rockchip: add regulator info for Kevin digitizer arm64: dts: rockchip: describe Gru/Kevin OPPs + CPU regulators arm64: dts: rockchip: add Gru/Kevin DTS dt-bindings: Document rk3399 Gru/Kevin arm64: dts: rockchip: support dwc3 USB for rk3399
2017-03-31Merge tag 'v4.12-rockchip-dts64-1' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt64 Pull "Rockchip dts64 updates for 4.12 part1" from Heiko Stübner: Contains various changes for the rk3368 (dma, i2s, disable mailbox per default, mmc-resets) and also removes the wrongly added idle states, that do not match the hardware's capabilities, as well as some general rk3399 pcie fixes as well as also the mmc resets. * tag 'v4.12-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: arm64: dts: rockchip: fix PCIe domain number for rk3399 arm64: dts: rockchip: add rk3399 dw-mmc resets arm64: dts: rockchip: add rk3368 dw-mmc resets arm64: dts: rockchip: disable mailbox of RK3368 SoCs per default arm64: dts: rockchip: add i2s nodes support for RK3368 SoCs arm64: dts: rockchip: add dmac nodes for rk3368 SoCs arm64: dts: rockchip: remove wrongly added idle states on rk3368 arm64: dts: rockchip: sort rk3399-pcie by unit address
2017-03-31Merge tag 'arm-soc/for-4.12/devicetree-arm64' of ↵Arnd Bergmann
http://github.com/Broadcom/stblinux into next/dt64 Pull "Broadcom devicetree-arm64 changes for 4.12" from Florian Fainelli: This pull request contains Broadcom ARM64-based SoCs Device Tree updates for 4.12, please pull the following: - Rob enables the cryptographic block on Northstar 2 (SPU) by adding the proper Device Tree nodes - Jon replaces all occurences of: status = "ok" with status = "okay" to better conform to the Device Tree specification * tag 'arm-soc/for-4.12/devicetree-arm64' of http://github.com/Broadcom/stblinux: arm64: dts: NS2: convert "ok" to "okay" arm64: dts: NS2: Add Broadcom SPU driver DT entry