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2017-04-10MIPS: Loongson-3: Select MIPS_L1_CACHE_SHIFT_6Huacai Chen
Some newer Loongson-3 have 64 bytes cache lines, so select MIPS_L1_CACHE_SHIFT_6. Signed-off-by: Huacai Chen <chenhc@lemote.com> Cc: John Crispin <john@phrozen.org> Cc: Steven J . Hill <Steven.Hill@caviumnetworks.com> Cc: Fuxin Zhang <zhangfx@lemote.com> Cc: Zhangjin Wu <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Cc: stable@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/15755/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-04-10MIPS: Delete redundant definition of SMP_CACHE_BYTES.Ralf Baechle
<linux/cache.h> already defines SMP_CACHE_BYTES as L1_CACHE_BYTES. This change results in a build error in <asm/cpu-info.h> which directly includes <asm/cache.h>. Fix this by including <linux/cache.h> instead. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-04-10MIPS: Delete unused definition of SMP_CACHE_SHIFT.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-04-10MIPS: Don't unnecessarily include kmalloc.h into <asm/cache.h>.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-04-10MIPS: Disable Werror when W= is setFlorian Fainelli
Using any value for W= will lead to a ton of warnings which are turned into fatal errors because MIPS adds -Werror to arch/mips/*. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Cc: linux-mips@linux-mips.org Cc: james.hogan@imgtec.com Patchwork: https://patchwork.linux-mips.org/patch/15785/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-04-10MIPS: Octeon: Clean up platform code.Steven J. Hill
Remove unused headers and fix warnings from checkpatch. Signed-off-by: Steven J. Hill <Steven.Hill@cavium.com> Acked-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/15407/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-04-10MIPS: Octeon: Remove unused PCIERCX types and macros.Steven J. Hill
Remove all unused bitfields and macros. Convert the remaining bitfields to use __BITFIELD_FIELD instead of #ifdef. [ralf@linux-mips.org: Add inclusions of <uapi/asm/bitfield.h> as necessary.] Signed-off-by: Steven J. Hill <steven.hill@cavium.com> Acked-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/15408/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-04-10MIPS: Octeon: Fix compile error when USB is not enabled.Steven J. Hill
Move all USB platform code to one place within the file. Signed-off-by: Steven J. Hill <Steven.Hill@cavium.com> Acked-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/15406/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-04-10MIPS: Octeon: Remove unused SLI types and macros.Steven J. Hill
Remove all unused bitfields and macros. Convert the remaining bitfields to use __BITFIELD_FIELD instead of #ifdef. [ralf@linux-mips.org: Add inclusions of <uapi/asm/bitfield.h> as necessary.] Signed-off-by: Steven J. Hill <steven.hill@cavium.com> Acked-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/15405/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-04-10MIPS: Octeon: Remove unused L2C types and macros.Steven J. Hill
Remove all unused bitfields and macros. Convert the remaining bitfields to use __BITFIELD_FIELD instead of #ifdef. [ralf@linux-mips.org: Add inclusions of <uapi/asm/bitfield.h> as necessary.] Signed-off-by: Steven J. Hill <steven.hill@cavium.com> Acked-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/15403/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-04-10MIPS: Add 48-bit VA space (and 4-level page tables) for 4K pages.Alex Belits
Some users must have 4K pages while needing a 48-bit VA space size. The cleanest way do do this is to go to a 4-level page table for this case. Each page table level using order-0 pages adds 9 bits to the VA size (at 4K pages, so for four levels we get 9 * 4 + 12 == 48-bits. For the 4K page size case only we add support functions for the PUD level of the page table tree, also the TLB exception handlers get an extra level of tree walk. [david.daney@cavium.com: Forward port to v4.10.] [david.daney@cavium.com: Forward port to v4.11.] Signed-off-by: Alex Belits <alex.belits@cavium.com> Signed-off-by: David Daney <david.daney@cavium.com> Cc: James Hogan <james.hogan@imgtec.com> Cc: Alex Belits <alex.belits@cavium.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/15312/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-04-10MIPS: Octeon: Remove vestiges of CONFIG_CAVIUM_OCTEON_2ND_KERNELDavid Daney
This config option never really worked, and has bit-rotted to the point of being completely useless. Remove it completely. Signed-off-by: David Daney <david.daney@cavium.com> Cc: James Hogan <james.hogan@imgtec.com> Cc: Steven J. Hill <steven.hill@cavium.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/15314/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-04-10MIPS: BPF: Fix multiple problems in JIT skb access helpers.David Daney
o Socket data is unsigned, so use unsigned accessors instructions. o Fix path result pointer generation arithmetic. o Fix half-word byte swapping code for unsigned semantics. Signed-off-by: David Daney <david.daney@cavium.com> Cc: James Hogan <james.hogan@imgtec.com> Cc: Alexei Starovoitov <ast@kernel.org> Cc: Steven J. Hill <steven.hill@cavium.com> Cc: linux-mips@linux-mips.org Cc: netdev@vger.kernel.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/15747/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-04-10MIPS: BPF: Quit clobbering callee saved registers in JIT code.David Daney
If bpf_needs_clear_a() returns true, only actually clear it if it is ever used. If it is not used, we don't save and restore it, so the clearing has the nasty side effect of clobbering caller state. Also, don't emit stack pointer adjustment instructions if the adjustment amount is zero. Signed-off-by: David Daney <david.daney@cavium.com> Cc: James Hogan <james.hogan@imgtec.com> Cc: Alexei Starovoitov <ast@kernel.org> Cc: Steven J. Hill <steven.hill@cavium.com> Cc: linux-mips@linux-mips.org Cc: netdev@vger.kernel.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/15745/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-04-10MIPS: BPF: Use unsigned access for unsigned SKB fields.David Daney
The SKB vlan_tci and queue_mapping fields are unsigned, don't sign extend these in the BPF JIT. In the vlan_tci case, the value gets masked so the change is not needed for correctness, but do it anyway for agreement with the types defined in struct sk_buff. Signed-off-by: David Daney <david.daney@cavium.com> Cc: James Hogan <james.hogan@imgtec.com> Cc: Alexei Starovoitov <ast@kernel.org> Cc: Steven J. Hill <steven.hill@cavium.com> Cc: linux-mips@linux-mips.org Cc: netdev@vger.kernel.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/15746/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-04-10MIPS: BPF: Add JIT support for SKF_AD_HATYPE.David Daney
This let's us pass some additional "modprobe test-bpf" tests with JIT enabled. Reuse the code for SKF_AD_IFINDEX, but substitute the offset and size of the "type" field. Signed-off-by: David Daney <david.daney@cavium.com> Cc: James Hogan <james.hogan@imgtec.com> Cc: Alexei Starovoitov <ast@kernel.org> Cc: Steven J. Hill <steven.hill@cavium.com> Cc: linux-mips@linux-mips.org Cc: netdev@vger.kernel.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/15744/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-04-10MIPS: uasm: Add support for LHU.David Daney
The follow-on BPF JIT patches use the LHU instruction, so add it. Signed-off-by: David Daney <david.daney@cavium.com> Cc: James Hogan <james.hogan@imgtec.com> Cc: Alexei Starovoitov <ast@kernel.org> Cc: Steven J. Hill <steven.hill@cavium.com> Cc: linux-mips@linux-mips.org Cc: netdev@vger.kernel.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/15743/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-04-10MIPS: Enable GENERIC_CPU_AUTOPROBEMarcin Nowakowski
Add missing macros and methods that are required by CONFIG_GENERIC_CPU_AUTOPROBE: MAX_CPU_FEATURES, cpu_have_feature(), cpu_feature(). Also set a default elf platform as currently it is not set for most MIPS platforms resulting in incorrectly specified modalias values in cpu autoprobe ("cpu:type:(null):feature:..."). Export 'elf_hwcap' symbol so that it can be accessed from modules that use module_cpu_feature_match() Signed-off-by: Marcin Nowakowski <marcin.nowakowski@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/15395/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-04-10ARM: dts: imx6q-utilite-pro: add hpd gpioChristopher Spinrath
The hpd pin of the second hdmi connector of the Utilite Pro is wired up to a gpio pin of the SoC. Reflect this in the device tree. Signed-off-by: Christopher Spinrath <christopher.spinrath@rwth-aachen.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-04-10ARM: dts: imx6qp-sabresd: Set reg_arm regulator supplyLeonard Crestez
On imx6qp-sabresd LDO_ARM is connected to a different PMIC output than the other imx6qdl-sabresd boards. Setting cpu0 arm-supply to sw2_reg is wrong, this must have mistakenly slipped out of the vendor tree where this is are used for LDO bypass. Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-04-10ARM: dts: imx6qdl-sabresd: Set LDO regulator supplyLeonard Crestez
Setting the supply is optional but beneficial, it will cause PMIC voltages to be dynamically changed with cpu frequency. Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-04-10ARM: dts: imx: add Gateworks Ventana GW5903 supportTim Harvey
The Gateworks Ventana GW5903 is a single-board computer based on the NXP IMX6 SoC with the following features: * IMX6 DualLite Soc (supports IMX6S,IMX6DL,IMX6Q) * 4GiB DDR3 DRAM * 32GB eMMC * 1x microSD connector * Gateworks System Controller: - hardware watchdog - hardware monitor - pushbutton controller - EEPROM storage - power control * JTAG programmable * Inertial Module * uBlox EMMY-W1 (bluetooth/nfc/802.11ac) Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-04-10ARM: dts: i.MX25: add AIPS control registersMartin Kaiser
The i.MX25 contains two AHB to IP bridges (AIPS), each of which has a set of control registers. Add the memory regions for the control registers to the Device Tree. Signed-off-by: Martin Kaiser <martin@kaiser.cx> Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-04-10ARM: dts: imx7-colibri: add Carrier Board 3.3V/5V regulatorsStefan Agner
Model the Carrier Board power distribution by adding a fixed 3.3V and 5V regulator. The 3.3V regulator is connected to the backlight as well as the display supply. The 5V regulator is used to supply USB VBUS. Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-04-10ARM: dts: imx7-colibri: remove 1.8V fixed regulatorStefan Agner
The ADC is directly supplied by the PMIC 1.8V rail, remove the superfluous fixed regulator. Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-04-10ARM: dts: imx7-colibri: allow to disable Ethernet railStefan Agner
The regulator-always-on property on the Ethernet rail prevents Linux from disabling the rail when Ethernet is shut down (suspend or simply link down). With this change the regulator framework will disable the rail when the Ethernet PHY is not used, saving power especially on carrier board not using Ethernet. Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-04-10ARM: dts: imx7-colibri: fix PMIC voltagesStefan Agner
Fix wrong voltage of PWR_EN_+V3.3 rail. The error had no noticeable effect since no consumer explicitly requested a specific voltage. Also use round voltages as it is common in other device trees. Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-04-10ARM: dts: imx7-colibri: use OF graph to describe the displayStefan Agner
To make use of the new eLCDIF DRM driver OF graph description is required. Describe the display using OF graph nodes. Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-04-10ARM: dts: imx6qp-nitrogen6_som2: add Quad Plus variant of the SOMGary Bisson
https://boundarydevices.com/product/nit6x-som-v2/ Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-04-10ARM: dts: imx6q-icore: Add touchscreen nodeJagan Teki
max11801 touchscreen on Engicam iCoreM6 Quad module is connected via i2c1, so add max11801: touchscreen@48 on i2c1. Cc: Dmitry Torokhov <dmitry.torokhov@gmail.com> Cc: Domenico Acri <domenico.acri@engicam.com> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-04-10ARM: dts: vf610-zii-dev-rev-b: change switch2 labelVivien Didelot
Rename the switch2@0 label of the switch2 node to switch@0 to respect the general unit@address DTS rule, and be consistent with the other switch nodes of the DTS file. Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-04-10ARM: dts: imx6ul-[geam|isiot]: Add sai2 nodeJagan Teki
Add Synchronous Audio Interface(SAI) node for Engicam GEAM6UL and Is.IoT MX6UL variant module boards. Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-04-10ARM: dts: imx6ul-isiot-common: Add touchscreen nodeJagan Teki
Add touchscreen node as i2c1 slave device on Engicam Is.IoT MX6UL modules, the touchscreen controlled 'st,stmpe-ts' connected via i2c with st,stmpe811 mfd interface. Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-04-10ARM: dts: imx6ul-isiot: Add i2c nodesJagan Teki
Add support for i2c nodes i2c1 and i2c2 on Is.IoT MX6UL eMMC variant boards. Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-04-10ARM: dts: imx6ul-isiot: Add imx6ul-isiot-common.dtsiJagan Teki
lcdif nodes are differ wrt specific LCD connected on Is.IoT MX6UL module, so create separate file 'imx6ul-isiot-common.dtsi' for common lcdif node structure and include the same on respective dts. More common nodes will add in future patches. Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-04-10ARM: dts: imx6ul-isiot: Add backlight support for lcdifJagan Teki
This patch add support for lcdif backlight on Is.IoT MX6UL variant boards. Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-04-10ARM: dts: imx6ul-geam: Add backlight support for lcdifJagan Teki
This patch add support for lcdif backlight on GEAM6UL variant boards. Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-04-10ARM: dts: imx6: add ZII RDU2 boardsLucas Stach
This adds support for the Zodiac Inflight Innovations RDU2 board, which has both a Quad and a QuadPlus variant. The board supports different panels, with the bootloader patching in the correct compatible, depending on the hardware configuration. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Tested-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com> Tested-by: Chris Healy <cphealy@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-04-10ARM: dts: imx6qp: add PRG nodes and hook up to IPUsLucas Stach
Add the DT nodes for the Prefetch Resolve Gaskets found on i.MX6QP and hook them up to the assigned IPU nodes. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-04-10ARM: dts: imx6qp: add PRE nodesLucas Stach
Add the DT nodes for the Prefetch Resolve Engines found on i.MX6QP. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-04-10ARM: dts: imx: fix PCI bus dtc warningsRob Herring
dtc recently added PCI bus checks. Fix these warnings. Signed-off-by: Rob Herring <robh@kernel.org> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-04-10ARM: dts: imx25-pinfunc: Move MX25_PAD_TDO__TDO to a more sensible placeUwe Kleine-König
The pinfunc definitions are ordered by mux_reg and so automatically by conf_reg, too. PAD_TDO is the only pad that has a conf_reg but no mux_reg. Put it to the place where it its in the order of conf_regs instead of the top. Signed-off-by: Uwe Kleine-König <uwe@kleine-koenig.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-04-10ARM: dts: imx25-pinfunc: remove duplicate definitionUwe Kleine-König
This was introduced in commit 18e2b50407fb ("ARM: dts: imx25-pinfunc: more defines"). Signed-off-by: Uwe Kleine-König <uwe@kleine-koenig.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-04-10ARM: dts: imx: add Gateworks Ventana GW5904 supportTim Harvey
The Gateworks Ventana GW5904 is a single-board computer based on the NXP IMX6 SoC with the following features: * IMX6 DualLite Soc (supports IMX6S,IMX6DL,IMX6Q) * 2048MB DDR3 DRAM (4x64bit) (options up to 4GiB) * 8GB eMMC * Gateworks System Controller: - hardware watchdog - hardware monitor - pushbutton controller - EEPROM storage - power control * JTAG programmable * 1x miniPCIe socket (with PCIe, USB) * 1x miniPCIe socket (USB) * 1x M.2 socket (USB, 2x SIM) * Inertial Module (LSM9DS1 9DOF: 3x acc, 3x rate, 3x mag) * GPS (optional uBlox EVA-M8M) * Application headers: - 2x RS232 UART (TX/RX/CTS/RTS) - 8x TTL GPIO (3x configurable as PWM) - 1x LVDS display 3D+C with i2c touch and PWM backlight * MV88E6176 GbE Switch (uplink to IMX FEC) * Front panel connectors: - 1x user programmable LED - 1x configurable user pushbutton - 1x USB OTG - 4x GbE LAN Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-04-10ARM: dts: imx7s: Do not claim i.MX51 compatibility for SRCAndrey Smirnov
System Reset Controller in i.MX7 doesn't have any commonality with IP block found in i.MX5 and i.MX6 SoC families. Given that and the new upstream driver for i.MX7 variant (see https://lkml.org/lkml/2017/2/21/466) remove "fsl,imx51-src" from compatibility string. Cc: yurovsky@gmail.com Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Russell King <linux@armlinux.org.uk> Cc: devicetree@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-04-10ARM: dts: imx6q-icore: Add LVDS supportJagan Teki
Add LVDS display support for OpenFrame Capacitive touch 7 inc display which is supported by Engicam i.CoreM6 QDL Starter Kit. Cc: Domenico Acri <domenico.acri@engicam.com> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-04-10ARM: dts: imx6q: Add Engicam i.CoreM6 Quad/Dual OpenFrame Cap 12.3 initial ↵Jagan Teki
support i.CoreM6 Quad/Dual OpenFrame modules are "system on modules plus openframe display carriers" which are good solution for develop user friendly graphic user interface. General features: CPU NXP i.MX6Q rev1.2 at 792 MHz RAM 1GB, 32, 64 bit, DDR3-800/1066 NAND SLC,512MB LVDS Display TFT 12.3" industrial, 1280x480 resolution Backlight LED backlight, brightness 350 Cd/m2 Power supply 15 to 30 Vdc Cc: Domenico Acri <domenico.acri@engicam.com> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-04-10ARM: dts: imx6q: Add Engicam i.CoreM6 Quad/Dual OpenFrame Cap 10.1 initial ↵Jagan Teki
support i.CoreM6 Quad/Dual OpenFrame modules are "system on modules plus openframe display carriers" which are good solution for develop user friendly graphic user interface. General features: CPU NXP i.MX6Q rev1.2 at 792 MHz RAM 1GB, 32, 64 bit, DDR3-800/1066 NAND SLC,512MB LVDS Display TFT 10.1" industrial, 1280x800 resolution Backlight LED backlight, brightness 350 Cd/m2 Power supply 15 to 30 Vdc Cc: Domenico Acri <domenico.acri@engicam.com> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-04-10ARM: dts: imx6qdl-icore: Add backlight support for lvdsJagan Teki
This patch add support for lvds backlight on i.CoreM6 QDL variant boards. Cc: Domenico Acri <domenico.acri@engicam.com> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-04-10ARM: dts: imx6q-b850v3: Use megachips-stdpxxxx-ge-b850v3-fw bridges (LVDS-DP++)Peter Senna Tschudin
Configures the megachips-stdpxxxx-ge-b850v3-fw bridges on the GE B850v3 dts file. Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Martyn Welch <martyn.welch@collabora.co.uk> Cc: Martin Donnelly <martin.donnelly@ge.com> Cc: Javier Martinez Canillas <javier@dowhile0.org> Cc: Enric Balletbo i Serra <enric.balletbo@collabora.com> Cc: Philipp Zabel <p.zabel@pengutronix.de> Cc: Rob Herring <robh@kernel.org> Cc: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Peter Senna Tschudin <peter.senna@collabora.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
generated by cgit (git 2.34.1) at 2025-09-15 22:55:29 +0000