Age | Commit message (Collapse) | Author |
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If AM43x and SMP is selected, OMAP4 & OMAP5 deselected, build error as
follows,
arch/arm/mach-omap2/built-in.o: In function `scu_gp_set':
arch/arm/mach-omap2/sleep44xx.S:131: undefined reference to `omap4_get_scu_base'
arch/arm/mach-omap2/sleep44xx.S:132: undefined reference to `scu_power_mode'
arch/arm/mach-omap2/built-in.o: In function `scu_gp_clear':
arch/arm/mach-omap2/sleep44xx.S:227: undefined reference to `omap4_get_scu_base'
arch/arm/mach-omap2/sleep44xx.S:229: undefined reference to `scu_power_mode'
Resolve it by building sleep44xx.S only for OMAP4 & OMAP5.
Signed-off-by: Afzal Mohammed <afzal@ti.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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The HAVE_PWM symbol is only for legacy platforms that provide
the PWM API without using the generic framework. MXS actually
uses that framework, and selecting the symbol anyway might
cause build errors like
drivers/built-in.o: In function `pwm_beeper_resume':
:(.text+0x1f4fc0): undefined reference to `pwm_config'
:(.text+0x1f4fc8): undefined reference to `pwm_enable'
drivers/built-in.o: In function `pwm_beeper_suspend':
:(.text+0x1f4ffc): undefined reference to `pwm_disable'
when CONFIG_PWM is disabled.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: Shawn Guo <shawn.guo@linaro.org>
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When building a kernel without CONFIG_PM, we get a link
error from referencing mxs_pm_init in the machine
descriptor. This defines a macro to NULL for that case.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
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This commit fixes the regression on Armada 370 (the kernal hang during
boot) introduced by the commit: "ARM: 7691/1: mm: kill unused
TLB_CAN_READ_FROM_L1_CACHE and use ALT_SMP instead".
When coming out of either a Wait for Interrupt (WFI) or a Wait for
Event (WFE) IDLE states, a specific timing sensitivity exists between
the retiring WFI/WFE instructions and the newly issued subsequent
instructions. This sensitivity can result in a CPU hang scenario. The
workaround is to insert either a Data Synchronization Barrier (DSB) or
Data Memory Barrier (DMB) command immediately after the WFI/WFE
instruction.
This commit was based on the work of Lior Amsalem, but heavily
modified to apply the errata fix dynamically according to the
processor type thanks to the suggestions of Russell King and Nicolas
Pitre.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Reviewed-by: Will Deacon <will.deacon@arm.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Tested-by: Willy Tarreau <w@1wt.eu>
Cc: <stable@vger.kernel.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Commit 1bc3974 (ARM: 7755/1: handle user space mapped pages in
flush_kernel_dcache_page) moved the implementation of
flush_kernel_dcache_page() into mm/flush.c but did not implement it
on noMMU ARM.
Signed-off-by: Simon Baatz <gmbnomis@gmail.com>
Acked-by: Kevin Hilman <khilman@linaro.org>
Cc: <stable@vger.kernel.org> # 3.2+: 1bc3974: ARM: 7755/1
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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The __cpu_logical_map array is statically initialized to 0, which is a valid
MPIDR value. To prevent issues with the current implementation, this patch
defines an MPIDR_INVALID value, and statically initializes the
__cpu_logical_map[] array to it. Entries in the arm_dt_init_cpu_maps()
tmp_map array used to stash DT reg properties while parsing DT are initialized
with the MPIDR_INVALID value as well for consistency.
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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The introduction of the cpu-map topology node in the cpus node implies
that cpus node might have children that are not cpu nodes. The DT
parsing code needs updating otherwise it would check for cpu nodes
properties in nodes that are not required to contain them, resulting
in warnings that have no bearing on bindings defined in the dts source file.
Cc: <stable@vger.kernel.org> [3.8+]
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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As it was already suggested by Russell King and Arnd Bergmann:
https://lkml.org/lkml/2013/5/16/133
moxart and gemini seem to be the only platforms using CPU_FA526,
and instead of pointing arm_pm_idle to an empty function from
platform code, it makes sense to remove WFI code from the processor
specific idle function.
Applies to arm-soc/for-next (and 3.10-rc1).
Changes since v1:
1. remove WFI but make sure cpu_fa526_do_idle do not fall through
to cpu_fa526_dcache_clean_area
Note: moxart boots and prints to UART without this patch, but input is broken.
Signed-off-by: Jonas Jensen <jonas.jensen@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Enable TI EDMA option on OMAP and TI_PRIV_EDMA
Signed-off-by: Matt Porter <mporter@ti.com>
Signed-off-by: Joel A Fernandes <joelagnel@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
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The following git commit changed the behavior of sscanf:
commit 53809751ac230a3611b5cdd375f3389f3207d471
Author: Jan Beulich <JBeulich@suse.com>
Date: Mon Dec 17 16:01:31 2012 -0800
sscanf: don't ignore field widths for numeric conversions
This broke the WWPN and LUN sysfs attributes for s390 reipl and dump
on panic.
Example:
$ echo 0x0123456701234567 > /sys/firmware/reipl/fcp/wwpn
$ cat /sys/firmware/reipl/fcp/wwpn
0x0001234567012345
So fix this and use format strings that work also with the
new sscanf implementation:
$ echo 0x012345670123456789 > /sys/firmware/reipl/fcp/wwpn
$ cat /sys/firmware/reipl/fcp/wwpn
0x0123456701234567
Cc: stable@vger.kernel.org # 3.8+
Reviewed-by: Steffen Maier <maier@linux.vnet.ibm.com>
Signed-off-by: Michael Holzheu <holzheu@linux.vnet.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
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EDMA supports a cross bar which provides ability
to mux additional events into physical channels
present in the channel controller.
This is required when the number of events present
in the system are more than number of available
physical channels.
Changes by Joel:
* Split EDMA xbar support out of original EDMA DT parsing patch
to keep it easier for review.
* Rewrite shift and offset calculation.
Suggested-by: Sekhar Nori <nsekhar@ti.com>
Suggested by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Joel A Fernandes <joelagnel@ti.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
[nsekhar@ti.com: fix checkpatch errors and a minor coding improvement]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
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Adds support for parsing the TI EDMA DT data into the required EDMA
private API platform data. Enables runtime PM support to initialize
the EDMA hwmod. Enables build on OMAP.
Changes by Joel:
* Setup default one-to-one mapping for queue_priority and queue_tc
mapping as discussed in [1].
* Split out xbar stuff to separate patch. [1]
* Dropped unused DT helper to convert to array
* Fixed dangling pointer issue with Sekhar's changes
[1] https://patchwork.kernel.org/patch/2226761/
Signed-off-by: Matt Porter <mporter@ti.com>
[nsekhar@ti.com: fix checkpatch errors, build breakages. Introduce
edma_setup_info_from_dt() as part of that effort]
Signed-off-by: Joel A Fernandes <joelagnel@ti.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
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The length of the registers area for the Marvell 370/XP Ethernet controller
was incorrect in the .dtsi: 0x2500, while it should have been 0x4000.
This problem wasn't noticed because there used to be a static mapping for
all the MMIO register region set up by ->map_io().
The register length was fixed in all the other device tree files,
except from the armada-xp-mv78260.dtsi, in the following commit:
commit cf8088c5cac6ce20d914b9131533844b9291a054
Author: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Date: Tue May 21 12:33:27 2013 +0200
arm: mvebu: fix length of Ethernet registers area in .dtsi
This commit fixes a kernel panic in mvneta_probe(), when the kernel
tries to access the unmapped registers:
[ 163.639092] mvneta d0070000.ethernet eth0: mac: 6e:3c:4f:87:17:2e
[ 163.646962] mvneta d0074000.ethernet eth1: mac: 6a:04:4e:6f:f5:ef
[ 163.654853] mvneta d0030000.ethernet eth2: mac: 2a:99:19:19:fc:4c
[ 163.661258] Unable to handle kernel paging request at virtual address f011bcf0
[ 163.668523] pgd = c0004000
[ 163.671237] [f011bcf0] *pgd=2f006811, *pte=00000000, *ppte=00000000
[ 163.677565] Internal error: Oops: 807 [#1] SMP ARM
[ 163.682370] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 3.10.0-rc6-01850-gba0682e #11
[ 163.690046] task: ef04c000 ti: ef03e000 task.ti: ef03e000
[ 163.695467] PC is at mvneta_probe+0x34c/0xabc
[...]
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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This patch has been invaluable in my adventures finding
issues in the perf NMI handler. I'm as big a fan of
printk() as anybody is, but using printk() in NMIs is
deadly when they're happening frequently.
Even hacking in trace_printk() ended up eating enough
CPU to throw off some of the measurements I was making.
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Acked-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: paulus@samba.org
Cc: acme@ghostprotocols.net
Cc: Dave Hansen <dave@sr71.net>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
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This patch keeps track of how long perf's NMI handler is taking,
and also calculates how many samples perf can take a second. If
the sample length times the expected max number of samples
exceeds a configurable threshold, it drops the sample rate.
This way, we don't have a runaway sampling process eating up the
CPU.
This patch can tend to drop the sample rate down to level where
perf doesn't work very well. *BUT* the alternative is that my
system hangs because it spends all of its time handling NMIs.
I'll take a busted performance tool over an entire system that's
busted and undebuggable any day.
BTW, my suspicion is that there's still an underlying bug here.
Using the HPET instead of the TSC is definitely a contributing
factor, but I suspect there are some other things going on.
But, I can't go dig down on a bug like that with my machine
hanging all the time.
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Acked-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: paulus@samba.org
Cc: acme@ghostprotocols.net
Cc: Dave Hansen <dave@sr71.net>
[ Prettified it a bit. ]
Signed-off-by: Ingo Molnar <mingo@kernel.org>
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I have a system which is causing all kinds of problems. It has
8 NUMA nodes, and lots of cores that can fight over cachelines.
If things are not working _perfectly_, then NMIs can take longer
than expected.
If we get too many of them backed up to each other, we can
easily end up in a situation where we are doing nothing *but*
running NMIs. The biggest problem, though, is that this happens
_silently_. You might be lucky to get an hrtimer warning, but
most of the time system simply hangs.
This patch should at least give us some warning before we fall
off the cliff. the warnings look like this:
nmi_handle: perf_event_nmi_handler() took: 26095071 ns
The message is triggered whenever we notice the longest NMI
we've seen to date. You can always view and reset this value
via the debugfs interface if you like.
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Acked-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: paulus@samba.org
Cc: acme@ghostprotocols.net
Cc: Dave Hansen <dave@sr71.net>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Arnd Bergmann:
"These are two fixes that came in this week, one for a regression we
introduced in 3.10 in the GIC interrupt code, and the other one fixes
a typo in newly introduced code"
* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
irqchip: gic: call gic_cpu_init() as well in CPU_STARTING_FROZEN case
ARM: dts: Correct the base address of pinctrl_3 on Exynos5250
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git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs
Pull vfs fixes from Al Viro:
"Several fixes for bugs caught while looking through f_pos (ab)users"
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs:
aout32 coredump compat fix
splice: don't pass the address of ->f_pos to methods
mconsole: we'd better initialize pos before passing it to vfs_read()...
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dump_seek() does SEEK_CUR, not SEEK_SET; native binfmt_aout
handles it correctly (seeks by PAGE_SIZE - sizeof(struct user),
getting the current position to PAGE_SIZE), compat one seeks
by PAGE_SIZE and ends up at PAGE_SIZE + already written...
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
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This patch adds support for the TI-Nspire platform.
Changes between v1 and v2:
* Added GENERIC_IRQ_CHIP to platform Kconfig
Signed-off-by: Daniel Tang <dt.tangr@gmail.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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This patch adds device trees for describing the TI-Nspire hardware.
Changes between v1 and v2:
* Change "keymap" binding to the standard "linux,keymap" binding.
Signed-off-by: Daniel Tang <dt.tangr@gmail.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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into next/soc
From Jason Cooper:
mvebu register map changes for v3.11 (round 2)
This series removes the hardcoded register base address for mvebu.
For round 2:
- multiplatform
- fix booting on anything other than mvebu
Depends (none new for round 2):
- mvebu/fixes-non-critical (up to tags/fixes-non-3.11-1)
- mvebu/cleanup (up to tags/cleanup-3.11-3)
* tag 'regmap-3.11-2' of git://git.infradead.org/users/jcooper/linux:
arm: mvebu: fix coherency_late_init() for multiplatform
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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next/dt
From Jason Cooper:
mvebu dt changes for v3.11 (round 6)
- mvebu
- mini-PCIe connectors on Armada 370 RD
- kirkwood
- correct internal register ranges translation
* tag 'dt-3.11-6' of git://git.infradead.org/users/jcooper/linux:
ARM: Kirkwood: Fix the internal register ranges translation
arm: mvebu: enable mini-PCIe connectors on Armada 370 RD
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 fixes from Peter Anvin:
"This series fixes a couple of build failures, and fixes MTRR cleanup
and memory setup on very specific memory maps.
Finally, it fixes triggering backtraces on all CPUs, which was
inadvertently disabled on x86."
* 'x86/urgent' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
x86/efi: Fix dummy variable buffer allocation
x86: Fix trigger_all_cpu_backtrace() implementation
x86: Fix section mismatch on load_ucode_ap
x86: fix build error and kconfig for ia32_emulation and binfmt
range: Do not add new blank slot with add_range_with_merge
x86, mtrr: Fix original mtrr range get for mtrr_cleanup
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Pull KVM fixes from Paolo Bonzini:
"Three one-line fixes for my first pull request; one for x86 host, one
for x86 guest, one for PPC"
* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm:
x86: kvmclock: zero initialize pvclock shared memory area
kvm/ppc/booke: Delay kvmppc_lazy_ee_enable
KVM: x86: remove vcpu's CPL check in host-invoked XCR set
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Pull crypto fix from Herbert Xu:
"This fixes an unaligned crash in XTS mode when using aseni_intel"
* git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6:
crypto: aesni_intel - fix accessing of unaligned memory
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Although the internal register window size is 1 MiB, the previous
ranges translation for the internal register space had a size of
0x4000000. This was done to allow the crypto and nand node to access
the corresponding 'sram' and 'nand' decoding windows.
In order to describe the hardware more accurately, we declare the
real 1 MiB internal register space in the ranges, and add a translation
entry for the nand node to access the 'nand' window.
This commit will make future improvements on the MBus DT binding easier.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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The following commit:
commit 7e348b9012522fa0efd854d20d210d5e57fcedd1
Author: Robert Lee <rob.lee@linaro.org>
Date: Tue Mar 20 15:22:43 2012 -0500
ARM: at91: Consolidate time keeping and irq enable
Enable core cpuidle timekeeping and irq enabling and remove that
handling from this code.
introduced an additional zero to the state1 (suspend) target residency.
With a periodic tick, the cpu never enters the state1 with both 10000 and
100000.
With a tickless system, it enters to state1 much more often with the
initial value, roughly x7 more.
Fix it by setting the value to 10ms again.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
[nicola.ferre@atmel.com: add precisions given by Daniel to commit message]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Since 4b68520dc0ec96153bc0d87bca5ffba508edfcf
ARM: at91: add AIC5 support
we allocate the at91_extern_irq.
This patch makes it static and stores the non-dt extern irq in the soc
structure. It is then possible to use a at91_get_extern_irq() function
to get the value for outside of the irq driver. It is useful for passing
its value to at91_aic_init().
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Ludovic Desroches <ludovic.desroches@atmel.com>
[nicolas.ferre@atmel.com: rework commit message]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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next/boards
From Michal Simek:
arm: Xilinx Zynq defconfig changes for v3.11
Enable zynq uartps driver and initrd in defconfig.
* tag 'zynq-defconfig-for-3.11' of git://git.xilinx.com/linux-xlnx:
arm: multi_v7_defconfig: Enable initrd/initramfs support
arm: multi_v7_defconfig: Enable Zynq UART driver
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://github.com/broadcom/bcm11351 into next/cleanup
From Christian Daudt:
* 'armsoc/for-3.11/cleanups' of git://github.com/broadcom/bcm11351:
ARM: bcm281xx: Remove init_irq declaration in machine description
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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next/dt
From Christian Daudt:
* 'armsoc/for-3.11/dt' of git://github.com/broadcom/bcm11351:
ARM: dts: bcm281xx: change comment to C89 style
ARM: mmc: bcm281xx SDHCI driver (dt mods)
ARM: dts: bcm281xx: use existing defines for irqs
ARM: dts: bcm281xx: use #include for device tree files
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
From Simon Horman:
Second Round of Renesas ARM-based SoC DT updates for v3.11
* Increased DT coverage for renesas-intc-irqpin
by Guennadi Liakhovetski
* Clean up of address format used in sh73a0 dtsi file
by Guennadi Liakhovetski
* tag 'renesas-dt2-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: irqpin: add a DT property to enable masking on parent
ARM: shmobile: sh73a0: remove "0x" prefix from DT node names
irqchip: renesas-intc-irqpin: DT binding for sense bitfield width
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/boards
From Simon Horman:
Second Round of Renesas ARM-based SoC board updates for v3.11
* Extended hardware coverage for the Bock-W board
by Goda-san and Morimoto-san
* Correction to Ether device name for the Bock-W board
from Sergei Shtylyov
* tag 'renesas-boards2-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: BOCK-W: change Ether device name
ARM: shmobile: bockw: add MMCIF support
ARM: shmobile: bockw: add SPI FLASH support
ARM: shmobile: bockw: add I2C device support
ARM: shmobile: BOCK-W: add Ether support
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/late
From Kukjin Kim:
based on tags/common-clk-audio
- add support for exynos5420 SoC
* tag 'soc-exynos5420-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: EXYNOS: extend soft-reset support for EXYNOS5420
ARM: EXYNOS: add secondary CPU boot base location for EXYNOS5420
clocksource: exynos_mct: use (request/free)_irq calls for local timer registration
ARM: dts: Add initial device tree support for EXYNOS5420
clk: exynos5420: register clocks using common clock framework
ARM: EXYNOS: use four additional chipid bits to identify EXYNOS family
serial: samsung: select EXYNOS specific driver data if ARCH_EXYNOS is defined
ARM: EXYNOS: Add support for EXYNOS5420 SoC
ARM: dts: list the CPU nodes for EXYNOS5250
ARM: dts: fork out common EXYNOS5 nodes
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
From Simon Horman:
Renesas ARM based SoC boot cleanup for v3.11
Work by Magnus Damm and others to clean up the boot of and move
things closer to supporting multi-arch.
As a side effect of this work it was decided to remove support for
two boards, Bonito and AP4EVB. Those patches are included in this
series as they depend on earlier patches in the series.
* tag 'renesas-cleanup-boot-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: Remove Bonito board support
ARM: shmobile: Remove AP4EVB board support
ARM: shmobile: Remove mach/memory.h
ARM: shmobile: Remove MEMORY_START/SIZE
ARM: shmobile: Enable ARM_PATCH_PHYS_VIRT
ARM: shmobile: Remove old SCU boot code
ARM: shmobile: EMEV2 SMP with SCU boot fn and args
ARM: shmobile: sh73a0 SMP with SCU boot fn and args
ARM: shmobile: r8a7779 SMP with SCU boot fn and args
ARM: shmobile: Add SCU boot function using argument
ARM: shmobile: Add SMP boot function and argument
ARM: shmobile: Rework sh7372 sleep code to use virt_to_phys()
ARM: shmobile: Remove romImage CONFIG_MEMORY_START
ARM: shmobile: Let romImage rely on default ATAGS
ARM: shmobile: uImage load address rework
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/late
From Simon Horman:
Renesas ARM based SoC cleanups for v3.11
__initdata annotations for the r8a7790 SoC by Morimoto-san.
* tag 'renesas-cleanup-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (158 commits)
ARM: shmobile: r8a7790: add __initdata on resource and device data
Based on 'renesas-pinmux-for-v3.11' and 'renesas-soc-for-v3.11
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Patches from Lee Jones:
This gets rid of mop500_snowball_ethernet_clock_enable() which is no
longer in use. It also straightens out a bug which ensures the SMSC911x's
regulator is turned on at start-up when using Device Tree.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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mop500_snowball_ethernet_clock_enable() provided a means to enable a
clock which was used for the SMSC911x Ethernet device on Snowball. It
was merely a stand-in until the driver was common clk compliant. Now
that it is, this can be removed for both DT and ATAGs booting.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
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When this node was added, the AB8500 GPIO driver was pretty broken.
As a hack, we pretended that NOMADIK GPIO 26 was the correct on/off
pin, as it was unused. It worked because AB8500 GPIO 26 was in an
'always on from boot' state. Now the AB8500 GPIO driver is working,
the default state for all the pins is 'off'. Let's flip back over to
use the correct GPIO which is _actually_ attached to the regulator.
We're also taking the opportunity to straighten out some formatting
misdemeanours, swapping spaces for tabs.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
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Here we're adding a node for the AB8500 GPIO device. This will allow
other DT:ed components to obtain GPIOs for use within their drivers.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
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* Don't leak random kernel memory to EFI variable NVRAM when attempting
to initiate garbage collection. Also, free the kernel memory when
we're done with it instead of leaking - Ben Hutchings
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
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1. Check for allocation failure
2. Clear the buffer contents, as they may actually be written to flash
3. Don't leak the buffer
Compile-tested only.
[ Tested successfully on my buggy ASUS machine - Matt ]
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
Cc: stable@vger.kernel.org
Signed-off-by: Matt Fleming <matt.fleming@intel.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/soc
From Heiko Stuebner:
Adds basic support for Rockchip Cortex-A9 SoCs.
* tag 'v3.11-rockchip-basics' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
arm: add basic support for Rockchip RK3066a boards
arm: add debug uarts for rockchip rk29xx and rk3xxx series
arm: Add basic clocks for Rockchip rk3066a SoCs
clocksource: dw_apb_timer_of: use clocksource_of_init
clocksource: dw_apb_timer_of: select DW_APB_TIMER
clocksource: dw_apb_timer_of: add clock-handling
clocksource: dw_apb_timer_of: enable the use the clocksource as sched clock
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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This adds a generic devicetree board file and a dtsi for boards
based on the RK3066a SoCs from Rockchip.
Apart from the generic parts (gic, clocks, pinctrl) the only components
currently supported are the timers, uarts and mmc ports (all DesignWare-
based).
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Olof Johansson <olof@lixom.net>
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Uarts on all recent Rockchip SoCs are Synopsis DesignWare 8250 types.
Only their addresses vary very much.
This patch adds the necessary definitions to use any of the uart ports
for early debug purposes.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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This adds a basic clock setup for rk3066a SoCs. Only the gates are
set up currently, as the mux and dividers should use the upcoming
generic devicetree bindings.
Clocks whose rates need to be known are supplied by fixed-rate
"dummy"-clocks that provide the correct rate. This is uncritical insofar
that the only bootloader currently in existence for Rockchip devices
is the propietary Rockchip one that always setups the clocks in the
necessary way.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Mike Turquette <mturquette@linaro.org>
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Add CONFIG_BLK_DEV_INITRD to the defconfig to support
initramfs and initrd.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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CodingStyle does not allow C99 style comments. Since the
dts files live in the kernel for now, make this compliant.
Signed-off-by: Matt Porter <matt.porter@linaro.org>
Acked-by: Christian Daudt <csd@broadcom.com>
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