Age | Commit message (Collapse) | Author |
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Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Tang Yuantian <b29983@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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P2020RDB-PC Board shares the same design(PCB) as P102x RDB style platforms.
The difference between this platform and the already existing P2020RDB
is mainly with respect to DDR. The P2020RDB-PC has a DDR3 memory.
The P2020RDB-PC also has a CPLD device connected to local bus.
The main differences from the P102x RDB-PC is 64-bit DDR and SYSCLK of
100Mhz.
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Tang Yuantian <b29983@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Signed-off-by: Xu Jiucheng <B37781@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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P1021RDB-PC Overview
-----------------
1Gbyte DDR3 (on board DDR)
16Mbyte NOR flash
32Mbyte eSLC NAND Flash
256 Kbit M24256 I2C EEPROM
128 Mbit SPI Flash memory
Real-time clock on I2C bus
SD/MMC connector to interface with the SD memory card
PCIex
- x1 PCIe slot or x1 PCIe to dual SATA controller
- x1 mini-PCIe slot
USB 2.0
- ULPI PHY interface: SMSC USB3300 USB PHY and Genesys Logic’s GL850A
- Two USB2.0 Type A receptacles
- One USB2.0 signal to Mini PCIe slot
eTSEC1: Connected to RGMII PHY VSC7385
eTSEC2: Connected to SGMII PHY VSC8221
eTSEC3: Connected to SGMII PHY AR8021
DUART interface: supports two UARTs up to 115200 bps for console display
Signed-off-by: Matthew McClintock <msm@freescale.com>
Signed-off-by: Xu Jiucheng <B37781@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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The ENDPROC() on sys_fadvise64_c6x() in arch/c6x/kernel/entry.S is
outside of the conditional block with the matching ENTRY() macro. This
leads a newer (v2.22 vs. v2.20) assembler to complain:
/tmp/ccGZBaPT.s: Assembler messages:
/tmp/ccGZBaPT.s: Error: .size expression for sys_fadvise64_c6x does not evaluate to a constant
The conditional block became dead code when c6x switched to generic
unistd.h and should be removed along with the offending ENDPROC().
Signed-off-by: Mark Salter <msalter@redhat.com>
Acked-by: David Howells <dhowells@redhat.com>
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git://github.com/at91linux/linux-at91 into next/dt
* 'at91-3.4-cleanup2-DT2+USB' of git://github.com/at91linux/linux-at91:
ARM: at91: sam9g20 udc add dt support
USB: at91: Device udc add dt support
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git://github.com/at91linux/linux-at91 into next/dt
* 'at91-3.4-cleanup2-DT2' of git://github.com/at91linux/linux-at91: (23 commits)
ARM: at91: dt: enable usb ehci for sam9g45 and sam9x5
ARM: at91: usb ehci add dt support
ARM: at91: dt: enable usb ohci for sam9g20, sam9g45 amd sam9x5
ARM: at91: usb ohci add dt support
ARM: at91: add Shutdown Controller (SHDWC) DT support
ARM: at91: add ram controller DT support
ARM: at91: add RSTC (Reset Controller) dt support
ARM: at91: always enable sam9 restart
ARM: at91: add pmc DT support
ARM: at91/dt: add specific DT soc init
ARM: at91/dt: add Calao DAB-MMX daugther board support for USB-A9G20
ARM: at91: sam9x5 add i2c DT support
ARM: at91: sam9g45 add i2c DT support
ARM: at91: usb_a9g20 add DT i2c support
ARM: at91: sam9g20 add i2c DT support
i2c/gpio: add DT support
ARM: at91: sam9x5 add nand support
atmel/nand: add DT support
of/mtd/nand: add generic bindings and helpers
of: introduce helper to manage boolean
...
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Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Acked-by: Arnd Bergmann <arnd@arndb.de>
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Define both uarts in kirkwood.dtsi as they are common to all kirkwood
SoCs. Each board may enable all or none of them, so they are disabled
by default. uart0 is enabled for the dreamplug.
tclk can vary for each board, so we leave it undefined in the kirkwood
dtsi. Each board can then set it as appropriate when enabling the uart.
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Move all dreamplug-specific code out of board-dt.c and into
board-dreamplug.c. This way new boards that are added during the
conversion to fdt don't clutter up board-dt.c.
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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We need to absorb kirkwood_init() into kirkwood_dt_init() so that as we
convert drivers, we can remove the platform call, eg
kirkwood_rtc_init(). This maintains compatibility with non-fdt
configurations because they still call kirkwood_init() in common.c.
As drivers are converted, we will reinstate the 'static' qualifier in
common.c.
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Also, use inclusive register size for uart0.
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Acked-by: Arnd Bergmann <arnd@arndb.de>
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It is not used anywhere in the sound driver.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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While running the latest Linux as guest under VMware in highly
over-committed situations, we have seen cases when the refined TSC
algorithm fails to get a valid tsc_start value in
tsc_refine_calibration_work from multiple attempts. As a result the
kernel keeps on scheduling the tsc_irqwork task for later. Subsequently
after several attempts when it gets a valid start value it goes through
the refined calibration and either bails out or uses the new results.
Given that the kernel originally read the TSC frequency from the
platform, which is the best it can get, I don't think there is much
value in refining it.
So for systems which get the TSC frequency from the platform we
should skip the refined tsc algorithm.
We can use the TSC_RELIABLE cpu cap flag to detect this, right now it is
set only on VMware and for Moorestown Penwell both of which have there
own TSC calibration methods.
Signed-off-by: Alok N Kataria <akataria@vmware.com>
Cc: John Stultz <johnstul@us.ibm.com>
Cc: Dirk Brandewie <dirk.brandewie@gmail.com>
Cc: Alan Cox <alan@linux.intel.com>
Cc: stable@kernel.org
[jstultz: Reworked to simply not schedule the refining work,
rather then scheduling the work and bombing out later]
Signed-off-by: John Stultz <john.stultz@linaro.org>
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The update of the vdso data happens under xtime_lock, so adding a
nested lock is pointless. Just use a seqcount to sync the readers.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Tony Luck <tony.luck@intel.com>
Signed-off-by: John Stultz <john.stultz@linaro.org>
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The update of the vdso data happens under xtime_lock, so adding a
nested lock is pointless. Just use a seqcount to sync the readers.
Reviewed-by: Andy Lutomirski <luto@amacapital.net>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: John Stultz <john.stultz@linaro.org>
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Changing the sequence count in update_vsyscall_tz() is completely
pointless.
The vdso code copies the data unprotected. There is no point to change
this as sys_tz is nowhere protected at all. See sys_gettimeofday().
Reviewed-by: Andy Lutomirski <luto@amacapital.net>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: John Stultz <john.stultz@linaro.org>
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When switching from a vsyscall capable to a non-vsyscall capable
clocksource, there was a small race, where the last vsyscall
gettimeofday before the switch might return a invalid time value
using the new non-vsyscall enabled clocksource values after the
switch is complete.
This is due to the vsyscall code checking the vclock_mode once
outside of the seqcount protected section. After it reads the
vclock mode, it doesn't re-check that the sampled clock data
that is obtained in the seqcount critical section still matches.
The fix is to sample vclock_mode inside the protected section,
and as long as it isn't VCLOCK_NONE, return the calculated
value. If it has changed and is now VCLOCK_NONE, fall back
to the syscall gettime calculation.
v2:
* Cleanup checks as suggested by tglx
* Also fix same issue present in gettimeofday path
CC: Andy Lutomirski <luto@amacapital.net>
CC: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: John Stultz <john.stultz@linaro.org>
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in commit 7230c5644188cd9e3fb380cc97dde00c464a3ba7
"powerpc: Rework lazy-interrupt handling"
I introduced a regression, accidentally calling irq tracing twice
and not properly restoring a clobbered register (r7) later used
for writing to the MSR.
This caused lockups when booting on a G5 with lockdep enabled.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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* samsung/soc:
ARM: EXYNOS: fix cycle count for periodic mode of clock event timers
ARM: EXYNOS: add support JPEG
ARM: EXYNOS: Add DMC1, allow PPMU access for DMC
ARM: SAMSUNG: Correct MIPI-CSIS io memory resource definition
ARM: SAMSUNG: fix __init attribute on regarding s3c_set_platdata()
ARM: SAMSUNG: Add __init attribute to samsung_bl_set()
ARM: S5PV210: Add usb otg phy control
ARM: S3C64XX: Add usb otg phy control
ARM: EXYNOS: Enable l2 configuration through device tree
ARM: EXYNOS: remove useless code to save/restore L2
ARM: EXYNOS: save L2 settings during bootup
ARM: S5P: add L2 early resume code
ARM: EXYNOS: Add support AFTR mode on EXYNOS4210
ARM: SAMSUNG: use spin_lock_irqsave() in clk_{enable,disable}
ARM: S3C64XX: Define some additional always off clocks
ARM: S3C64XX: Reduce residency requirement for cpuidle WFI mode
ARM: SAMSUNG: Add a callback 'notify_after' for PWM backlight control
ARM: SAMSUNG: add G2D to plat-s5p and mach-exynos
ARM: S3C64XX: Gate some more clocks by default
ARM: S3C64XX: Add basic cpuidle driver
Conflicts:
arch/arm/mach-exynos/clock.c
arch/arm/mach-exynos/common.c
This merges the earlier samsung support into the next/soc2 branch to
resolve conflicts between commits in the earlier work and the exynos5
branch.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm into next/soc2
Conflicts:
arch/arm/mach-tegra/common.c
arch/arm/mach-ux500/devices-common.c
This resolves two conflicts and lets us merge the exynos5 branch
cleanly.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/drivers
* 'next/soc-exynos5250-gpio' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: (201 commits)
gpio/samsung: use ioremap() for EXYNOS4 GPIOlib
gpio/samsung: add support GPIOlib for EXYNOS5250
ARM: EXYNOS: add support GPIO for EXYNOS5250
(update to v3.3-rc7)
Conflicts:
arch/arm/mach-pxa/pxa25x.c
arch/arm/mach-pxa/pxa27x.c
The dummy clock for the pxa rtc in those files keeps getting added and
removed in various trees. Apparently removing is the correct solution.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://gitorious.org/linux-davinci/linux-davinci into next/drivers
* 'v3.4/features' of git://gitorious.org/linux-davinci/linux-davinci:
ARM: davinci: dm644x evm: add support for VPBE display
ARM: davinci: dm644x: add support for v4l2 video display
* included from the davinci/cleanup branch:
ARM: davinci: dm644x: don't force vpfe registeration on all boards
ARM: davinci: dm644x: fix inconsistent variable naming
ARM: davinci: dm644x: improve readability using macro
ARM: davinci: streamline sysmod access
ARM: davinci: create new common platform header for davinci
ARM: davinci: dm646x: move private definitions to C file
ARM: davinci: dm365: move private definitions to C file
ARM: davinci: dm644x: move private definitions to C file
Conflicts:
arch/arm/mach-davinci/board-dm644x-evm.c
arch/arm/mach-davinci/board-neuros-osd2.c
arch/arm/mach-davinci/board-sffsdr.c
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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The ath79 usb driver doesn't do anything special and is now converted
to the generic ehci and ohci driver.
This was tested on a TP-Link TL-WR1043ND (AR9132)
Acked-by: Gabor Juhos <juhosg@openwrt.org>
CC: Imre Kaloz <kaloz@openwrt.org>
CC: linux-mips@linux-mips.org
CC: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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* renesas/soc:
ARM: mach-shmobile: ap4evb: fixup fsi2_ak4643_info typo
ARM: mach-shmobile: mackerel: Reserve DMA memory for the frame buffer
ARM: mach-shmobile: Fix ag5evm compilation by including linux/videodev2.h
ARM: mach-shmobile: Fix bonito compile breakage
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The fixes branch was merged into mainline just after v3.3-rc7,
I'm merging it into this branch to fix up a nontrivial merge
conflict. Unfortunately this means that we are now based on
a commit between -rc releases, which we normally try to avoid.
Conflicts:
arch/arm/mach-shmobile/board-mackerel.c
Resolution suggested by Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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When using the "compat" APIs, architectures will generally want to
be able to make direct syscalls to msgsnd(), shmctl(), etc., and
in the kernel we would want them to be handled directly by
compat_sys_xxx() functions, as is true for other compat syscalls.
However, for historical reasons, several of the existing compat IPC
syscalls do not do this. semctl() expects a pointer to the fourth
argument, instead of the fourth argument itself. msgsnd(), msgrcv()
and shmat() expect arguments in different order.
This change adds an ARCH_WANT_OLD_COMPAT_IPC config option that can be
set to preserve this behavior for ports that use it (x86, sparc, powerpc,
s390, and mips). No actual semantics are changed for those architectures,
and there is only a minimal amount of code refactoring in ipc/compat.c.
Newer architectures like tile (and perhaps future architectures such
as arm64 and unicore64) should not select this option, and thus can
avoid having any IPC-specific code at all in their architecture-specific
compat layer. In the same vein, if this option is not selected, IPC_64
mode is assumed, since that's what the <asm-generic> headers expect.
The workaround code in "tile" for msgsnd() and msgrcv() is removed
with this change; it also fixes the bug that shmat() and semctl() were
not being properly handled.
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
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Add basic support for e6500 core in its single threaded mode.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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The registers that describe size supported by TLB are different on MMU
v2 as well as we support power of two page sizes. For now we continue
to assume that FSL variable size array supports all page sizes up to the
maximum one reported in TLB1PS.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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The SERIAL_8250_EXTENDED option just enables access to other
less regularly used options, like SERIAL_8250_SHARE_IRQ.
Select it to get rid of this warning when selecting the child
option living underneath it.
warning: (FSL_SOC_BOOKE && SERIAL_8250_RM9K) selects
SERIAL_8250_SHARE_IRQ which has unmet direct dependencies
(HAS_IOMEM && SERIAL_8250_EXTENDED)
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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make the ECHI depends on ARCH_AT91
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: devicetree-discuss@lists.ozlabs.org
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: devicetree-discuss@lists.ozlabs.org
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next/boards
* tag 'imx35-cam-fb' of git://git.pengutronix.de/git/imx/linux-2.6:
i.MX35-PDK: Add Camera support
ARM : mx35: 3ds-board: add framebuffer device
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next/boards
* 'board-specific' of git://github.com/hzhuang1/linux:
pxa/hx4700: Remove pcmcia platform_device structure
ARM: pxa/hx4700: Reduce sleep mode battery discharge by 35%
ARM: pxa/hx4700: Remove unwanted request for GPIO105
(update to 3.3-rc7)
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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next/fixes-non-critical
* 'fixes' of git://gitorious.org/linux-davinci/linux-davinci: (2 commits)
ARM: davinci: DA850: move da850_register_pm to .init.text
ARM: davinci: cpufreq: fix compiler warning
(update to v3.3-rc7)
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Use a string to specific the wakeup mode to make it more readable.
Add the Real-time Clock Wake-up support too for sam9g45 and sam9x5.
Add AT91_SHDW_CPTWK0_MAX to specific the Max of the Wakeup Counter.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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We can now drop the call to ioremap_registers() as we have the binding for the
SDRAM/DDR Controller.
Drop ioremap_registers() for sam9x5 too.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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This is need for multiple SoC in the same kernel image and DT.
As we will chose the restart function via binding.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Specified the main Oscillator via clock binding.
This will allow to do not hardcode it anymore in the DT board at 12MHz.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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This will allow to have static Device mapping and DT probe mapping for the
System Controller.
Temporary keep the call to ioremap_registers() until we have the binding
for the SDRAM/DDR Controller.
Temporary keep the main clock hardcoded to 12MHz until we have the binding
for the PMC.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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http://www.calao-systems.com/articles.php?lng=en&pg=6099
this daughter board add the following device:
- Micro-SD socket
- TTL 3V3 - (Tx/Rx/RTS/CTS)
- I2C port
- 0.96" Serial OLED Display Module (over UART)
- MP3 decoder with Micro & Speakers
- 4x PB, 4x Leds (Blue), 3x Leds (Green, Orange, Red)
for now we add only the 2 UARTs, 4 Buttons, 7 leds and i2c via DT
used_led1 will not be re-add via DT as it's used by the motherboard too
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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For now on use i2c-gpio driver on the same pin as the hardware IP.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
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For now on use i2c-gpio driver on the same pin as the hardware IP.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
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Use i2c-gpio and enable rv3029 RTC.
Enable the rtc in the sam9g20 defconfig.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
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For now on use i2c-gpio driver on the same pin as the hardware IP.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
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Enable the nand in the cpu module with the partition.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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