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2018-09-26ARM: tegra: apalis_t30: enable emmc ddr52 modeMarcel Ziswiler
Add mmc-ddr-1_8v property enabling eMMC DDR52 mode. root@apalis-t30:~# cat /sys/kernel/debug/mmc1/ios clock: 52000000 Hz actual clock: 52000000 Hz vdd: 21 (3.3 ~ 3.4 V) bus mode: 2 (push-pull) chip select: 0 (don't care) power mode: 2 (on) bus width: 3 (8 bits) timing spec: 8 (mmc DDR52) signal voltage: 1 (1.80 V) driver type: 0 (driver type B) root@apalis-t30:~# hdparm -t /dev/mmcblk1 /dev/mmcblk1: Timing buffered disk reads: 232 MB in 3.01 seconds = 77.10 MB/sec Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: apalis_t30: add proper emmc vmmc and vqmmc suppliesMarcel Ziswiler
Add proper eMMC vmmc and vqmmc supplies e.g. fixing signalling voltage. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: apalis_t30: add i2c-thermtripMarcel Ziswiler
Add i2c-thermtrip which would set the DEV_OFF bit in the DCDC control register of the TPS65911 PMIC. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: apalis_t30: further lm95245 temperature sensor annotationMarcel Ziswiler
Further LM95245 temperature sensor annotation. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: apalis_t30: use proper irq-gpio for stmpe811Marcel Ziswiler
Use proper irq-gpio for stmpe811 touch controller. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: apalis_t30: add missing pinmuxMarcel Ziswiler
Explicitly mux all T30 SoC balls now: - Apalis GPIO - Apalis HDMI1 - Apalis I2C1 - Apalis I2C2 (DDC) - Apalis LCD1 - Apalis Parallel Camera - Apalis SATA1_ACT# - Apalis SPDIF1 - Apalis TS (Low-speed type specific) - Apalis USBH_EN - Apalis USBH_OC# - Apalis VGA1 - on-module i210/i211 LAN control signals - not connected and therefore disabled signals Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: apalis_t30: pinmux clean-upMarcel Ziswiler
Clean-up pinmuxing: - white-space clean-up - explicitly disable input of BKL1_ON, BKL1_PWM and BKL1_PWM_EN# - annotate Apalis I2C3 usage for CAM - get rid of nvidia,lock property - add missing eMMC sdmmc4_cmd_pt7 and explicitly enable input - explicitly disable lcd_dc1_pd2 (e.g. LM95245 I2C address pin) - annotate TOUCH_PEN_INT# being on-module - As underscores in node names are not recommended replace them all where possible with dashes. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: apalis_t30: drop pwmledsMarcel Ziswiler
Drop pwmleds in favour of using regular PWMs. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: apalis_t30: reorder backlight propertiesMarcel Ziswiler
Reorder backlight properties. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: apalis_t30: move dr_mode property from phy to controllerMarcel Ziswiler
Move dr_mode property from USB PHY node to controller. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: apalis_t30: annotate mmc1/sd1Marcel Ziswiler
Annotate MMC1/SD1. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: apalis_t30: drop unused mmc1/sd1 labelsMarcel Ziswiler
Drop unused mmc1/sd1 labels. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: apalis_t30: white-space/newline clean-upMarcel Ziswiler
White-space and newline clean-up. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: apalis_t30: drop unused cami2c labelMarcel Ziswiler
Drop unused cami2c label. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: apalis_t30: annotate uarts and move compatible to boardMarcel Ziswiler
Annotate UARTs and move the serial UART "nvidia,tegra30-hsuart" compatible definitions from the carrier board to the module level device trees. One could still override this in a custom carrier board device tree if required. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: apalis_t30: add missing regulatorsMarcel Ziswiler
Add missing regulators: - reg_module_3v3_audio being VDDA supply of SGTL5000 - VDDD supply of SGTL5000 actually being reg_1v8_vio - carrier board HDMI supply being reg_5v0 - carrier board reg_3v3 actually being backlight and panel power supply Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: apalis_t30: regulator clean-upMarcel Ziswiler
Just cosmetic regulator clean-up. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: apalis_t30: reorder host1x/hdmi propertiesMarcel Ziswiler
Reorder Host1x/HDMI properties. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: apalis_t30: annotate/clean-up pcie controller/port nodesMarcel Ziswiler
Annotate PCIe port nodes and clean-up PCIe controller/port status' with respect to carrier board vs. module level device trees. As port 3 connects to the on-module Gigabit Ethernet MACPHY it is always enabled together with the PCIe controller itself. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: apalis_t30: reorder pcie propertiesMarcel Ziswiler
Reorder PCIe properties. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: apalis_t30: add local-mac-address propertyMarcel Ziswiler
Add empty local-mac-address property to be filled in by boot loader (e.g. U-Boot). Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: apalis_t30: pull-up sd card detect pinsMarcel Ziswiler
In order to avoid any floating SD card detect pins as may e.g. happen on Ixora V1.1A pull them all up. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: apalis_t30: fix mmc1 cmd pull-upMarcel Ziswiler
Fix MMC1 cmd pin pull-up causing issues on carrier boards without external pull-up. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26xen: don't include <xen/xen.h> from <asm/io.h> and <asm/dma-mapping.h>Christoph Hellwig
Nothing Xen specific in these headers, which get included from a lot of code in the kernel. So prune the includes and move them to the Xen-specific files that actually use them instead. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Jens Axboe <axboe@kernel.dk>
2018-09-26block: remove ARCH_BIOVEC_PHYS_MERGEABLEChristoph Hellwig
Take the Xen check into the core code instead of delegating it to the architectures. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Jens Axboe <axboe@kernel.dk>
2018-09-26xen: provide a prototype for xen_biovec_phys_mergeable in xen.hChristoph Hellwig
Having multiple externs in arch headers is not a good way to provide a common interface. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Jens Axboe <axboe@kernel.dk>
2018-09-26arm: remove the unused BIOVEC_MERGEABLE defineChristoph Hellwig
Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Jens Axboe <axboe@kernel.dk>
2018-09-26ARM: dts: tegra20/tegra30: add pmu interrupt-affinityMarcel Ziswiler
This is similar to tegra124 and avoids the following being reported upon boot: hw perfevents: no interrupt-affinity property for /pmu, guessing. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: dts: tegra20: restore address orderMarcel Ziswiler
Commit 6c468f109884 ("ARM: dts: tegra: add Tegra20 NAND flash controller node") introduced the nand-controller node. However, it got added at the wrong spot not honoring the address order. Fix this. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: dts: tegra30: fix xcvr-setup-use-fusesMarcel Ziswiler
There was a dot instead of a comma. Fix this. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26arm64: tegra: I2C on Tegra194 is not compatible with Tegra114Thierry Reding
Tegra194 contains a version of the I2C controller that is no longer compatible with the version found in Tegra114. Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: dts: rockchip: add rk3288-based Tinker board SDavid Summers
Add the actual dts for the tinker board S, which brings its own emmc device, not therefore not requiring an sd-card to boot. Signed-off-by: David Summers <beagleboard@davidjohnsummers.uk> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2018-09-26ARM: dts: rockchip: move shared tinker-board nodes to a common dtsiDavid Summers
Tinker Board and Tinker Board S share most of their components, so should also not replicate these for each variant. So move them to a shared dtsi that then can get included by both boards. Signed-off-by: David Summers <beagleboard@davidjohnsummers.uk> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2018-09-26arm64: dts: marvell: armada-cp110: describe more PPv2 interruptsAntoine Tenart
This patch describes 3 additional interrupts per PPv2 port. Those interrupts will be used later in future versions of the Marvell PPv2 driver, and now the device tree description matches the hardware capabilities. Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2018-09-26arm64: dts: marvell: armada-cp110: change the PPv2 IRQ namesAntoine Tenart
This patch changes the PPv2 IRQ names in the CP110 device tree to match a corresponding change in the Marvell PPv2 driver. The reason this was updated is the IRQ where names after Tx/Rx interrupts, but this is not true and can be configured. A following patch will add more of them and the names wouldn't make sense. Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2018-09-26x86/speculation: Propagate information about RSB filling mitigation to sysfsJiri Kosina
If spectrev2 mitigation has been enabled, RSB is filled on context switch in order to protect from various classes of spectrev2 attacks. If this mitigation is enabled, say so in sysfs for spectrev2. Signed-off-by: Jiri Kosina <jkosina@suse.cz> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Josh Poimboeuf <jpoimboe@redhat.com> Cc: Andrea Arcangeli <aarcange@redhat.com> Cc: "WoodhouseDavid" <dwmw@amazon.co.uk> Cc: Andi Kleen <ak@linux.intel.com> Cc: Tim Chen <tim.c.chen@linux.intel.com> Cc: "SchauflerCasey" <casey.schaufler@intel.com> Link: https://lkml.kernel.org/r/nycvar.YFH.7.76.1809251438580.15880@cbobk.fhfr.pm
2018-09-26x86/speculation: Enable cross-hyperthread spectre v2 STIBP mitigationJiri Kosina
STIBP is a feature provided by certain Intel ucodes / CPUs. This feature (once enabled) prevents cross-hyperthread control of decisions made by indirect branch predictors. Enable this feature if - the CPU is vulnerable to spectre v2 - the CPU supports SMT and has SMT siblings online - spectre_v2 mitigation autoselection is enabled (default) After some previous discussion, this leaves STIBP on all the time, as wrmsr on crossing kernel boundary is a no-no. This could perhaps later be a bit more optimized (like disabling it in NOHZ, experiment with disabling it in idle, etc) if needed. Note that the synchronization of the mask manipulation via newly added spec_ctrl_mutex is currently not strictly needed, as the only updater is already being serialized by cpu_add_remove_lock, but let's make this a little bit more future-proof. Signed-off-by: Jiri Kosina <jkosina@suse.cz> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Josh Poimboeuf <jpoimboe@redhat.com> Cc: Andrea Arcangeli <aarcange@redhat.com> Cc: "WoodhouseDavid" <dwmw@amazon.co.uk> Cc: Andi Kleen <ak@linux.intel.com> Cc: Tim Chen <tim.c.chen@linux.intel.com> Cc: "SchauflerCasey" <casey.schaufler@intel.com> Cc: stable@vger.kernel.org Link: https://lkml.kernel.org/r/nycvar.YFH.7.76.1809251438240.15880@cbobk.fhfr.pm
2018-09-26x86/speculation: Apply IBPB more strictly to avoid cross-process data leakJiri Kosina
Currently, IBPB is only issued in cases when switching into a non-dumpable process, the rationale being to protect such 'important and security sensitive' processess (such as GPG) from data leaking into a different userspace process via spectre v2. This is however completely insufficient to provide proper userspace-to-userpace spectrev2 protection, as any process can poison branch buffers before being scheduled out, and the newly scheduled process immediately becomes spectrev2 victim. In order to minimize the performance impact (for usecases that do require spectrev2 protection), issue the barrier only in cases when switching between processess where the victim can't be ptraced by the potential attacker (as in such cases, the attacker doesn't have to bother with branch buffers at all). [ tglx: Split up PTRACE_MODE_NOACCESS_CHK into PTRACE_MODE_SCHED and PTRACE_MODE_IBPB to be able to do ptrace() context tracking reasonably fine-grained ] Fixes: 18bf3c3ea8 ("x86/speculation: Use Indirect Branch Prediction Barrier in context switch") Originally-by: Tim Chen <tim.c.chen@linux.intel.com> Signed-off-by: Jiri Kosina <jkosina@suse.cz> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Josh Poimboeuf <jpoimboe@redhat.com> Cc: Andrea Arcangeli <aarcange@redhat.com> Cc: "WoodhouseDavid" <dwmw@amazon.co.uk> Cc: Andi Kleen <ak@linux.intel.com> Cc: "SchauflerCasey" <casey.schaufler@intel.com> Link: https://lkml.kernel.org/r/nycvar.YFH.7.76.1809251437340.15880@cbobk.fhfr.pm
2018-09-26arm64: dts: add support for SolidRun Clearfog GT 8KBaruch Siach
The SolidRun Clearfog GT-8K is based on Marvell Armada 8040 SoC. https://wiki.solid-run.com/doku.php?id=products:a8040:clearfoggt8k The following devices were tested with this DT on top of kernel v4.19-rc4: * 1GB Ethernet WAN * 4 ports 1GB Ethernet switch (2.5GB uplink) * SFP port * SATA on CON3 PCIe slot * USB3 type A port * SD card and eMMC * 2 LEDs * 2 push buttons [gregory: fix block comment alignement] Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2018-09-26arm64: dts: rockchip: add missing address and size cells for rk3399 mipi dsiHeiko Stuebner
DSI controllers are also the hosts of their dsi bus and therefore contain nodes describing the attached panels with their reg properties containing the virtual ids. The dsi controller nodes on rk3399 lacked the #address-cells and #size-cells for these subnodes, so add them. Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2018-09-26arm64: dts: rockchip: Enable SPI NOR flash on Rock64Chen-Yu Tsai
The Pine64 Rock64 board comes with a GigaDevice GD25Q128CSIG or GD25Q127CSIG chip, which is a 128 Mbit SPI NOR flash chip that supports the JEDEC read-ID command. This patch enables the SPI controller and adds a device node for the flash chip using the generic "jedec,spi-nor" comaptible. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2018-09-26arm64: dts: rockchip: add initial dts support for Rockpro64Akash Gajjar
Rockpro64 is a rockchip RK3399 based board from pine64.org. This patch adds basic device node support for Rockpro64 board and make it able to bring up. Peripheral Works - Sdcard - USB 2.0, 3.0 - Leds - Ethernet - Debug console Not working: - USB Type-C Signed-off-by: Akash Gajjar <Akash_Gajjar@mentor.com> Acked-by: Deepak Das <Deepak_Das@mentor.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2018-09-26arm64: dts: renesas: r8a77965: Add Sound and Audio DMAC device nodesTakeshi Kihara
Based on a similar patch of the R8A7796 device tree by Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com> Tested-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-26x86: boot: Fix EFI stub alignmentBen Hutchings
We currently align the end of the compressed image to a multiple of 16. However, the PE-COFF header included in the EFI stub says that the file alignment is 32 bytes, and when adding an EFI signature to the file it must first be padded to this alignment. sbsigntool commands warn about this: warning: file-aligned section .text extends beyond end of file warning: checksum areas are greater than image size. Invalid section table? Worse, pesign -at least when creating a detached signature- uses the hash of the unpadded file, resulting in an invalid signature if padding is required. Avoid both these problems by increasing alignment to 32 bytes when CONFIG_EFI_STUB is enabled. Signed-off-by: Ben Hutchings <ben@decadent.org.uk> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
2018-09-26efi/x86: Call efi_parse_options() from efi_main()Hans de Goede
Before this commit we were only calling efi_parse_options() from make_boot_params(), but make_boot_params() only gets called if the kernel gets booted directly as an EFI executable. So when booted through e.g. grub we ended up not parsing the commandline in the boot code. This makes the drivers/firmware/efi/libstub code ignore the "quiet" commandline argument resulting in the following message being printed: "EFI stub: UEFI Secure Boot is enabled." Despite the quiet request. This commits adds an extra call to efi_parse_options() to efi_main() to make sure that the options are always processed. This fixes quiet not working. This also fixes the libstub code ignoring nokaslr and efi=nochunk. Reported-by: Peter Robinson <pbrobinson@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
2018-09-26efi/x86: earlyprintk - Add 64bit efi fb address supportAaron Ma
EFI GOP uses 64-bit frame buffer address in some BIOS. Add 64bit address support in efi earlyprintk. Signed-off-by: Aaron Ma <aaron.ma@canonical.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
2018-09-26efi/x86: drop task_lock() from efi_switch_mm()Sebastian Andrzej Siewior
efi_switch_mm() is a wrapper around switch_mm() which saves current's ->active_mm, sets the requests mm as ->active_mm and invokes switch_mm(). I don't think that task_lock() is required during that procedure. It protects ->mm which isn't changed here. It needs to be mentioned that during the whole procedure (switch to EFI's mm and back) the preemption needs to be disabled. A context switch at this point would reset the cr3 value based on current->mm. Also, this function may not be invoked at the same time on a different CPU because it would overwrite the efi_scratch.prev_mm information. Remove task_lock() and also update the comment to reflect it. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
2018-09-26efi/x86: Handle page faults occurring while running EFI runtime servicesSai Praneeth
Memory accesses performed by UEFI runtime services should be limited to: - reading/executing from EFI_RUNTIME_SERVICES_CODE memory regions - reading/writing from/to EFI_RUNTIME_SERVICES_DATA memory regions - reading/writing by-ref arguments - reading/writing from/to the stack. Accesses outside these regions may cause the kernel to hang because the memory region requested by the firmware isn't mapped in efi_pgd, which causes a page fault in ring 0 and the kernel fails to handle it, leading to die(). To save kernel from hanging, add an EFI specific page fault handler which recovers from such faults by 1. If the efi runtime service is efi_reset_system(), reboot the machine through BIOS. 2. If the efi runtime service is _not_ efi_reset_system(), then freeze efi_rts_wq and schedule a new process. The EFI page fault handler offers us two advantages: 1. Avoid potential hangs caused by buggy firmware. 2. Shout loud that the firmware is buggy and hence is not a kernel bug. Tested-by: Bhupesh Sharma <bhsharma@redhat.com> Suggested-by: Matt Fleming <matt@codeblueprint.co.uk> Based-on-code-from: Ricardo Neri <ricardo.neri@intel.com> Signed-off-by: Sai Praneeth Prakhya <sai.praneeth.prakhya@intel.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> [ardb: clarify commit log] Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
2018-09-26ARM: dts: imx6qdl-zii-rdu2: Disable the internal RTCFabio Estevam
On the imx6qdl-zii-rdu2 board the RTC functionality is provided via a DS1341 RTC connected via I2C bus, so we can safely disable the internal one. Reported-by: Chris Healy <cphealy@gmail.com> Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Tested-by: Chris Healy <cphealy@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-09-26ARM: dts: imx51-zii-rdu1: Fix the rtc compatible stringFabio Estevam
According to Documentation/devicetree/bindings/rtc/rtc-ds1307.txt the original compatible "maxim,ds1341" is not a valid entry. Switch to the documented "dallas,ds1341" compatible. Reported-by: Chris Healy <cphealy@gmail.com> Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Tested-by: Chris Healy <cphealy@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
generated by cgit (git 2.34.1) at 2025-09-21 02:20:01 +0000