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Some cpuid features (like xsaveopt) are enumerated using cpuid
subleaves.
Extend init_scattered_cpuid_features() to take subleaf into account.
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
LKML-Reference: <20100719230205.439900717@sbs-t61.sc.intel.com>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
x86, pci, mrst: Add extra sanity check in walking the PCI extended cap chain
x86: Fix x2apic preenabled system with kexec
x86: Force HPET readback_cmp for all ATI chipsets
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Use for_each_pci_dev() to simplify the code.
Signed-off-by: Kulikov Vasiliy <segooon@gmail.com>
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
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Trivial fix in a typo (enalbed for enabled).
Signed-off-by: Davidlohr Bueso <dave@gnu.org>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
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pavel@suse.cz no longer works, replace it with working address.
Signed-off-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
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The current shrinker implementation requires the registered callback
to have global state to work from. This makes it difficult to shrink
caches that are not global (e.g. per-filesystem caches). Pass the shrinker
structure to the callback so that users can embed the shrinker structure
in the context the shrinker needs to operate on and get back to it in the
callback via container_of().
Signed-off-by: Dave Chinner <dchinner@redhat.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
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Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/frob/linux-2.6-roland
* 'x86/kprobes' of git://git.kernel.org/pub/scm/linux/kernel/git/frob/linux-2.6-roland:
x86: kprobes: fix swapped segment registers in kretprobe
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In commit f007ea26, the order of the %es and %ds segment registers
got accidentally swapped, so synthesized 'struct pt_regs' frames
have the two values inverted. It's almost sure that these values
never matter, and that they also never differ. But wrong is wrong.
Signed-off-by: Roland McGrath <roland@redhat.com>
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This adds some platform data for the character LCD found in the
RealView and Versatile reference designs from ARM.
Signed-off-by: Linus Walleij <triad@df.lth.se>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Allow the vbus signal to optionally use polling. This is required if
the vbus signal is connected to an non-interrupting io expander for
example. If vbus is in polling mode, then it is assumed that the vbus
gpio may sleep. Also add an option to have vbus be an active low
signal. Both options are set in the platform data for the device.
Signed-off-by: Ryan Mallon <ryan@bluewatersys.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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If TCM is in use, we should display it in the virtual memory
layout along with everything else.
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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CPUs v6 and up support multiple TCM banks, for example an ITCM of
8k is supplied in two 4k banks. This makes the TCM work on the
1176JZF-S devchip.
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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The earlier TCM memory regions were mapped as MT_MEMORY_UNCACHED
which doesn't really work on platforms supporting the new v6
features like the NX bit. Add unique MT_MEMORY_[I|D]TCM types
instead.
Cc: Nicolas Pitre <nico@fluxnic.net>
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
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The code to support the DNS-323 rev C1 added a call to
phy_register_fixup_for_uid() and therefore phylib has to
be built in.
Signed-off-by: Martin Michlmayr <tbm@cyrius.com>
Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
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Signed-off-by: Simon Guinot <sguinot@lacie.com>
Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
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This patch add a LED class driver for the dual-GPIO LEDs found on the
Network Space v2 board (and parents). This include Internet Space v2,
Network Space (Max) v2 and d2 Network v2 boards.
This dual-GPIO LED is wired to a CPLD and can blink in relation with the
SATA activity. The driver expose this capability through a "sata" sysfs
attribute.
Signed-off-by: Simon Guinot <sguinot@lacie.com>
Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
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Signed-off-by: Simon Guinot <sguinot@lacie.com>
Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
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Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
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Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
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This patch extends the kirkwood's PCIe support up to 2 controllers as in the 6282 devices.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
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Add private_data pointer to the pci_sys_data, this pointer can be
used for holding platform specific data for each pci controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
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The 6282 SoC is compatible to 6280 and features faster CPU, DDR3, additional
PCIe interface, and LCD controller. More information can be found here:
http://www.marvell.com/products/processors/embedded/armada_300/armada_310.pdf
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
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Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
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In case the board is configured to boot from spi flash, the mpps
will not be configured to select the NAND I/Os. This patch makes
sure to select the NAND I/O's regardless to the boot device type.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
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Some platforms, such as the DNS-323 rev C requires the soft reset line
to be toggled on and back off for the reset to work.
Note: The choice of 200ms delay comes from the 2.6.12 based vendor kernel.
It seems to be a -lot- though and I had my device working fine with much
smaller delays but better safe...
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
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This patch adds the base support for this new HW revision to the existing
dns323-setup.c file. The SoC seems to be the same as rev B1, the GPIOs
are all wired differently though and the fan control isn't i2c based
anymore.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
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This patch adds support for the OpenRD Ultimate machine (could be found
at http://www.arm.linux.org.uk/developer/machines/list.php?id=2884)
Signed-off-by: Dmytro Milinevskyy <milinevskyy@gmail.com>
Acked-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
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Patch found in QNAPs vendor source package, with some cleanups
(proper defines, shortened max. timeout from 1s to 200ms).
Without this patch the PCIe SATA controller (Marvell 88sx7042/sata_mv)
in my QNAP TS-419P (Marvell 88f6281/Kirkwood) stops working after a
few minutes.
The symptomes are described in this thread:
http://marc.info/?l=linux-ide&m=124822863706181&w=2
[ Note: this is a workaround in need of a better analysis/solution -- NP ]
Acked-by: Saeed Bishara <saeed@marvell.com>
Tested-by: Bernhard R. Link <brl@pcpool00.mathematik.uni-freiburg.de>
Seconded-by: Martin Michlmayr <tbm@cyrius.com>
I'm_not_very_happy_with_it-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
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Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
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Add support for the HP t5325 Thin Client. This thin client is based
on a Marvell Kirkwood chip at 1.2 GHz and features 512 MB RAM, 512 MB
SATA-attached flash and an XGI Volari Z11 GPU.
Signed-off-by: Martin Michlmayr <tbm@cyrius.com>
Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
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MPP44 can be used to differentiate between one-bay (TS-11x) and
two-bay (TS-21x) devices.
According to an engineer from QNAP, the setting of MPP44 depends
on the firmware rather than hardware. Presumably, this means
that you could fake the MPP44 value by changing the boot loader.
Signed-off-by: Martin Michlmayr <tbm@cyrius.com>
Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
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Add MPP definitions for Marvell Kirkwood 88F6282 revision.
Update some defines to reflect datasheet's MPP names.
Signed-off-by: Benjamin Zores <benjamin.zores@alcatel-lucent.com>
Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
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Among other changes, commit b2a731aa ("D-link DNS-323 revision A1 power
LED") changed the default behaviour of the power LED from solid to
blinking. This was done to match the original DNS-323 firmware which
blinks during the boot process and sets the LED to solid when booting
has completed. However, the downside of this behaviour is that it
requires userland code to change the LED, even for those who don't
care about the behaviour of the original firmware. Therefore, change
it to solid again and let those who care about the original behaviour
change the behaviour from userland.
Signed-off-by: Martin Michlmayr <tbm@cyrius.com>
Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
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On the QNAP TS-41x, MPP45 is used to show the setting of jumper JP1.
Fix the documentation to explain what the settings really indicate.
Signed-off-by: Martin Michlmayr <tbm@cyrius.com>
Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
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Export GPIO 45 which is used to indicate the setting of the JP1
jumper. This is useful for userland tools, such as qcontrol, to
see whether the LCD or a serial console is connected.
Signed-off-by: Martin Michlmayr <tbm@cyrius.com>
Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
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Fix the following warning :
WARNING: vmlinux.o(.text+0x95a0): Section mismatch in reference from the
function qnap_tsx1x_register_flash() to the (unknown reference) .init.data:(unknown)
The function qnap_tsx1x_register_flash() references
the (unknown reference) __initdata (unknown).
This is often because qnap_tsx1x_register_flash lacks a __initdata
annotation or the annotation of (unknown) is wrong.
Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
Signed-off-by: Martin Michlmayr <tbm@cyrius.com>
Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
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The fixed bar capability structure is searched in PCI extended
configuration space. We need to make sure there is a valid capability
ID to begin with otherwise, the search code may stuck in a infinite
loop which results in boot hang. This patch adds additional check for
cap ID 0, which is also invalid, and indicates end of chain.
End of chain is supposed to have all fields zero, but that doesn't
seem to always be the case in the field.
Suggested-by: "H. Peter Anvin" <hpa@zytor.com>
Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
LKML-Reference: <1279306706-27087-1-git-send-email-jacob.jun.pan@linux.intel.com>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
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Found one x2apic system kexec loop test failed
when CONFIG_NMI_WATCHDOG=y (old) or CONFIG_LOCKUP_DETECTOR=y (current tip)
first kernel can kexec second kernel, but second kernel can not kexec third one.
it can be duplicated on another system with BIOS preenabled x2apic.
First kernel can not kexec second kernel.
It turns out, when kernel boot with pre-enabled x2apic, it will not execute
disable_local_APIC on shutdown path.
when init_apic_mappings() is called in setup_arch, it will skip setting of
apic_phys when x2apic_mode is set. ( x2apic_mode is much early check_x2apic())
Then later, disable_local_APIC() will bail out early because !apic_phys.
So check !x2apic_mode in x2apic_mode in disable_local_APIC with !apic_phys.
another solution could be updating init_apic_mappings() to set apic_phys even
for preenabled x2apic system. Actually even for x2apic system, that lapic
address is mapped already in early stage.
BTW: is there any x2apic preenabled system with apicid of boot cpu > 255?
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
LKML-Reference: <4C3EB22B.3000701@kernel.org>
Acked-by: Suresh Siddha <suresh.b.siddha@intel.com>
Cc: stable@kernel.org
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
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If we fail to assign resources to a PCI BAR, this patch makes us try the
original address from BIOS rather than leaving it disabled.
Linux tries to make sure all PCI device BARs are inside the upstream
PCI host bridge or P2P bridge apertures, reassigning BARs if necessary.
Windows does similar reassignment.
Before this patch, if we could not move a BAR into an aperture, we left
the resource unassigned, i.e., at address zero. Windows leaves such BARs
at the original BIOS addresses, and this patch makes Linux do the same.
This is a bit ugly because we disable the resource long before we try to
reassign it, so we have to keep track of the BIOS BAR address somewhere.
For lack of a better place, I put it in the struct pci_dev.
I think it would be cleaner to attempt the assignment immediately when the
claim fails, so we could easily remember the original address. But we
currently claim motherboard resources in the middle, after attempting to
claim PCI resources and before assigning new PCI resources, and changing
that is a fairly big job.
Addresses https://bugzilla.kernel.org/show_bug.cgi?id=16263
Reported-by: Andrew <nitr0@seti.kr.ua>
Tested-by: Andrew <nitr0@seti.kr.ua>
Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
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If kmalloc() fails exit with -ENOMEM.
Signed-off-by: Kulikov Vasiliy <segooon@gmail.com>
Acked-by: Chris Metcalf <cmetcalf@tilera.com>
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Conflicts:
arch/arm/configs/lusl7200_defconfig
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Add a common early allocator function, in preparation for switching
over to LMB. When we do, this function will need to do a little more
than just allocating memory; we need it zero initialized too.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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The logic in this file is rather convoluted, but essentially:
1. region type 0 is SDRAM
2. referring to the code fragment
if (set_fbmem_region_type(&rg, OMAPFB_MEMTYPE_SDRAM,
sdram_start, sdram_size) < 0 ||
(rg.type != OMAPFB_MEMTYPE_SDRAM))
continue;
- if rg.type is not OMAPFB_MEMTYPE_SDRAM, set_fbmem_region_type()
returns zero immediately (since rg.type is non-zero), and so we
'continue'.
- if rg.type is OMAPFB_MEMTYPE_SDRAM, and rg.paddr is zero,
we fall through.
- if rg.type is OMAPFB_MEMTYPE_SDRAM, and the region lies within
SDRAM, we fall through.
- if rg.type is OMAPFB_MEMTYPE_SDRAM, and the region is not within
SDRAM, we 'continue'.
3. check_fbmem_region seems unnecessary.
- we know rg.type is OMAPFB_MEMTYPE_SDRAM
- we can check rg.size independently
- bootmem_reserve() can check for overlapping reservations itself
- we've already validated that the requested region lies within SDRAM.
4. avoid BUG()ing if the region entry is already set; print an error,
and mark the configuration invalid - at least we'll continue booting
so the error message has a chance of being logged/visible via serial
console.
With these changes in place, it makes the code much easier to understand
and hence easier to convert to LMB.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Move the platform specific bootmem memory reservations out of
arch/arm/mm/mmu.c into their respective platform files.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Since we no longer support discontigmem, node is always zero, so
remove this argument.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Everything should now be using sparsemem rather than discontigmem, so
remove the code supporting discontigmem from ARM.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Rather than storing the minimum size of the vmalloc area, store the
maximum permitted address of the vmalloc area instead.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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