Age | Commit message (Collapse) | Author |
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Syscall can be called only from userspace that's why
we don't need to check which space kernel come from.
Kernel syscall calling is not check and shouldn't come
throught this part of code.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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We can save one more instruction if PT_MODE is saved in delay slot
Signed-off-by: Michal Simek <monstr@monstr.eu>
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Save instructions by using delay slot and
clear UMS only if kernel comes from user space.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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Saving some instructions. Clear VMS bit if kernel comes
from kernel space.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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Saving instructions by adding 2/3 addik instructions to one.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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Saving instruction with delay slot usage.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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This change save one instruction if kernel comes from kernel
space.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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Separate reg saving and mode setting.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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SAVE_STATE macro could be used by other rutines too.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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We are not working with values from MSR that's why
we can discard it and use r11 for different purpose without
saving/restoring.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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Remove set_vms because UMS is cleared and VMS is already setup.
Optimize function calling which save one additional instruction.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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VMS is always setup because VM mode was before
exception/syscall/interrupt. Kernel continues in kernel mode
that's why we have to clear UMS bit if kernel comes from
user space.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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PT_MODE stores information if kernel comes from user
or kernel space. If come from user space, PT_MODE
contains 0. If come from kernel store, PT_MODE contains
non zero value. We don't need to save value 1. I am using
r1 register which contains non zero value.
This change save one additional instruction.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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SAVE_STATE macro could be used for user_exception
or interrupt functions.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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We don't need to save r0 to PT_R0. It could be additional
operation.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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We don't need to save R11 register. There is easy way
to use only R1 which is saved and restore later.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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BIP is already setup.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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Keep together all arguments for send_sig function.
Move returning address to delay slot which is executed.
Remove additional send_sig loading. I am using IMM part of
rtbd instruction with r0.
old solution:
addik r11, r0, send_sig
rtbd r11, 0
nop
new solution:
rtbd r0, send_sig
nop
There is one instruction saving.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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It is necessary to setup BIP and EE and clear EIP
only for unaligned exception handler. The rest of
hw exception handlers don't require it.
HW exception occured and we are not in virtual mode.
That's why we can do operations protected by EIP.
Interrupt, next hw exception or syscall can't occur.
EIP is cleared by rted.
This change speedup page_fault hw exception handler
which is critical path.
There is also necessary to save R11 content before
flag setup for unaligned exception.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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la is translated to addik by toolchain.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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SAVE_STATE macro is used in hw exceptions high level handling
functions. Hw exception doesn't disable IRQ that's why we don't
need to reenable it.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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Remove code duplicity and move it to SAVE_STATE macro.
There is no impact on performance.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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We don't need to protect by BIP whole ret_from_trap/ret_from_exc code.
Only restoring from user/hw exception should be covered.
If BIP is setup, IRQ can't occur.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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There is a way howto remove Kernel Mode variable. It is easier
to parse UMS bit in MSR to find out if I come from kernel or user
space. Loading MSR content should be in one cycle and loading
PER_CPU variable depends on memory state.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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We can save two instruction when MSR_VMS and MSR_UMS
are setup in one instruction.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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Save and restore R3/R4 registers in macros. This change
help to cleanup entry.S.
In ret_from_trap function we are saving returning value from
syscall to pt_regs on stack that's why we don't need to save and
restore these values before kernel functions (schedule, do_signal).
Signed-off-by: Michal Simek <monstr@monstr.eu>
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Jump behind macro. We don't want to execute nop instruction again.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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_start symbol stores physical address where kernel is.
Gdb uses this symbol for their purpose that's why
we have to rename it.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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Remove spaces and use tabs instead.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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Microblaze has only 11 pvr regs according manual.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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Lower shifting values ensure that shifted 32bit counter
value doesn't exceed 64bit cycle variable too fast.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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Microblaze has support for early printk. The second serial
driver (uart16550/8250) has no microblaze support for early
printk.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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HAVE_ARCH_PCI_SET_DMA_MASK was removed in 2.6.34 (no architecture has
the own implementation of pci_set_dma_mask).
Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
Signed-off-by: Michal Simek <monstr@monstr.eu>
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IRQsoff tracer requires to protect cpu_idle function
to get correct timing report.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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I had to comment sched_clock generic function because of broken toolchain.
It is fine grain timing.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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Implement intelligent backtracing by searching for stack frame creation,
and emitting only return addresses. Use print_hex_dump() to display the
entire binary kernel stack.
Limitation: MMU kernels are not currently able to trace beyond a system trap
(interrupt, syscall, etc.). It is the intent of this patch to provide
infrastructure that can be extended to add this capability later.
Changes from V1:
* Removed checks in find_frame_creation() that prevented location of the frame
creation instruction in heavily optimized code
* Various formatting/commenting/file location tweaks per review comments
* Dropped Kconfig option to enable STACKTRACE as something logically separate
Signed-off-by: Steven J. Magnani <steve@digidescorp.com>
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Allow developer to configure memory page size at compile time.
Larger pages can improve performance on some workloads.
Based on PowerPC code.
Signed-off-by: Steven J. Magnani <steve@digidescorp.com>
Signed-off-by: Michal Simek <monstr@monstr.eu>
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Add trace_hardirqs_off and trace_hardirqs_on to do_IRQ function.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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sys_clone syscall ignored args which this patch mapped to args
which are passing from glibc.
Here is the origin problem description.
"I ran the static libgcc tests (very few of them are there, they are
mostly dynamically linked) and some of them fail with an assertion in
fork() system call (tid != pid), I looked at the microblaze/entry.S
file and it looks suspicious (ignores arguments 3-5)"
Arg mapping should be:
glibc ARCH_FORK(...) -> do_fork(...)
r5 -> r5 (clone_flags)
r6 -> r6 (stack_start, use parent->stack if NULL)
pt_regs -> r7 (pt_regs)
r7 -> r8 (stack_size)
r8 -> r9 (parent_tidptr)
r9 -> r10 (child_tidptr)
Signed-off-by: John Williams <john.williams@petalogix.com>
Signed-off-by: Michal Simek <monstr@monstr.eu>
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copy_to_user_page macro is used in mm/memory.c:access_process_vm
function. This function is called from ptrace code (POKETEXT, POKEDATA)
which write data to memory. Microblaze handle physical address for
caches that's why there is virt_to_phys conversion.
There is potential one location which can caused the problem on WB system.
The important is take a look at write PTRACEs requests
(POKE/TEXT, DATA, USR).
Note:
Majority of Microblaze PTRACE code is moved to generic location
in newer kernel version that's why this solution should work on
the newest kernel version too.
linux/io.h is in cacheflush because of mm/nommu.c
Tested on a WB system - hello world debugging.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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Both versions can use the same node to register NODE_DATA(0)
Signed-off-by: Michal Simek <monstr@monstr.eu>
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The label should be remove by
21e1c93631e027136ea4070e7bca600c4ad4f391
Warning message:
arch/microblaze/mm/fault.c: In function 'do_page_fault':
arch/microblaze/mm/fault.c:229: warning: label 'survive' defined but not used
Signed-off-by: Michal Simek <monstr@monstr.eu>
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flush_dcache_page macro is necessary to implement for
JFFS2 rootfs support on WB system.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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Power limit notification feature is published in Intel 64 and IA-32
Architectures SDMV Vol 3A 14.5.6 Power Limit Notification.
It is implemented first on Intel Sandy Bridge platform.
The patch handles notification interrupt. Interrupt handler dumps power limit
information in log_buf, logs the event in mce log, and increases the event
counters (core_power_limit and package_power_limit). Upper level applications
could use the data to detect system health or diagnose functionality/performance
issues.
In the future, the event could be handled in a more fancy way.
Signed-off-by: Fenghua Yu <fenghua.yu@intel.com>
LKML-Reference: <1280448826-12004-5-git-send-email-fenghua.yu@intel.com>
Reviewed-by: Len Brown <len.brown@intel.com>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
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Add package level thermal throttle interrupt support. The interrupt handler
increases package level thermal throttle count. It also logs the event in MCE
log.
The package level thermal throttle interrupt happens across threads in a
package. Each thread handles the interrupt individually. User level application
is supposed to retrieve correct event count and log based on package/thread
topology. This is the same situation for core level interrupt handler. In the
future, interrupt may be reported only per package or per core.
core_throttle_count and package_throttle_count are used for user interface.
Previously only throttle_count is used for core throttle count. If you think
new core_throttle_count name breaks user interface, I can change this part.
Signed-off-by: Fenghua Yu <fenghua.yu@intel.com>
LKML-Reference: <1280448826-12004-4-git-send-email-fenghua.yu@intel.com>
Reviewed-by: Len Brown <len.brown@intel.com>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
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This patch adds a hwmon driver for package level thermal control. The driver
dumps package level thermal information through sysfs interface so that upper
level application (e.g. lm_sensor) can retrive the information.
Instead of having the package level hwmon code in coretemp, I write a seperate
driver pkgtemp because:
First, package level thermal sensors include not only sensors for each core,
but also sensors for uncore, memory controller or other components in the
package. Logically it will be clear to have a seperate hwmon driver for package
level hwmon to monitor wider range of sensors in a package. Merging package
thermal driver into core thermal driver doesn't make sense and may mislead.
Secondly, merging the two drivers together may cause coding mess. It's easier
to include various package level sensors info if more sensor information is
implemented. Coretemp code needs to consider a lot of legacy machine cases.
Pkgtemp code only considers platform starting from Sandy Bridge.
On a 1Sx4Cx2T Sandy Bridge platform, lm-sensors dumps the pkgtemp and coretemp:
pkgtemp-isa-0000
Adapter: ISA adapter
physical id 0: +33.0°C (high = +79.0°C, crit = +99.0°C)
coretemp-isa-0000
Adapter: ISA adapter
Core 0: +32.0°C (high = +79.0°C, crit = +99.0°C)
coretemp-isa-0001
Adapter: ISA adapter
Core 1: +32.0°C (high = +79.0°C, crit = +99.0°C)
coretemp-isa-0002
Adapter: ISA adapter
Core 2: +32.0°C (high = +79.0°C, crit = +99.0°C)
coretemp-isa-0003
Adapter: ISA adapter
Core 3: +32.0°C (high = +79.0°C, crit = +99.0°C)
[ hpa: folded v3 patch removing improper global variable "SHOW" ]
Signed-off-by: Fenghua Yu <fenghua.yu@intel.com>
LKML-Reference: <1280448826-12004-3-git-send-email-fenghua.yu@intel.com>
Reviewed-by: Len Brown <len.brown@intel.com>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
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* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (291 commits)
ARM: AMBA: Add pclk support to AMBA bus infrastructure
ARM: 6278/2: fix regression in RealView after the introduction of pclk
ARM: 6277/1: mach-shmobile: Allow users to select HZ, default to 128
ARM: 6276/1: mach-shmobile: remove duplicate NR_IRQS_LEGACY
ARM: 6246/1: mmci: support larger MMCIDATALENGTH register
ARM: 6245/1: mmci: enable hardware flow control on Ux500 variants
ARM: 6244/1: mmci: add variant data and default MCICLOCK support
ARM: 6243/1: mmci: pass power_mode to the translate_vdd callback
ARM: 6274/1: add global control registers definition header file for nuc900
mx2_camera: fix type of dma buffer virtual address pointer
mx2_camera: Add soc_camera support for i.MX25/i.MX27
arm/imx/gpio: add spinlock protection
ARM: Add support for the LPC32XX arch
ARM: LPC32XX: Arch config menu supoport and makefiles
ARM: LPC32XX: Phytec 3250 platform support
ARM: LPC32XX: Misc support functions
ARM: LPC32XX: Serial support code
ARM: LPC32XX: System suspend support
ARM: LPC32XX: GPIO, timer, and IRQ drivers
ARM: LPC32XX: Clock driver
...
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commit 9f31f57(um: Convert to use read_persistent_clock) moved the
code, but not the variable.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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