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2014-11-20sun3_scsi: Convert to platform deviceFinn Thain
Convert sun3_scsi to platform device and eliminate scsi_register(). Signed-off-by: Finn Thain <fthain@telegraphics.com.au> Reviewed-by: Hannes Reinecke <hare@suse.de> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Christoph Hellwig <hch@lst.de>
2014-11-20atari_scsi: Convert to platform deviceFinn Thain
Convert atari_scsi to platform device and eliminate scsi_register(). Validate __setup options later on so that module options are checked as well. Remove the comment about the scsi mid-layer disabling the host irq as it is no longer true (AFAICT). Also remove the obsolete slow interrupt stuff (IRQ_TYPE_SLOW == 0 anyway). Signed-off-by: Finn Thain <fthain@telegraphics.com.au> Reviewed-by: Hannes Reinecke <hare@suse.de> Tested-by: Michael Schmitz <schmitzmic@gmail.com> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Christoph Hellwig <hch@lst.de>
2014-11-20atari_scsi: Fix atari_scsi deadlocks on FalconFinn Thain
Don't disable irqs when waiting for the ST DMA "lock"; its release may require an interrupt. Introduce stdma_try_lock() for use in soft irq context. atari_scsi now tells the SCSI mid-layer to defer queueing a command if the ST DMA lock is not available, as per Michael's patch: http://marc.info/?l=linux-m68k&m=139095335824863&w=2 The falcon_got_lock variable is race prone: we can't disable IRQs while waiting to acquire the lock, so after acquiring it there must be some interval during which falcon_got_lock remains false. Introduce stdma_is_locked_by() to replace falcon_got_lock. The falcon_got_lock tests in the EH handlers are incorrect these days. It can happen that an EH handler is called after a command completes normally. Remove these checks along with falcon_got_lock. Also remove the complicated and racy fairness wait queues. If fairness is an issue (when SCSI competes with IDE for the ST DMA interrupt), the solution is likely to be a lower value for host->can_queue. Signed-off-by: Finn Thain <fthain@telegraphics.com.au> Reviewed-by: Hannes Reinecke <hare@suse.de> Tested-by: Michael Schmitz <schmitzmic@gmail.com> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Christoph Hellwig <hch@lst.de>
2014-11-20mac_scsi: Convert to platform deviceFinn Thain
Convert mac_scsi to platform device and eliminate scsi_register(). Platform resources for chip registers now follow the documentation. This should fix issues with the Mac IIci (and possibly other models too). Signed-off-by: Finn Thain <fthain@telegraphics.com.au> Reviewed-by: Hannes Reinecke <hare@suse.de> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Christoph Hellwig <hch@lst.de>
2014-11-20ARM: DRA7: hwmod data: Add missing UART hwmod dataAmbresh K
We had constrainted hwmod entries to entries in dts which were present only for default mapped interrupts, the ones such as UARTs > 6 which needed IRQ crossbar configured were never added to hwmod database. Add them now that IRQ crossbar is functional Without this, enabling UARTs7 to 10 in dts results in the following crash: [ 1.893829] omap_uart 48420000.serial: _od_fail_runtime_resume: FIXME: missing hwmod/omap_dev info [ 1.903381] Unhandled fault: imprecise external abort (0x1406) at 0x00000000 [ 1.903381] ------------[ cut here ]------------ [ 1.903381] WARNING: CPU: 0 PID: 0 at drivers/bus/omap_l3_noc.c:147 l3_interrupt_handler+0x2ac/0x32c() [ 1.903411] 44000000.ocp:L3 Custom Error: MASTER MPU TARGET L4_PER2_P3 (Read): Data Access in User mode during Functional access [ 1.903411] Modules linked in: [ 1.903411] CPU: 0 PID: 0 Comm: swapper/0 Tainted: G W 3.18.0-rc1-dirty #3 [ 1.903442] [<c0015270>] (unwind_backtrace) from [<c00119b4>] (show_stack+0x10/0x14) [ 1.903442] [<c00119b4>] (show_stack) from [<c05e4afc>] (dump_stack+0x78/0x94) [ 1.903472] [<c05e4afc>] (dump_stack) from [<c003fed0>] (warn_slowpath_common+0x6c/0x8c) [ 1.903472] [<c003fed0>] (warn_slowpath_common) from [<c003ff84>] (warn_slowpath_fmt+0x30/0x40) [ 1.903472] [<c003ff84>] (warn_slowpath_fmt) from [<c0333bfc>] (l3_interrupt_handler+0x2ac/0x32c) [ 1.903503] [<c0333bfc>] (l3_interrupt_handler) from [<c008d6f8>] (handle_irq_event_percpu+0x60/0x230) [ 1.903503] [<c008d6f8>] (handle_irq_event_percpu) from [<c008d904>] (handle_irq_event+0x3c/0x5c) [ 1.903503] [<c008d904>] (handle_irq_event) from [<c00903b0>] (handle_fasteoi_irq+0xc4/0x190) [ 1.903503] [<c00903b0>] (handle_fasteoi_irq) from [<c008d01c>] (generic_handle_irq+0x20/0x30) [ 1.903533] [<c008d01c>] (generic_handle_irq) from [<c008d114>] (__handle_domain_irq+0x64/0xb8) [ 1.903533] [<c008d114>] (__handle_domain_irq) from [<c00086e4>] (gic_handle_irq+0x20/0x60) [ 1.903533] [<c00086e4>] (gic_handle_irq) from [<c05eb124>] (__irq_svc+0x44/0x5c) [ 1.903533] Exception stack(0xc08d1f60 to 0xc08d1fa8) [ 1.903564] 1f60: 00000001 00000001 00000000 c08dc930 c08d0000 00000000 00000000 00000000 [ 1.903564] 1f80: ffffffed c0978028 c08d89dc c08d8978 00000000 c08d1fa8 c0083fc0 c000f160 [ 1.903564] 1fa0: 20000013 ffffffff [ 1.903564] [<c05eb124>] (__irq_svc) from [<c000f160>] (arch_cpu_idle+0x20/0x3c) [ 1.903594] [<c000f160>] (arch_cpu_idle) from [<c0077c54>] (cpu_startup_entry+0x198/0x338) [ 1.903594] [<c0077c54>] (cpu_startup_entry) from [<c0869be0>] (start_kernel+0x358/0x3c4) [ 1.903594] [<c0869be0>] (start_kernel) from [<80008074>] (0x80008074) [ 1.903594] ---[ end trace 293fc95d463cff71 ]--- [ 2.117553] Internal error: : 1406 [#1] SMP ARM [ 2.122314] Modules linked in: [ 2.125518] CPU: 1 PID: 1 Comm: swapper/0 Tainted: G W 3.18.0-rc1-dirty #3 [ 2.133850] task: ed868b80 ti: ed86a000 task.ti: ed86a000 [ 2.139526] PC is at serial_omap_probe+0x2fc/0x514 [ 2.144561] LR is at trace_hardirqs_on_caller+0xec/0x1c4 [ 2.150146] pc : [<c038f0f0>] lr : [<c0083fc0>] psr: 40000013 [ 2.150146] sp : ed86be18 ip : ed9bb57c fp : f005e000 [ 2.162231] r10: 0000012a r9 : ed9b4f80 r8 : edc5bdcd [ 2.167724] r7 : edc58810 r6 : ed9bb400 r5 : ed9bb410 r4 : edc5bc10 [ 2.174560] r3 : 00000000 r2 : 00000000 r1 : 00000014 r0 : ffffffed [ 2.181427] Flags: nZcv IRQs on FIQs on Mode SVC_32 ISA ARM Segment kernel [ 2.189117] Control: 10c5387d Table: 8000406a DAC: 00000015 [ 2.195159] Process swapper/0 (pid: 1, stack limit = 0xed86a248) [ 2.201477] Stack: (0xed86be18 to 0xed86c000) [ 2.206054] be00: ed9ba2d0 00000000 [ 2.214660] be20: edc50150 00000001 c08cba58 00000000 00000000 ed9bb410 ffffffed c09481d8 [ 2.223236] be40: 00000000 c09481d8 c08cba58 00000000 00000000 c039bcfc c1170958 ed9bb410 [ 2.231842] be60: ed9bb444 c039a6f4 00000000 ed9bb410 c09481d8 ed9bb444 00000000 c08dc698 [ 2.240447] be80: edc4a100 c039a8b0 c09481d8 c039a81c 00000000 c0399060 ed8afaa8 ed92c110 [ 2.249053] bea0: c09481d8 edc482c0 c0949308 c0399ee0 c077f80c c09481d8 ed86a000 c09481d8 [ 2.257659] bec0: ed86a000 c08dc698 00000000 c039b088 00000000 00000000 ed86a000 c08a1924 [ 2.266235] bee0: c08a1904 c00089c4 00000000 00000000 00000000 00000000 60000093 00000000 [ 2.274841] bf00: 00000004 00000000 ed868b80 00000004 00000000 60000053 00000000 00000001 [ 2.283447] bf20: 00000000 c0083ea8 00000001 ed86a000 c08334bc ef7fc307 000000b2 c0059358 [ 2.292053] bf40: c07e176c c083299c 00000006 00000006 c08cb588 c08b69cc 00000006 c08b69ac [ 2.300659] bf60: c097a280 000000b2 c08cba58 c0869588 00000000 c0869e04 00000006 00000006 [ 2.309234] bf80: c0869588 00000000 00000000 c05dfd7c 00000000 00000000 00000000 00000000 [ 2.317840] bfa0: 00000000 c05dfd84 00000000 c000e668 00000000 00000000 00000000 00000000 [ 2.326446] bfc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 [ 2.335052] bfe0: 00000000 00000000 00000000 00000000 00000013 00000000 020405d0 00090c40 [ 2.343658] [<c038f0f0>] (serial_omap_probe) from [<c039bcfc>] (platform_drv_probe+0x48/0x98) [ 2.352630] [<c039bcfc>] (platform_drv_probe) from [<c039a6f4>] (driver_probe_device+0x10c/0x234) [ 2.361968] [<c039a6f4>] (driver_probe_device) from [<c039a8b0>] (__driver_attach+0x94/0x98) [ 2.370819] [<c039a8b0>] (__driver_attach) from [<c0399060>] (bus_for_each_dev+0x54/0x88) [ 2.379425] [<c0399060>] (bus_for_each_dev) from [<c0399ee0>] (bus_add_driver+0xdc/0x1d4) [ 2.388031] [<c0399ee0>] (bus_add_driver) from [<c039b088>] (driver_register+0x78/0xf4) [ 2.396453] [<c039b088>] (driver_register) from [<c08a1924>] (serial_omap_init+0x20/0x40) [ 2.405059] [<c08a1924>] (serial_omap_init) from [<c00089c4>] (do_one_initcall+0x80/0x1cc) [ 2.413757] [<c00089c4>] (do_one_initcall) from [<c0869e04>] (kernel_init_freeable+0x1b8/0x28c) [ 2.422912] [<c0869e04>] (kernel_init_freeable) from [<c05dfd84>] (kernel_init+0x8/0xe4) [ 2.431396] [<c05dfd84>] (kernel_init) from [<c000e668>] (ret_from_fork+0x14/0x2c) [ 2.439361] Code: e1b02f23 020320f0 0203300f 01a02222 (0a000021) [ 2.445770] ---[ end trace 293fc95d463cff72 ]--- [ 2.450683] Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b [ 2.450683] [ 2.460296] CPU0: stopping [ 2.463134] CPU: 0 PID: 0 Comm: swapper/0 Tainted: G D W 3.18.0-rc1-dirty #3 [ 2.471405] [<c0015270>] (unwind_backtrace) from [<c00119b4>] (show_stack+0x10/0x14) [ 2.479522] [<c00119b4>] (show_stack) from [<c05e4afc>] (dump_stack+0x78/0x94) [ 2.487060] [<c05e4afc>] (dump_stack) from [<c001394c>] (handle_IPI+0x190/0x264) [ 2.494781] [<c001394c>] (handle_IPI) from [<c000871c>] (gic_handle_irq+0x58/0x60) [ 2.502716] [<c000871c>] (gic_handle_irq) from [<c05eb124>] (__irq_svc+0x44/0x5c) [ 2.510528] Exception stack(0xc08d1f60 to 0xc08d1fa8) [ 2.515808] 1f60: c000f15c 00000000 00000000 00000000 c08d0000 00000000 00000000 00000000 [ 2.524353] 1f80: ffffffed c0978028 c08d89dc c08d8978 00000000 c08d1fa8 c000f15c c000f160 [ 2.532897] 1fa0: 60000013 ffffffff [ 2.536529] [<c05eb124>] (__irq_svc) from [<c000f160>] (arch_cpu_idle+0x20/0x3c) [ 2.544281] [<c000f160>] (arch_cpu_idle) from [<c0077c54>] (cpu_startup_entry+0x198/0x338) [ 2.552917] [<c0077c54>] (cpu_startup_entry) from [<c0869be0>] (start_kernel+0x358/0x3c4) [ 2.561462] [<c0869be0>] (start_kernel) from [<80008074>] (0x80008074) [ 2.568298] ---[ end Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b [ Reported-by: Franklin Cooper Jr. <fcooper@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Ambresh K <ambresh@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
2014-11-20Merge tag 'renesas-koelsch-board-removal-for-v3.19' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/cleanup Pull "Renesas ARM Based SoC Koelsch Board Removal Updates for v3.19" from Simon Horman: * Remove lecacy C koelsh board support * tag 'renesas-koelsch-board-removal-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: koelsch dts: Drop console= bootargs parameter ARM: dts: koelsch: Stop building r8a7791-koelsch.dtb in legacy builds MAINTAINERS: Remove reference to shmobile / koelsch_defconfig ARM: shmobile: koelsch: Remove reference board code ARM: shmobile: r8a7791: Remove legacy code ARM: shmobile: koelsch: Remove legacy C board code ARM: shmobile: Remove shmobile_clk_workaround() implementation Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-11-20Merge tag 'renesas-dt-cleanups-for-v3.19' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/cleanup Pull "Renesas ARM Based SoC DT Cleanups for v3.19" from Simon Horman: * Add chosen/stdout-path to DTS files for shmobile boards * Remove r7s72100-genmai.dtb for ARCH_SHMOBILE_LEGACY - The corresponding board file has already been removed * Sort dts nodes by address * Sort SHMOBILE dtbs alphabetically in Makefile * tag 'renesas-dt-cleanups-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: kzm9d dts: Add chosen/stdout-path ARM: shmobile: kzm9g-reference dts: Add chosen/stdout-path ARM: shmobile: alt dts: Add chosen/stdout-path ARM: shmobile: koelsch dts: Add chosen/stdout-path ARM: shmobile: henninger dts: Add chosen/stdout-path ARM: shmobile: lager dts: Add chosen/stdout-path ARM: shmobile: marzen dts: Add chosen/stdout-path ARM: shmobile: bockw-reference dts: Add chosen/stdout-path ARM: shmobile: armadillo800eva dts: Add chosen/stdout-path ARM: shmobile: ape6evm-reference dts: Add chosen/stdout-path ARM: shmobile: genmai dts: Add chosen/stdout-path ARM: shmobile: emev2 dtsi: Add uart* labels for easier referencing ARM: shmobile: emev2 dtsi: Use generic names for device nodes ARM: shmobile: r7s72100: Remove r7s72100-genmai.dtb for ARCH_SHMOBILE_LEGACY ARM: shmobile: r8a73a4: sort dtsi file by address ARM: shmobile: kzm9d: sort dts file by address ARM: shmobile: r7s72100: sort dtsi file by address ARM: shmobile: r8a73a4: Remove spurious dma-multiplexer base addresses ARM: dts: Sort SHMOBILE dtbs alphabetically Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-11-19x86/nmi: Perform a safe NMI stack trace on all CPUsSteven Rostedt (Red Hat)
When trigger_all_cpu_backtrace() is called on x86, it will trigger an NMI on each CPU and call show_regs(). But this can lead to a hard lock up if the NMI comes in on another printk(). In order to avoid this, when the NMI triggers, it switches the printk routine for that CPU to call a NMI safe printk function that records the printk in a per_cpu seq_buf descriptor. After all NMIs have finished recording its data, the seq_bufs are printed in a safe context. Link: http://lkml.kernel.org/p/20140619213952.360076309@goodmis.org Link: http://lkml.kernel.org/r/20141115050605.055232587@goodmis.org Tested-by: Jiri Kosina <jkosina@suse.cz> Acked-by: Jiri Kosina <jkosina@suse.cz> Acked-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com> Reviewed-by: Petr Mladek <pmladek@suse.cz> Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
2014-11-19ARM: dts: omap4.dtsi: remove dss_fckTomi Valkeinen
"dss_fck" is a hacky clock, used to work around problems with MODULEMODE bit handling in DSS hwmods. These problems have now been solved, so we can remove the dss_fck clock. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Reviewed-by: Archit Taneja <archit.taneja@gmail.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
2014-11-19ARM: OMAP4: fix RFBI iclkTomi Valkeinen
RFBI iclk was set to point to hacky "dss_fck", which will be removed. Instead use "l3_div_ck", which is the proper clock for this. "l3_div_ck" is the parent of "dss_fck", so the clock rate is the same as previously. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Reviewed-by: Archit Taneja <archit.taneja@gmail.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
2014-11-19ARM: OMAP4: hwmod: use MODULEMODE properlyTomi Valkeinen
Instead of using a hacky "dss_fck" clock (which toggles the MODULEMODE bit) as DSS L3 interface clock, set the .modulemode field in the omap44xx_dss_hwmod. This works now that the DSS core hwmod is enabled during DSS submodule resets. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Reviewed-by: Archit Taneja <archit.taneja@gmail.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
2014-11-19ARM: OMAP4: hwmod: set DSS submodule parent hwmodsTomi Valkeinen
Set DSS core hwmod as the parent for all the DSS submodules. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Reviewed-by: Archit Taneja <archit.taneja@gmail.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
2014-11-19ARM: OMAP5: hwmod: set DSS submodule parent hwmodsTomi Valkeinen
Set DSS core hwmod as the parent for all the DSS submodules. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Reviewed-by: Archit Taneja <archit.taneja@gmail.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
2014-11-19arm: pxa: add pxa27x device-tree supportRobert Jarzmik
Add a device-tree machine entry (DT_MACHINE_START) for pxa27x based platforms. Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr> Acked-by: Arnd Bergmann <arnd@arndb.de>
2014-11-19arm: pxa: remove unnecessary includes from pxa-dtRobert Jarzmik
As the init functions necessary for machine init have moved to generic.h, remove the unnecessary includes and prototypes definitions from pxa-dt.c. This removes the include of mach/pxaXXX-regs.h, and make pxa-dt generic enough to accept other pxa variants. Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr> Acked-by: Arnd Bergmann <arnd@arndb.de>
2014-11-19arm: pxa: move init functions into generic.hRobert Jarzmik
In order to have a unique .c file for all pxa variants device-tree definitions, all the initialization functions for MACHINE_START and DT_MACHINE_START have been put together into generic.h. The alternative would have been one pxaXXX-dt.c file per variant. The move is necessary because each include/mach/pxaXXX.h includes the variant register descriptions which intersects and conflicts one with each other. The change is a preparation for pxa-dt.c to support multiple pxa, ie. pxa3xx and pxa27x. The machine files including mach/pxaXXX.h all include generic.h, which guarantees no regression should be introduced. Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr> Acked-by: Arnd Bergmann <arnd@arndb.de>
2014-11-19arm: pxa: add device-tree irq init for pxa27xRobert Jarzmik
Add the initializer for irqs in a device-tree machine on a pxa27x. Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr> Acked-by: Arnd Bergmann <arnd@arndb.de>
2014-11-19ARM: pxa: tosa: switch to gpio-chargerDmitry Eremin-Solenikov
Switch to simpler gpio-charger module. PDA power requires additional setup in platform file and is more suited for boards with separate AC and USB charging inputs. Tosa has a unified input, so it's better suited for gpio-charger. Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
2014-11-19arm: mach-pxa: Convert pr_warning to pr_warnJoe Perches
Use the more common pr_warn. Other miscellanea: o Coalesce formats o Realign arguments Signed-off-by: Joe Perches <joe@perches.com> Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
2014-11-19ARM: at91: remove useless init_time for DT-only SoCsBoris Brezillon
Commits bcf8c7e7703bb2bbde66bec26a81fed4be9cd1d4 and 4bf7753b8ab7c704ca864b1653367ea9cfe68a25 introduced compilation errors ("error: 'NR_IRQS_LEGACY' undeclared (first use in this function)") because they remove the asm/irq.h inclusion while the init_time function needs it for the NR_IRQS_LEGACY definition. In the other hand, the point of these commits is to remove board file support, and init_time is only needed when booting non-DT boards, we can thus safely remove init_time functions. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-11-19Merge tag 'mvebu-dt-3.19' of git://git.infradead.org/linux-mvebu into next/dtArnd Bergmann
Pull "mvebu DT changes for v3.19" from Jason Cooper: - mvebu - ReadyNAS 102 leds, esata - ReadyNAS 2120 esata - Add cache-unified for Aurora L2 node - Add ref clk for timer and watchdog on Armada 375 - Cleanup Armada XP pinctrl for GigE - Add RGMII pinctrl, i2c eeprom, and fix 74hc595 counter on Lenovo ix4-300d - kirkwood - Add DLink DIR665 and it's DSA configuration * tag 'mvebu-dt-3.19' of git://git.infradead.org/linux-mvebu: ARM: mvebu: armada-xp: Fix 74hc595 count for Lenovo ix4-300d ARM: mvebu: armada-xp: Add I2C eeprom on Lenovo ix4-300d ARM: mvebu: armada-xp: Add RGMII pinctrl to Lenovo ix4-300d ARM: mvebu: armada-xp: Add GE0 pinctrl settings for GMII ARM: mvebu: armada-xp: Move GE0/1 pinctrl settings for RGMII ARM: mvebu: armada-xp: Use pinctrl node alias ARM: mvebu: armada-xp: Add node alias to pinctrl and add base address ARM: mvebu: armada-xp: Consolidate pinctrl node ARM: Kirkwood: DIR665: Instantiate Distributed Switch Architecture ARM: Kirkwood: Add support for DLink DIR665 ARM: mvebu: Enable rear eSATA ports of NETGEAR ReadyNAS 2120 ARM: mvebu: Enable the reference clock for timer and watchdog on Armada 375 SoC arm: mvebu: Clarify (e)SATA ports info in NETGEAR ReadyNAS 102 .dts file arm: mvebu: Fix LED color in NETGEAR ReadyNAS 102 .dts file ARM: mvebu: Fix the Aurora L2 cache node with the required cache-unified property Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-11-19Merge tag 'mvebu-defconfig-3.19' of git://git.infradead.org/linux-mvebu into ↵Arnd Bergmann
next/defconfig Pull "mvebu defconfig changes for v3.19" from Jason Cooper" - Add options for DLink DIR665 - Add Armada 370 simple-card audio option - Add mv88E6171 switch driver option * tag 'mvebu-defconfig-3.19' of git://git.infradead.org/linux-mvebu: ARM: mvebu: defconfig: Enable the mv88E6171 switch driver ARM: mvebu: update mvebu_v7_defconfig for Armada 370 audio ARM: config: Add DLINK DIR665 options to multi_v5_defconfig ARM: mvebu: Add DLINK DIR665 options to mvebu_v5_defconfig Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-11-19Merge tag 'hix5hd2-config-for-3.19' of git://github.com/hisilicon/linux-hisi ↵Arnd Bergmann
into next/defconfig Pull "ARM: HiX5HD2: config update for 3.19" from Wei Xu: - Enable GMAC, GPIO, Reset, USB, MMC and SATA on HiX5HD2 * tag 'hix5hd2-config-for-3.19' of git://github.com/hisilicon/linux-hisi: ARM: hisi_defconfig: add driver support for hix5hd2 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-11-19Merge tag 'hix5hd2-dt-for-3.19' of git://github.com/hisilicon/linux-hisi ↵Arnd Bergmann
into next/dt Pull "ARM: DT: Hisilicon terminal SoC HiX5HD2 DT updates for 3.19" from Wei Xu: - Add reboot node, reusing syscon-reboot - Add I2C nodes Hisilicon IP - Add IR node based on Hisilicon IP - Add Watchdog node based on ARM IP - Add GPIO nodes based on ARM GPIO IP - Add SATA node based on Hisilicon IP - Add USB nodes - Add MMC nodes based on Synopsys IP - Add GMAC nodes based on Hisilicon IP * tag 'hix5hd2-dt-for-3.19' of git://github.com/hisilicon/linux-hisi: ARM: dts: hix5hd2: add reboot node ARM: dts: hix5hd2: add i2c node ARM: dts: hix5hd2: add ir node ARM: dts: hix5hd2: add wdg node ARM: dts: hix5hd2: add gpio node ARM: dts: hix5hd2: add sata node ARM: dts: hix5hd2: add usb node ARM: dts: hix5hd2: add mmc node ARM: dts: hix5hd2: add gmac node Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-11-19Merge tag 'renesas-boards-for-v3.19' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc Pull "Renesas ARM Based SoC Boards Updates for v3.19" from Simon Horman: * Add restart callback to kzm9g * tag 'renesas-boards-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: kzm9g-reference: Add restart callback Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-11-19Merge tag 'renesas-dt-cleanups3-for-v3.19' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt Pull "Third Round of Renesas ARM Based SoC DT Cleanups for v3.19" from Simon Horman: * Use keyboard as gpio-keys node name * tag 'renesas-dt-cleanups3-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: kzm9g-reference: Use keyboard as gpio-keys node name ARM: shmobile: koelsch: Use keyboard as gpio-keys node name ARM: shmobile: lager: Use keyboard as gpio-keys node name ARM: shmobile: armadillo800eva: Use keyboard as gpio-keys node name Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-11-19ARM: OMAP2+: hwmod: add parent_hwmod supportTomi Valkeinen
Add parent_hwmod pointer to omap_hwmod. This can be set to point to a "parent" hwmod that needs to be enabled for the "child" hwmod to work. This is used at hwmod setup time: when doing the initial setup and reset, first enable the parent hwmod, and after setup and reset is done, restore the parent hwmod to postsetup_state. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Reviewed-by: Archit Taneja <archit.taneja@gmail.com> [paul@pwsan.com: add kerneldoc documentation for parent_hwmod; note that it is a temporary workaround] Signed-off-by: Paul Walmsley <paul@pwsan.com>
2014-11-19Merge tag 'renesas-dt-cleanups2-for-v3.19' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt Pull "Second Round of Renesas ARM Based SoC DT Cleanups for v3.19" from Simon Horman: * Drop console= bootargs parameter on alt * Correct scifb* naming on r8a73a4 * Drop 0x unit-address prefixes * Remove unnecessary MMC options * tag 'renesas-dt-cleanups2-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: alt dts: Drop console= bootargs parameter ARM: shmobile: r8a73a4: fix scifb* naming ARM: shmobile: kzm9g-reference dts: Drop bogus 0x unit-address prefix ARM: shmobile: r8a7791 dtsi: Drop bogus 0x unit-address prefix ARM: shmobile: r8a7790 dtsi: Drop bogus 0x unit-address prefix ARM: shmobile: r8a7790 dtsi: Remove unnecessary MMC options ARM: shmobile: r8a7779 dtsi: Remove unnecessary MMC options ARM: shmobile: r8a7778 dtsi: Remove unnecessary MMC options Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-11-19Merge tag 'renesas-dt-for-v3.19' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt Pull "Renesas ARM Based SoC DT Updates for v3.19" from Simon Horman: * Add Add SoC-specific SATA compatible property to r8a7779 * Enable DMA for MMCIF on r8a7791 and r8a7790 * Enable USB-PHY, HS-USB and USB3.0 on r8a7791 and r8a7790 * Enable TMU timer via DT on r8a7778 * Enable CMT timer via DT on r8a73a4 * Add MMP and {SR}GX clocks to r8a7791 and r8a7790 * Correct scifa2 clock index on r8a7740 * Add missing INTCA for irqpin on r8a7740 * tag 'renesas-dt-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (34 commits) ARM: shmobile: r8a7779 dtsi: Add SoC-specific SATA compatible property ARM: shmobile: r8a7791: Reference DMA channels in MMCIF DT node ARM: shmobile: r8a7790: Reference DMA channels in MMCIF DT nodes ARM: shmobile: r8a7791: Add MMCIF0 DT node ARM: shmobile: r8a7790: Rename mmcif node to mmc ARM: shmobile: r8a7778: Add SoC-specific TMU compatible property ARM: shmobile: r8a73a4: Add SoC-specific CMT compatible property ARM: shmobile: henninger: enable HS-USB ARM: shmobile: koelsch: enable HS-USB ARM: shmobile: r8a7791: add HS-USB device node ARM: shmobile: lager: enable HS-USB ARM: shmobile: r8a7790: add HS-USB device node ARM: shmobile: r8a7791: add USB3.0 device node ARM: shmobile: lager: enable USB3.0 ARM: shmobile: r8a7790: add USB3.0 device node ARM: shmobile: r8a7794: Add arch_timer to device tree ARM: shmobile: bockw-reference: Initialise TMU device using DT ARM: shmobile: r8a7778: Add TMU nodes ARM: shmobile: armadillo800eva dts: Enable TMU0 ARM: shmobile: r8a7740 dtsi: Add TMU0 and TMU1 device nodes ... Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-11-19Merge branch 'renesas/dt-du' into next/dtArnd Bergmann
This is a base for the DT updates, merged through the arm-soc cleanup branch. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-11-19Merge tag 'renesas-dt-du-for-v3.19' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/cleanup Pull "Renesas ARM Based SoC DT DU Updates for v3.19" from Simon Horman: * Enable DU using DT on marzen/r8a7779, lager/r8a7790 and koelsch/r8a7791 * tag 'renesas-dt-du-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: koelsch: Enable DU device in DT ARM: shmobile: koelsch-reference: Remove DU platform device ARM: shmobile: lager: Enable DU device in DT ARM: shmobile: lager-reference: Remove DU platform device ARM: shmobile: marzen: Enable DU device in DT ARM: shmobile: dts: Add common file for AA104XD12 panel ARM: shmobile: r8a7791: Add DU node to device tree ARM: shmobile: r8a7790: Add DU node to device tree ARM: shmobile: r8a7779: Add DU node to device tree Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-11-19Merge tag 'renesas-boards-cleanups2-for-v3.19' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/cleanup Pull "Second Round of Renesas ARM Based SoC Boards Cleanups for v3.19" form Simon Horman: * marzen-reference: Don't include legacy clock.h * tag 'renesas-boards-cleanups2-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: marzen-reference: Don't include legacy clock.h Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-11-19separate kernel- and userland-side msghdrAl Viro
Kernel-side struct msghdr is (currently) using the same layout as userland one, but it's not a one-to-one copy - even without considering 32bit compat issues, we have msg_iov, msg_name and msg_control copied to kernel[1]. It's fairly localized, so we get away with a few functions where that knowledge is needed (and we could shrink that set even more). Pretty much everything deals with the kernel-side variant and the few places that want userland one just use a bunch of force-casts to paper over the differences. The thing is, kernel-side definition of struct msghdr is *not* exposed in include/uapi - libc doesn't see it, etc. So we can add struct user_msghdr, with proper annotations and let the few places that ever deal with those beasts use it for userland pointers. Saner typechecking aside, that will allow to change the layout of kernel-side msghdr - e.g. replace msg_iov/msg_iovlen there with struct iov_iter, getting rid of the need to modify the iovec as we copy data to/from it, etc. We could introduce kernel_msghdr instead, but that would create much more noise - the absolute majority of the instances would need to have the type switched to kernel_msghdr and definition of struct msghdr in include/linux/socket.h is not going to be seen by userland anyway. This commit just introduces user_msghdr and switches the few places that are dealing with userland-side msghdr to it. [1] actually, it's even trickier than that - we copy msg_control for sendmsg, but keep the userland address on recvmsg. Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2014-11-19Merge tag 'renesas-soc3-for-v3.19' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc Pull "Third Round of Renesas ARM Based Soc Updates for v3.19" from Simon Horman: * Always build rcar setup for armv7 - Fixes allmodconfig build fauilre caused by "ARM: shmobile: always build rcar setup for armv7" * Add restart callback to sh73a0 * tag 'renesas-soc3-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: always build rcar setup for armv7 ARM: shmobile: sh73a0: Add restart callback Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-11-19Merge tag 'renesas-soc2-for-v3.19' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc Pull "Second Round of Renesas ARM Based SoC Soc Updates for v3.19" from Simon Horman: * Enable PCI domains for R-Car Gen2 devices * Make APMU resource code SoC-specific * tag 'renesas-soc2-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: Enable PCI domains for R-Car Gen2 devices ARM: shmobile: r8a7791: Correct number of CPU cores ARM: shmobile: Separate APMU resource data into CPU dependant part Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-11-19Merge tag 'renesas-soc-for-v3.19' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc Pull "Renesas ARM Based SoC Soc Updates for v3.19" from Simon Horman: * Select CONFIG_ZONE_DMA when CONFIG_ARM_LPAE is enabled * Add CA7 arch_timer initialization for r8a7794 * Handle CA7 arch timer delay * Add shmobile_init_late() to sh7372 - This is consistent with other shmobile SoCs * tag 'renesas-soc-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: Select CONFIG_ZONE_DMA when CONFIG_ARM_LPAE is enabled ARM: shmobile: rcar-gen2: Add CA7 arch_timer initialization for r8a7794 ARM: shmobile: sh7372: Add shmobile_init_late() ARM: shmobile: Handle CA7 arch timer delay Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-11-19Merge tag 'renesas-runtime-pm-for-v3.19' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc Merge "Renesas ARM Based SoC Runtime PM Updates for v3.19" * 8a7740/armadillo800eva legacy PM domain support * tag 'renesas-runtime-pm-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: r8a7740: Add A3SM pm domain support ARM: shmobile: r8a7740: Add A4SU pm domain support ARM: shmobile: r8a7740/armadillo legacy: Add A4R pm domain support ARM: shmobile: r8a7740: Add D4 pm domain support ARM: shmobile: r8a7740/armadillo legacy: Add A4MP pm domain support ARM: shmobile: r8a7740: Add A3SG pm domain support ARM: shmobile: r8a7740: Add A3RV pm domain support ARM: shmobile: armadillo800eva legacy: Add missing A4S pm domain devices ARM: shmobile: armadillo800eva legacy: Add missing A3SP pm domain devices ARM: shmobile: r8a7740: Add missing A4S pm domain devices ARM: shmobile: r8a7740: Add missing A3SP pm domain devices Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-11-19x86/kvm/tracing: Use helper function trace_seq_buffer_ptr()Steven Rostedt (Red Hat)
To allow for the restructiong of the trace_seq code, we need users of it to use the helper functions instead of accessing the internals of the trace_seq structure itself. Link: http://lkml.kernel.org/r/20141104160221.585025609@goodmis.org Tested-by: Jiri Kosina <jkosina@suse.cz> Acked-by: Jiri Kosina <jkosina@suse.cz> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Acked-by: Mark Rustad <mark.d.rustad@intel.com> Reviewed-by: Petr Mladek <pmladek@suse.cz> Cc: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
2014-11-19ftrace/x86/extable: Add is_ftrace_trampoline() functionSteven Rostedt (Red Hat)
Stack traces that happen from function tracing check if the address on the stack is a __kernel_text_address(). That is, is the address kernel code. This calls core_kernel_text() which returns true if the address is part of the builtin kernel code. It also calls is_module_text_address() which returns true if the address belongs to module code. But what is missing is ftrace dynamically allocated trampolines. These trampolines are allocated for individual ftrace_ops that call the ftrace_ops callback functions directly. But if they do a stack trace, the code checking the stack wont detect them as they are neither core kernel code nor module address space. Adding another field to ftrace_ops that also stores the size of the trampoline assigned to it we can create a new function called is_ftrace_trampoline() that returns true if the address is a dynamically allocate ftrace trampoline. Note, it ignores trampolines that are not dynamically allocated as they will return true with the core_kernel_text() function. Link: http://lkml.kernel.org/r/20141119034829.497125839@goodmis.org Cc: Ingo Molnar <mingo@redhat.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
2014-11-19ftrace/x86: Add frames pointers to trampoline as necessarySteven Rostedt (Red Hat)
When CONFIG_FRAME_POINTERS are enabled, it is required that the ftrace_caller and ftrace_regs_caller trampolines set up frame pointers otherwise a stack trace from a function call wont print the functions that called the trampoline. This is due to a check in __save_stack_address(): #ifdef CONFIG_FRAME_POINTER if (!reliable) return; #endif The "reliable" variable is only set if the function address is equal to contents of the address before the address the frame pointer register points to. If the frame pointer is not set up for the ftrace caller then this will fail the reliable test. It will miss the function that called the trampoline. Worse yet, if fentry is used (gcc 4.6 and beyond), it will also miss the parent, as the fentry is called before the stack frame is set up. That means the bp frame pointer points to the stack of just before the parent function was called. Link: http://lkml.kernel.org/r/20141119034829.355440340@goodmis.org Cc: Ingo Molnar <mingo@redhat.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: x86@kernel.org Cc: stable@vger.kernel.org # 3.7+ Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
2014-11-19x86, mce: Support memory error recovery for both UCNA and Deferred error in ↵Chen Yucong
machine_check_poll Uncorrected no action required (UCNA) - is a uncorrected recoverable machine check error that is not signaled via a machine check exception and, instead, is reported to system software as a corrected machine check error. UCNA errors indicate that some data in the system is corrupted, but the data has not been consumed and the processor state is valid and you may continue execution on this processor. UCNA errors require no action from system software to continue execution. Note that UCNA errors are supported by the processor only when IA32_MCG_CAP[24] (MCG_SER_P) is set. -- Intel SDM Volume 3B Deferred errors are errors that cannot be corrected by hardware, but do not cause an immediate interruption in program flow, loss of data integrity, or corruption of processor state. These errors indicate that data has been corrupted but not consumed. Hardware writes information to the status and address registers in the corresponding bank that identifies the source of the error if deferred errors are enabled for logging. Deferred errors are not reported via machine check exceptions; they can be seen by polling the MCi_STATUS registers. -- AMD64 APM Volume 2 Above two items, both UCNA and Deferred errors belong to detected errors, but they can't be corrected by hardware, and this is very similar to Software Recoverable Action Optional (SRAO) errors. Therefore, we can take some actions that have been used for handling SRAO errors to handle UCNA and Deferred errors. Acked-by: Borislav Petkov <bp@suse.de> Signed-off-by: Chen Yucong <slaoub@gmail.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
2014-11-19x86, mce, severity: Extend the the mce_severity mechanism to handle ↵Chen Yucong
UCNA/DEFERRED error Until now, the mce_severity mechanism can only identify the severity of UCNA error as MCE_KEEP_SEVERITY. Meanwhile, it is not able to filter out DEFERRED error for AMD platform. This patch extends the mce_severity mechanism for handling UCNA/DEFERRED error. In order to do this, the patch introduces a new severity level - MCE_UCNA/DEFERRED_SEVERITY. In addition, mce_severity is specific to machine check exception, and it will check MCIP/EIPV/RIPV bits. In order to use mce_severity mechanism in non-exception context, the patch also introduces a new argument (is_excp) for mce_severity. `is_excp' is used to explicitly specify the calling context of mce_severity. Reviewed-by: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com> Signed-off-by: Chen Yucong <slaoub@gmail.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
2014-11-19assorted conversions to %p[dD]Al Viro
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2014-11-19KVM: x86: Remove FIXMEs in emulate.cNicholas Krause
Remove FIXME comments about needing fault addresses to be returned. These are propaagated from walk_addr_generic to gva_to_gpa and from there to ops->read_std and ops->write_std. Signed-off-by: Nicholas Krause <xerofoify@gmail.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-11-19KVM: emulator: remove duplicated limit checkPaolo Bonzini
The check on the higher limit of the segment, and the check on the maximum accessible size, is the same for both expand-up and expand-down segments. Only the computation of "lim" varies. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-11-19ARM: multi_v7_defconfig: fix failure setting CPU voltage by enabling ↵Tyler Baker
dependent I2C controller This patch fixes a long standing issue introduced during the 3.16 merge window. Shortly after the merge, exynos5250-based arndale boards began to produce the following errors: kern.err kernel: exynos-cpufreq exynos-cpufreq: failed to set cpu voltage kern.err kernel: cpufreq: __target_index: Failed to change cpu frequency: -22 Further analysis revealed that the S5M8767 voltage regulator used on the exynos5250-based arndale board utilizes the S3C2410 I2C controller. If the S3C2410 I2C controller driver is not enabled, the S5M8767 voltage regulator fails to probe. Therefore a dependency exists between these two drivers. In the exynos_defconfig both CONFIG_REGULATOR_S5M8767 and CONFIG_I2C_S3C2410 options are enabled, and no errors are produced. However, in the multi_v7_defconfig only the CONFIG_REGULATOR_S5M8767 option is enabled and the errors are present. So let's enable the CONFIG_I2C_S3C2410 option in the multi_v7_defconfig to allow the S5M8767 voltage regulator to probe. Signed-off-by: Tyler Baker <tyler.baker@linaro.org> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Kevin Hilman <khilman@linaro.org>
2014-11-19KVM: emulator: remove code duplication in register_address{,_increment}Paolo Bonzini
register_address has been a duplicate of address_mask ever since the ancestor of __linearize was born in 90de84f50b42 (KVM: x86 emulator: preserve an operand's segment identity, 2010-11-17). However, we can put it to a better use by including the call to reg_read in register_address. Similarly, the call to reg_rmw can be moved to register_address_increment. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-11-19MIPS: jump_label.c: Handle the microMIPS J instruction encodingMaciej W. Rozycki
Implement the microMIPS encoding of the J instruction for the purpose of the static keys feature, fixing a crash early on in bootstrap as the kernel is unhappy seeing the ISA bit set in jump table entries. Make sure the ISA bit correctly reflects the instruction encoding chosen for the kernel, 0 for the standard MIPS and 1 for the microMIPS encoding. Also make sure the instruction to patch is a 32-bit NOP in the microMIPS mode as by default the 16-bit short encoding is assumed Signed-off-by: Maciej W. Rozycki <macro@codesourcery.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/8516/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-19MIPS: jump_label.c: Correct the span of the J instructionMaciej W. Rozycki
Correct the check for the span of the 256MB segment addressable by the J instruction according to this instruction's semantics. The calculation of the jump target is applied to the address of the delay-slot instruction that immediately follows. Adjust the check accordingly by adding 4 to `e->code' that holds the address of the J instruction itself. Signed-off-by: Maciej W. Rozycki <macro@codesourcery.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/8515/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-19MIPS: Zero variable read by get_user / __get_user in case of an error.Ralf Baechle
This wasn't happening in all cases. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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