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2014-11-10powerpc/ftrace: simplify prepare_ftrace_returnAnton Blanchard
Instead of passing in the stack address of the link register to be modified, just pass in the old value and return the new value and rely on ftrace_graph_caller to do the modification. This removes the exception handling around the stack update - it isn't needed and we weren't consistent about it. Later on we would do an unprotected modification: if (!ftrace_graph_entry(&trace)) { *parent = old; Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2014-11-10powerpc/ftrace: Remove mod_return_to_handlerAnton Blanchard
mod_return_to_handler is the same as return_to_handler, except it handles the change of the TOC (r2). Add this into return_to_handler and remove mod_return_to_handler. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2014-11-10powerpc: make __ffs return unsigned longAnton Blanchard
I'm seeing a build warning in mm/nobootmem.c after removing bootmem: mm/nobootmem.c: In function '__free_pages_memory': include/linux/kernel.h:713:17: warning: comparison of distinct pointer types lacks a cast [enabled by default] (void) (&_min1 == &_min2); \ ^ mm/nobootmem.c:90:11: note: in expansion of macro 'min' order = min(MAX_ORDER - 1UL, __ffs(start)); ^ The rest of the worlds seems to define __ffs as returning unsigned long, so lets do that. Signed-off-by: Anton Blanchard <anton@samba.org> Tested-by: Emil Medve <Emilian.Medve@Freescale.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2014-11-10powerpc: Move sparse_init() into initmem_initAnton Blanchard
We did part of sparse initialisation in setup_arch and part in initmem_init. Put them together. Signed-off-by: Anton Blanchard <anton@samba.org> Tested-by: Emil Medve <Emilian.Medve@Freescale.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2014-11-10powerpc: Remove superfluous bootmem includesAnton Blanchard
Lots of places included bootmem.h even when not using bootmem. Signed-off-by: Anton Blanchard <anton@samba.org> Tested-by: Emil Medve <Emilian.Medve@Freescale.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2014-11-10powerpc: Remove some old bootmem related commentsAnton Blanchard
Now bootmem is gone from powerpc we can remove comments mentioning it. Signed-off-by: Anton Blanchard <anton@samba.org> Tested-by: Emil Medve <Emilian.Medve@Freescale.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2014-11-10powerpc: Remove bootmem allocatorAnton Blanchard
At the moment we transition from the memblock alloctor to the bootmem allocator. Gitting rid of the bootmem allocator removes a bunch of complicated code (most of which I owe the dubious honour of being responsible for writing). Signed-off-by: Anton Blanchard <anton@samba.org> Tested-by: Emil Medve <Emilian.Medve@Freescale.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2014-11-09Merge tag 'arm64-fixes' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux Pull arm64 fixes from Catalin Marinas: - enable bpf syscall for compat - cpu_suspend fix when checking the idle state type - defconfig update * tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: arm64: defconfig: update defconfig for 3.18 arm64: compat: Enable bpf syscall arm64: psci: fix cpu_suspend to check idle state type for index
2014-11-09Merge tag 'armsoc-for-rc4' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC fixes from Olof Johansson: "Another quiet week: - a fix to silence edma probe error on non-supported platforms from Arnd - a fix to enable the PL clock for Parallella, to make mainline usable with the SDK. - a somewhat verbose fix for the PLL clock tree on VF610 - enabling of SD/MMC on one of the VF610-based boards (for testing) - a fix for i.MX where CONFIG_SPI used to be implicitly enabled and now needs to be added to the defconfig instead - another maintainer added for bcm2835: Lee Jones" * tag 'armsoc-for-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: ARM: dts: zynq: Enable PL clocks for Parallella dma: edma: move device registration to platform code ARM: dts: vf610: add SD node to cosmic dts MAINTAINERS: update bcm2835 entry ARM: imx: Fix the removal of CONFIG_SPI option ARM: imx: clk-vf610: define PLL's clock tree
2014-11-08ARM: at91: fix build breakage due to legacy board removalsOlof Johansson
Fixes the following missing includes: arch/arm/mach-at91/at91sam9g45.c: In function 'at91sam9g45_init_time': arch/arm/mach-at91/at91sam9g45.c:39:23: error: 'NR_IRQS_LEGACY' undeclared (first use in this function) at91sam926x_pit_init(NR_IRQS_LEGACY + AT91_ID_SYS); ^ arch/arm/mach-at91/at91sam9g45.c:39:23: note: each undeclared identifier is reported only once for each function it appears in make[3]: *** [arch/arm/mach-at91/at91sam9g45.o] Error 1 arch/arm/mach-at91/at91sam9rl.c: In function 'at91sam9rl_init_time': arch/arm/mach-at91/at91sam9rl.c:51:23: error: 'NR_IRQS_LEGACY' undeclared (first use in this function) at91sam926x_pit_init(NR_IRQS_LEGACY + AT91_ID_SYS); Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2014-11-09irqchip: bcm7120-l2: Decouple driver from brcmstb-l2Kevin Cernekee
Some chips, such as BCM6328, only require bcm7120-l2. Some BCM7xxx STB configurations only require brcmstb-l2. Treat them as two separate entities, and update the mach-bcm dependencies to reflect the change. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lkml.kernel.org/r/1415342669-30640-13-git-send-email-cernekee@gmail.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-11-09ARM: mvebu: Remove thermal quirk for A375 Z1 revisionEzequiel Garcia
The Armada 375 Z1 SoC revision is no longer supported. This commit removes the quirk required to "fix" the reg property and the compatible string of the thermal devicetree node. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Link: https://lkml.kernel.org/r/1415116839-4323-3-git-send-email-ezequiel.garcia@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-11-08Merge tag 'nomadik-for-v3.19' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into next/dt Merge "Nomadik updates for the v3.19 series" from Linus Walleij: Nomadik changes for the v3.19 development series: - Rearrange the DTS files to make a pure SoC-specific file and a pure board file for S8815. - Add the device tree for the NDK15 board. - Update the defconfig and configure in the STMPE expander by default on the Nomadik. * tag 'nomadik-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik: ARM: nomadik: configure in STMPE support ARM: update Nomadik config ARM: nomadik: device tree for NHK15 board ARM: nomadik: push ethernet down to board ARM: nomadik: set up MCDATDIR2 ARM: nomadik: move GPIO I2C to S8815 board file ARM: nomadik: disable chrystals in top level board files ARM: nomadik: move MMC/SD card detect GPIO to board DTS Signed-off-by: Olof Johansson <olof@lixom.net>
2014-11-08ARM: dts: zynq: Enable PL clocks for ParallellaAndreas Färber
The Parallella board comes with a U-Boot bootloader that loads one of two predefined FPGA bitstreams before booting the kernel. Both define an AXI interface to the on-board Epiphany processor. Enable clocks FCLK0..FCLK3 for the Programmable Logic by default. Otherwise accessing, e.g., the ESYSRESET register freezes the board, as seen with the Epiphany SDK tools e-reset and e-hw-rev, using /dev/mem. Cc: <stable@vger.kernel.org> # 3.17.x Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2014-11-08Merge tag 'at91-cleanup' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91 into next/cleanup Merge "at91: cleanup for 3.19 #1" from Nicolas Ferre: "The pull-request that was sent late for 3.18. It was removing the old !MMU at91x40 and 2 board files plus the whole code in at91sam9g45 & at91sam9rl files for implementing this deprecated method. For these particular ones, the EK were the only one to use this code. We can use these boards with DT right now." First batch of cleanup/SoC for 3.19: - removal of old at91x40 !MMU ARM7TDMI support which was kind of rusty - removal of board-sam9m10g45ek.c and board-sam9rlek.c from mach-at91 and the code related to these board C files + defconfigs. Use DT for them now! * tag 'at91-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91: ARM: at91: remove at91sam9rl legacy board support ARM: at91: remove at91sam9g45/9m10 legacy board support ARM: at91: remove no-MMU at91x40 support Signed-off-by: Olof Johansson <olof@lixom.net>
2014-11-08Merge tag 'at91-dt' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91 into next/dt Merge "at91: dt for 3.19 #1" from Nicolas Ferre: "Very little DT update for AT91. More will come but I want to send this first batch soon so it doesn't get in the way of larger modifications." First DT batch for 3.19: - CAN device nodes for at91sam9263 and at91sam9x5 - at91sam9x5 DMA definitions for usart * tag 'at91-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91: ARM: at91/dt: at91sam9263: Add CAN device nodes ARM: at91/dt: at91sam9x5: Add CAN device nodes ARM: at91/dt/trivial: at91sam9x5_can.dtsi: comment and whitespace fixes ARM: at91: at91sam9x5 dt: add usart dma definitions to dt Signed-off-by: Olof Johansson <olof@lixom.net>
2014-11-08Merge tag 'ux500-core-for-arm-soc' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/soc Merge "Ux500 core changes for v3.19" from Linus Walleij: "please pull in these Ux500 core changes for this kernel development cycle: mainly a generic power domain implementation from Ulf Hansson that needs to get queued up in -next and tested." Generic power domains for the Ux500 * tag 'ux500-core-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson: ARM: ux500: Add i2c devices to the VAPE PM domain ARM: ux500: Add spi and ssp devices to the VAPE PM domain ARM: ux500: Add sdi devices to the VAPE PM domain ARM: ux500: Add DT node for ux500 PM domains ARM: ux500: Enable Kconfig for the generic PM domain ARM: ux500: Initial support for PM domains dt: bindings: ux500: Add header for PM domains specifiers dt: bindings: ux500: Add documentation for PM domains ARM: u300: Convert pr_warning to pr_warn
2014-11-08Merge tag 'berlin-dt-3.19-1' of ↵Olof Johansson
git://git.infradead.org/users/hesselba/linux-berlin into next/dt Merge "ARM: berlin: DT changes for v3.19 (round 1)" from Sebastian Hesselbarth: "This is Berlin DT changes for v3.19 and contains those patches that missed the v3.18 merge window plus corresponding patches to catch-up with Antoine's BG2Q improvements for BG2 and BG2CD. We now have working SDHCI and Ethernet on all SoCs (well, BG2CD has HDMI HEC only), SATA PHY support for BG2 is still pending." Berlin DT changes for v3.19 (round 1) - AHCI and SATA PHY nodes for BG2Q - Reset controller binding docs - Ethernet nodes for BG2, BG2CD - SDHCI nodes for BG2, BG2CD - Corresponding board changes to enable AHCI, Ethernet, SDHCI * tag 'berlin-dt-3.19-1' of git://git.infradead.org/users/hesselba/linux-berlin: ARM: dts: berlin: Enable eMMC on Sony NSZ-GS7 ARM: dts: berlin: Enable WiFi on Google Chromecast ARM: dts: berlin: Add SDHCI controller nodes to BG2/BG2CD ARM: dts: berlin: Enable ethernet on Sony NSZ-GS7 ARM: dts: berlin: Add phy-connection-type to BG2Q Ethernet ARM: dts: berlin: Add BG2CD ethernet DT nodes ARM: dts: berlin: Add BG2 ethernet DT nodes ARM: dts: berlin: Add GPIO leds to Google Chromecast ARM: dts: berlin: enable timer 1 for sched_clock ARM: dts: berlin: add a required reset property in the chip controller node Documentation: bindings: add reset bindings docs for Marvell Berlin SoCs ARM: dts: berlin: enable the eSATA interface on the BG2Q DMP ARM: dts: berlin: add the AHCI node for the BG2Q Signed-off-by: Olof Johansson <olof@lixom.net>
2014-11-08Merge tag 'berlin-soc-3.19-1' of ↵Olof Johansson
git://git.infradead.org/users/hesselba/linux-berlin into next/soc Merge "ARM: berlin: SoC changes for v3.19 (round 1)" from Sebastian Hesselbarth: Berlin SoC changes for v3.19 (round 1) - Select the reset driver for all SoCs * tag 'berlin-soc-3.19-1' of git://git.infradead.org/users/hesselba/linux-berlin: ARM: Berlin: select the reset controller Signed-off-by: Olof Johansson <olof@lixom.net>
2014-11-08Merge tag 'sti-dt-for-v3.19-1' of ↵Olof Johansson
git://git.stlinux.com/devel/kernel/linux-sti into next/dt Merge "STi DT updates for v3.19, round 1" from Maxime Coquelin: Highlights: ----------- - Add SDHCI support for STiH41x B2020 boards - Add reset controllers to STiH407 SoC - Add MiPHY & SATA support to STiH416 - Add Thermal supportto STiH416 - Add Clock support to STiH407 SoC This tag also includes STiH407 bindings definitions for reset controller. * tag 'sti-dt-for-v3.19-1' of git://git.stlinux.com/devel/kernel/linux-sti: ARM: STi: DT: STiH407: Fix: clk-tmds-hdmi clock is missing ARM: STi: DT: STiH407: Add all defines for STiH407 DT clocks ARM: STi: DT: STiH407: 407 DT Entry for clockgenA9 ARM: STi: DT: STiH407: 407 DT Entry for clockgen D0/D2/D3 ARM: STi: DT: STiH407: 407 DT Entry for clockgen C0 ARM: STi: DT: STiH407: 407 DT Entry for clockgen A0 ARM: DT: STi: STiH416: Add DT node for ST's SATA device ARM: DT: STi: STiH416: Add DT node for MiPHY365x ARM: STi: DT: STiH416: Supply Thermal Controller Device Tree nodes ARM: STi: DT: Enable second sdhci controller for stih416 b2020 boards. ARM: STi: DT: Enable mmc0 for both stih415 and stih416 SoCs ARM: STi: DT: Add sdhci controller for stih415 ARM: STi: DT: Add sdhci pin configuration for stih415 ARM: STi: DT: Add sdhci controller for stih416 ARM: STi: DT: Add sdhci pins for stih416 ARM: sti: Add STiH407 reset controller support. ARM: sti: Add STiH407 Kconfig entry to select STIH407_RESET ARM: STi: DT: STiH41x: Convert all uppercase non-defines to lowercase reset: stih407: Add reset controllers DT bindings Signed-off-by: Olof Johansson <olof@lixom.net>
2014-11-08Merge tag 'arm-soc/for-3.18/cygnus-dts-v9' of http://github.com/brcm/linux ↵Olof Johansson
into next/dt Merge "Broadcom Cygnus SoC Device Tree changes" from Florian Fianelli: This patchset contains initial support for Broadcom's Cygnus SoC based on our iProc architecture. Initial support is minimal and includes just the mach platform code, clock driver, and a basic device tree configuration. Peripheral drivers will be submitted soon, as will device tree configurations for other Cygnus board variants. These are the Device Tree changes * tag 'arm-soc/for-3.18/cygnus-dts-v9' of http://github.com/brcm/linux: ARM: dts: Enable Broadcom Cygnus SoC dt-bindings: Document Broadcom Cygnus SoC and clocks Signed-off-by: Olof Johansson <olof@lixom.net>
2014-11-08Merge branch 'v3.19-next/pm-samsung-2' of ↵Olof Johansson
http://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/soc Merge "1st Round of Samsung PM updates for v3.19" from Kukjin Kim: Samsung PM (v2) updates for v3.19 - added fix build with ARM_CPU_SUSPEND=n based on previous tags/samsung-pm - Refactor the pm code to use DT based lookup instead of using "soc_is_exynosxxxx" - Firmware supporting suspend and resume to excute of low level operations to enter and leave power mode for exynos : introduce suspend() and resume() firmware operations - Fix AFTR mode on boards with secure firmware enabled and allows exynos cpuidle driver usage on exynos4x12 SoCs - Fix build with PM_SLEEP=n and ARM_EXYNOS_CPUIDLE=y - SWRESET is needed to boot secondary CPU on exynos3250 * 'v3.19-next/pm-samsung-2' of http://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: ARM: EXYNOS: Fix build with ARM_CPU_SUSPEND=n ARM: EXYNOS: SWRESET is needed to boot secondary CPU on exynos3250 ARM: EXYNOS: Fix build with PM_SLEEP=n and ARM_EXYNOS_CPUIDLE=y ARM: EXYNOS: allow driver usage on Exynos4x12 SoCs ARM: EXYNOS: fix register setup for AFTR mode code ARM: EXYNOS: add secure firmware support to AFTR mode code ARM: firmware: add AFTR mode support to firmware do_idle method ARM: EXYNOS: replace EXYNOS_BOOT_VECTOR_* macros by static inlines ARM: EXYNOS: Add support for firmware-assisted suspend/resume ARM: firmware: Introduce suspend and resume operations ARM: EXYNOS: Refactor the pm code to use DT based lookup ARM: EXYNOS: Move Disabling of JPEG USE_RETENTION for exynos5250 to pmu.c Signed-off-by: Olof Johansson <olof@lixom.net>
2014-11-08ARM: dts: sun6i: Re-parent ahb1_mux to pll6 as required by dma controllerChen-Yu Tsai
The dma controller requires that the ahb1 bus clock be driven by pll6 for peripheral access to work. Previously this was done in the dma controller driver, but was since removed as part of a series to unify the ahb1_mux and ahb1 clock drivers, in 14e0e28 dmaengine: sun6i: Remove obsolete clk muxing code Unfortunately the rest of that series did not make it, leaving us with broken dma on sun6i. This patch reparents ahb1_mux to pll6 using the DT assigned-clocks properties in the dma controller node. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2014-11-08kvm: x86: add trace event for pvclock updatesDavid Matlack
The new trace event records: * the id of vcpu being updated * the pvclock_vcpu_time_info struct being written to guest memory This is useful for debugging pvclock bugs, such as the bug fixed by "[PATCH] kvm: x86: Fix kvm clock versioning.". Signed-off-by: David Matlack <dmatlack@google.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-11-08kvm: x86: Fix kvm clock versioning.Owen Hofmann
kvm updates the version number for the guest paravirt clock structure by incrementing the version of its private copy. It does not read the guest version, so will write version = 2 in the first update for every new VM, including after restoring a saved state. If guest state is saved during reading the clock, it could read and accept struct fields and guest TSC from two different updates. This changes the code to increment the guest version and write it back. Signed-off-by: Owen Hofmann <osh@google.com> Reviewed-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-11-08KVM: x86: MOVNTI emulation min opsize is not respectedNadav Amit
Commit 3b32004a66e9 ("KVM: x86: movnti minimum op size of 32-bit is not kept") did not fully fix the minimum operand size of MONTI emulation. Still, MOVNTI may be mistakenly performed using 16-bit opsize. This patch add No16 flag to mark an instruction does not support 16-bits operand size. Signed-off-by: Nadav Amit <namit@cs.technion.ac.il> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-11-08KVM: x86: update masterclock values on TSC writesMarcelo Tosatti
When the guest writes to the TSC, the masterclock TSC copy must be updated as well along with the TSC_OFFSET update, otherwise a negative tsc_timestamp is calculated at kvm_guest_time_update. Once "if (!vcpus_matched && ka->use_master_clock)" is simplified to "if (ka->use_master_clock)", the corresponding "if (!ka->use_master_clock)" becomes redundant, so remove the do_request boolean and collapse everything into a single condition. Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-11-08KVM: x86: Return UNHANDLABLE on unsupported SYSENTERNadav Amit
Now that KVM injects #UD on "unhandlable" error, it makes better sense to return such error on sysenter instead of directly injecting #UD to the guest. This allows to track more easily the unhandlable cases the emulator does not support. Signed-off-by: Nadav Amit <namit@cs.technion.ac.il> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-11-08KVM: x86: Warn on APIC base relocationNadav Amit
APIC base relocation is unsupported by KVM. If anyone uses it, the least should be to report a warning in the hypervisor. Note that KVM-unit-tests uses this feature for some reason, so running the tests triggers the warning. Signed-off-by: Nadav Amit <namit@cs.technion.ac.il> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-11-08KVM: x86: Emulator mis-decodes VEX instructions on real-modeNadav Amit
Commit 7fe864dc942c (KVM: x86: Mark VEX-prefix instructions emulation as unimplemented, 2014-06-02) marked VEX instructions as such in protected mode. VEX-prefix instructions are not supported relevant on real-mode and VM86, but should cause #UD instead of being decoded as LES/LDS. Fix this behaviour to be consistent with real hardware. Signed-off-by: Nadav Amit <namit@cs.technion.ac.il> [Check for mod == 3, rather than 2 or 3. - Paolo] Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-11-07Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds
Pull MIPS updates from Ralf Baechle: "This weeks' round of MIPS bug fixes for 3.18: - wire up the bpf syscall - fix TLB dump output for R3000 class TLBs - fix strnlen_user return value if no NUL character was found. - fix build with binutils 2.24.51+. While there is no binutils 2.25 release yet, toolchains derived from binutils 2.24.51+ are already in common use. - the Octeon GPIO code forgot to offline GPIO IRQs. - fix build error for XLP. - fix possible BUG assertion with EVA for CMA" * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: MIPS: Fix build with binutils 2.24.51+ MIPS: R3000: Fix debug output for Virtual page number MIPS: Fix strnlen_user() return value in case of overlong strings. MIPS: CMA: Do not reserve memory if not required MIPS: Wire up bpf syscall. MIPS/Xlp: Remove the dead function destroy_irq() to fix build error MIPS: Octeon: Make Octeon GPIO IRQ chip CPU hotplug-aware
2014-11-07powerpc/dts: Add node(s) for the platform PLLEmil Medve
Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com> Change-Id: If76cd705a01813abe53396c1486bc13c4289ee92 Signed-off-by: Scott Wood <scottwood@freescale.com>
2014-11-07powerpc/dts: Factorize the clock control nodeEmil Medve
Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com> Change-Id: I25ce24a25862b4ca460164159867abefe00ccdd1 Signed-off-by: Scott Wood <scottwood@freescale.com>
2014-11-07powerpc: Add INA220 to device tree for supported boardsHongtao Jia
Including: P3041DS P5020DS P5040DS B4QDS Signed-off-by: Jia Hongtao <hongtao.jia@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
2014-11-07powerpc: Add ADT7461 to device tree for supported boardsHongtao Jia
Including: T104xRDB T208xQDS B4QDS Signed-off-by: Jia Hongtao <hongtao.jia@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
2014-11-07powerpc/fsl: Added rcw registers to global utility registersIgal Liberman
The RCW registers are required for the future clock binding implementation. Signed-off-by: Igal Liberman <Igal.Liberman@freescale.com> Change-Id: Ic36dd8bc2959aa7f97fb6fd7bbb8420822fef0a9 Signed-off-by: Scott Wood <scottwood@freescale.com>
2014-11-07powerpc/mpc85xx: Remove SPI and NAND partition from bsc9131rdb.dtsiAshish Kumar
* Run "mtdparts default" on u-boot to create dynamic partitions * Or use dynamic mtd partition with the help of bootargs in u-boot Append bootargs with: "mtdparts=ff800000.flash:1m(nand_uboot),512K(nand_dtb),8m(nand_kernel),-(fs);\ spiff707000.0:1m(spi_uboot),4m(spi_kernel),512k(spi_dtb),-(fs)'" Signed-off-by: Ashish Kumar <Ashish.Kumar@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
2014-11-07powerpc/8xx: Remove Kconfig symbol FADSPaul Bolle
Commit 39eb56da2b53 ("pcmcia: Remove m8xx_pcmcia driver") removed the only driver that used CONFIG_FADS. Setting the Kconfig symbol FADS is pointless since that commit. Remove it. Signed-off-by: Paul Bolle <pebolle@tiscali.nl> Signed-off-by: Scott Wood <scottwood@freescale.com>
2014-11-07powerpc/8xx: Invalidate non present TLB as early as possibleLEROY Christophe
8xx sometimes need to load a invalid/non-present TLBs in it DTLB asm handler. These must be invalidated separaly as linux mm doesn't. Commit 5efab4a02c89c252fb4cce097aafde5f8208dbfe was invalidating them in arch/powerpc/mm/fault.c. This patch does the invalidation earlier in order to free the TLB as soon as possible. This also has the advantage of removing some 8xx specific code from fault.c Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Signed-off-by: Scott Wood <scottwood@freescale.com>
2014-11-07powerpc/8xx: Use DAR to save r3 for CPU6 ERRATALEROY Christophe
As we are not using anymore DAR to save registers, it is now available for saving the r3 register used for CPU6 ERRATA handling. Therefore we can remove the major hack which was to use memory location 0 to save r3. Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Signed-off-by: Scott Wood <scottwood@freescale.com>
2014-11-07powerpc/8xx: Don't restore regs to save them again.LEROY Christophe
There is not need to restore r10, r11 and cr registers at this end of ITLBmiss handler as they are saved again to the same place in ITLBError handler we are jumping to. Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Signed-off-by: Scott Wood <scottwood@freescale.com>
2014-11-07powerpc/8xx: _PMD_PRESENT already set in level 1 entriesLEROY Christophe
When a PMD entry is valid, _PMD_PRESENT is set. Therefore, forcing that bit during TLB loading is useless. Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Signed-off-by: Scott Wood <scottwood@freescale.com>
2014-11-07powerpc/8xx: set PTE bit 22 off TLBmissLEROY Christophe
No need to re-set this bit at each TLB miss. Let's set it in the PTE. Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Signed-off-by: Scott Wood <scottwood@freescale.com>
2014-11-07powerpc/8xx: Better readibility of ERRATA CPU6 handlingLEROY Christophe
This patch hiddes that SPR address needed for CPU6 ERRATA handling in the macro. Then we don't have to worry about this address directly in the code. Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Signed-off-by: Scott Wood <scottwood@freescale.com>
2014-11-07powerpc/8xx: Implement 16k pagesLEROY Christophe
This patch activates the handling of 16k pages on the MPC8xx. Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Signed-off-by: Scott Wood <scottwood@freescale.com>
2014-11-07powerpc/8xx: Const for TLB RPN forced valueLEROY Christophe
Value 0x00f0 is used to force bits in TLB level 2 entry. This value is linked to the page size and will vary when we change the page size. Lets define a const for it in order to have it at only one place. Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Signed-off-by: Scott Wood <scottwood@freescale.com>
2014-11-07powerpc/8xx: Use PAGE size related constsLEROY Christophe
For PAGE size related operations, use PAGE size consts in order to be able to use different page size in the futur. Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Signed-off-by: Scott Wood <scottwood@freescale.com>
2014-11-07powerpc/8xx: Don't use MD_TWC for walkLEROY Christophe
MD_TWC can only be used properly with 4k pages. So lets calculate level 2 table index by ourselves. Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Signed-off-by: Scott Wood <scottwood@freescale.com>
2014-11-07powerpc/8xx: Use M_TW instead of M_TWBLEROY Christophe
Use M_TW instead of M_TWB for storing Level 1 table address as M_TWB requires 4k aligned tables, which is only the case with 4k pages. Consequently, we have to calculate the level 1 table index by ourselves. Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Signed-off-by: Scott Wood <scottwood@freescale.com>
2014-11-07powerpc/8xx: No need to restore registers and save them again.LEROY Christophe
In DTLBError handler there is not need to restore r10, r11 and cr registers after fixing DAR as they are saved again to the same place just after. Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Signed-off-by: Scott Wood <scottwood@freescale.com>
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