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LPC32xx can not yet be configured in a multiplatform kernel, but
if we ever get there, enabling one of the LPC32xx platforms
while trying to use DEBUG_LL for another platform can default to
the wrong UART address, as the options are purely based on the
architecture being enabled or not.
This changes the logic to use the LPC32xx default addresses only
if we have also picked the respective Kconfig symbols introduced
here.
While we're at it, this also reorders the virtual address as
it should be.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Vladimir Zapolskiy <vz@mleia.com>
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Gemini can not yet be configured in a multiplatform kernel, but
if we ever get there, enabling one of the gemini platforms
while trying to use DEBUG_LL for another platform can default to
the wrong UART address, as the options are purely based on the
architecture being enabled or not.
This changes the logic to use the gemini default addresses and
the flow control settings only if we have also picked the respective
Kconfig symbols introduced here.
While we're at it, this also reorders the virtual address as
it should be.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Hans Ulli Kroll <ulli.kroll@googlemail.com>
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Enabling one of the integrator platforms in a multiplatform kernel
while trying to use DEBUG_LL for another platform can default to
the wrong UART address, as the options are purely based on the
architecture being enabled or not.
This changes the logic to use the integrator default addresses only
if we have also picked the respective Kconfig symbols introduced
here. Versatile is not yet part of multiplatform, but hopefully
soon will be, so we do the same change for versatile as well.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Enabling one of the SPEAr platforms in a multiplatform kernel
while trying to use DEBUG_LL for another platform can default to
the wrong UART address, as the options are purely based on the
architecture being enabled or not.
This changes the logic to use the SPEAr default addresses only
if we have also picked the respective Kconfig symbols introduced
here.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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This makes ep93xx debug-ll handling more consistent with the other
platforms, by adding a separate Kconfig symbol for it that
in turn selects the standard DEBUG_UART_PL01X symbol.
We still have to pick a physical address even if DEBUG_LL is disabled
here, because the EP93xx uncompress output code uses
CONFIG_DEBUG_UART_PHYS. If we ever move to multiplatform support,
this can go away.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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As we are moving dove/mv78xx0/orion into multiplatform, the debug-ll
configuration options for these platforms are conflicting with the
multiplatform configuration: enabling one of those platforms sometimes
changes the default addresses to the ones used on one of them, rather
than the one that was selected in Kconfig.
This changes the configuration so we share the physical address
configuration with mach-mvebu.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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We may have multiple platforms enabled and also DEBUG_LL
configured for one of them. However if we enable ARCH_KEYSTONE,
we default to using 32-bit UART access independent of which
platform we are actually using, which can be confusing.
This changes the logic so the 32-bit default gets only
used by default if we actually configure the keystone
UART, as opposed to picking some other 8250 setting on
a kernel that has keystone support enabled.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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commit db0fa0cb0157 "scatterlist: use sg_phys()" did replacements of
the form:
phys_addr_t phys = page_to_phys(sg_page(s));
phys_addr_t phys = sg_phys(s) & PAGE_MASK;
However, this breaks platforms where sizeof(phys_addr_t) >
sizeof(unsigned long). Revert for 4.3 and 4.4 to make room for a
combined helper in 4.5.
Cc: <stable@vger.kernel.org>
Cc: Jens Axboe <axboe@fb.com>
Cc: Christoph Hellwig <hch@lst.de>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Andrew Morton <akpm@linux-foundation.org>
Fixes: db0fa0cb0157 ("scatterlist: use sg_phys()")
Suggested-by: Joerg Roedel <joro@8bytes.org>
Reported-by: Vitaly Lavrov <vel21ripn@gmail.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux
Pull ia64 fix from Tony Luck:
"Wire up mlock2() syscall for ia64"
* tag 'please-pull-mlock2' of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux:
[IA64] Enable mlock2 syscall for ia64
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Pavel Machek reports a warning about W+X pages found in the "Persisent"
kmap area. After grepping for it (using the correct spelling), and not
finding it, I noticed how the debug printk was just misspelled. Fix it.
The actual mapping bug that Pavel reported is still open. It's
apparently a separate issue from the known EFI page tables, looks like
it's related to the HIGHMEM mappings.
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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next/soc
Merge "Broadcom soc changes for v4.5" from Florian Fainelli:
This pull request contains Broadcom SoC changes for 4.5, with the following changes:
- Lucas Stach removes the workaround for an imprecise fault for Broadcom
BCM5301x SoCs (Northstar) since this is now handled by the ARM/Linux kernel
directly
- Hauke Merthens enables a bunch of erratas for the Cortex-A9 and PL310 L2
cache present on early Northstar chips (BCM4708)
- Kapil Hali adds SMP support for the Northstar Plus SoCs by consolidating the
existing SMP code for Kona SoCs (mobile platforms), fixng the Device Tree
binding for the Kona platforms (wrong placement for 'enable-method' and
'secondary-reg') and then finally adds the functional code for the Northstar
Plus platforms to boot their secondary CPUs
- Jon Mason enables SMP on BCM4708/BCM5301X (Northstar SoCs) by building the generic
Northstar/Northstar Plus SMP code, and adding the relevant SMP Device Tree nodes
* tag 'arm-soc/for-4.5/soc' of http://github.com/Broadcom/stblinux:
ARM: BCM: Add SMP support for Broadcom 4708
ARM: BCM: Add SMP support for Broadcom NSP
ARM: BCM: Clean up SMP support for Broadcom Kona
ARM: BCM5310X: activate erratas needed for SoC
ARM: BCM5301X: remove workaround imprecise abort fault handler
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The code for switching to irq_stack stores three pieces of information on
the stack, fp+lr, as a fake stack frame (that lets us walk back onto the
interrupted tasks stack frame), and the address of the struct pt_regs that
contains the register values from kernel entry. (which dump_backtrace()
will print in any stack trace).
To reduce this, we store fp, and the pointer to the struct pt_regs.
unwind_frame() can recognise this as the irq_stack dummy frame, (as it only
appears at the top of the irq_stack), and use the struct pt_regs values
to find the missing interrupted link-register.
Suggested-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: James Morse <james.morse@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
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http://github.com/Broadcom/stblinux into next/dt
Pull "Broadcom devicetree changes for v4.5¨ from Florian Fainelli:
This pull request contains the Broadcom ARM-based Device Tree changes for 4.5:
- Jon Mason enables the following for Broadcom Northstar Plus SoCs: PCI (using
iProc PCI), NAND flash controller (BRCMNAND), TWD Timer and Watchdog
(Cortex-A9), I2C (iProc), clock providers, does some Device Tree cleanups
(re-parenting, fixing register sizes and hierarchy)
- Jon Mason also adds support for some reference Broadcom Northstar reference
designs like the BCM5301X SVK reference boards, updates the existing binding
documentation to cover the Northstar chips: 4708, 4709 and 53012.
- Pramod Kumar adds the GPIO to pinctrl mapping for the Broadcom Northstar Plus
SoCs
- Yendapally Reddy Dhananjaya Reddy adds pinctrl Device Tree nodes for the
Broadcom Northstar Plus SoCs device tree nodes
- Ray Jui adds Cygnus PCIe PHY Device Tree nodes and enables MSI for the iProc
PCI controller on Cygnus platforms
- Kapil Hali adds SMP binding documentation and Device Tree nodes for the
Northstar Plus SoCs
- Florian Fainelli adds clock provider support for the Broadcom BCM63138 DSL
SoCs by utilizing the existing iProc ARM PLL controller, this includes a
stable topic branch from Stephen Boyd to be merged
- Rafal Milecki adds missing LEDs for the Netgear R8000 router
* tag 'arm-soc/for-4.5/devicetree' of http://github.com/Broadcom/stblinux:
ARM: dts: Enable MSI support for Broadcom Cygnus
ARM: dts: Add SMP support for Broadcom NSP
dt-bindings: add SMP enable-method for Broadcom NSP
ARM: dts: enable pinctrl for Broadcom NSP
ARM: dts: enable PCIe PHY support for Cygnus
ARM: dts: Cygnus: define ngpios property in gpio controller's node
ARM: BCM5301X: Add missing Netgear R8000 LEDs
ARM: dts: BCM63xx: Add ARMPLL device tree nodes
clk: bcm: Add BCM63138 clock support
clk: iproc: Extend binding to cover BCM63138
ARM: dts: enable clock support for Broadcom NSP
ARM: dts: enable clock support for BCM5301X
ARM: dts: NSP: Add I2C support to the DT
ARM: dts: NSP: Device Tree clean-ups
dts: pinctrl: Add GPIO to Pinctrl pin mapping in DT
ARM: dts: bcm5301x: Add BCM SVK DT files
dt-bindings: Add new SoCs to bcm4708 DT bindings
ARM: dts: NSP: Add TWD Support to DT
ARM: dts: NSP: Add NAND Support to DT
ARM: dts: NSP: Add PCI support
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In order to meet high performance an low power requirement for Rockchip
enable the power domain support. The patch also fixes a drm/kms issue,
driver deferring untils power-domains are available)
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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property
Though the driver will continue to check for and support the legacy
"isil,irq2-can-wakeup-machine" boolean property to wakeup source,
"wakeup-source" is the new standard binding.
This patch replaces the legacy "isil,irq2-can-wakeup-machine" with the
unified "wakeup-source" property in order to avoid any futher copy-paste
duplication.
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory Clement <gregory.clement@free-electrons.com>
Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into next/defconfig
Merge "SoCFPGA defconfig update for v4.5" from Dinh Nguyen:
-Enable USB OTG dual-role and some cleanup by make savedefconfig
* tag 'socfpga_defconfig_for_v4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
arm: socfpga_defconfig: enable USB dual-role and cleanup
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This adds a few features that are available on some
or all of the RealView but never made it into the SMP
defconfig file:
- Full tickless idle
- High resolution timers
- Perf events and HW perf events from the PMU
- MTD AFS partition handling
- MTD ROM partition handling
- USB and ISP1760 USB driver
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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This adds a few features that are available on some
or all of the RealView but never made it into the defconfig
file:
- High-resolution timers
- Perf events and HW perf events from the PMU
- MTD AFS partition handling
- MTD ROM partition handling
- USB and ISP1760 USB driver
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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This updates the RealView SMP defconfig with the latest Kconfig
structure.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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This updates the RealView defconfig with the latest Kconfig
structure.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Enable the GPU for SolidRun's Cubox.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
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Add DT support for the Vivante GC600 GPU on Marvell Dove platforms.
These nodes default to being disabled unless a platform decides they
should be enabled.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
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This patch enables some drivers for LS1021A, such as
GIANFAR, WATCHDOG, AUDIO, QSPI, I2C, ESDHC, EDMA, FTM.
QorIQ Clock Framework and Ramdisk support is also enabled.
Signed-off-by: Alison Wang <alison.wang@freescale.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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into next/defconfig
Merge "mvebu defconfig for 4.5 (part 2)" from Gregory CLEMENT:
- Reenable DSA in mvebu_v5_defconfig
- Update multi_v5_defconfig after adding Orion5x to multiarch
* tag 'mvebu-defconfig-4.5-2' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: update v5 defconfig for Orion5x machines
ARM: mvebu: Reenable DSA in mvebu_v5_defconfig
ARM: config: Add orion5x to multi_v5_defconfig
ARM: config: Reenable DSA in multi_v5_defconfig
ARM: config: Regenerate multi_v5_defconfig
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https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/defconfig
Merge "Allwinner defconfig changes for 4.5" from Maxime Ripard:
A bunch of patches to enable new drivers related to Allwinner SoCs.
* tag 'sunxi-defconfig-for-4.5' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
ARM: sunxi: Clean up sunxi_defconfig
ARM: sunxi: Really enable LRADC keys in sunxi_defconfig
ARM: sunxi: Re-enable SID driver in sunxi_defconfig
ARM: sunxi: Re-enable SID driver in multi_v7_defconfig
ARM: multi_v7_defconfig: Enable RSB and AXP20X related drivers as modules
ARM: sunxi_defconfig: Update MFD_AXP20X symbol and enable MFD_AXP20X_RSB
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into next/defconfig
Merge "mvebu defconfig for 4.5 (part 1)" from Gregory CLEMENT:
update of mvebu_v5 defconfig with the addition of cpuidle
* tag 'mvebu-defconfig-4.5-1' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: add Kirkwood cpuidle to defconfig
ARM: mvebu: update v5 defconfig
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into next/cleanup
Merge "MTD/NAND cleanups for v4.5" from Brian Norris:
Two changes for NAND/MTD refactoring. The mtd_to_nand() helper will allow us to
stop using mtd->priv for NAND drivers.
* tag 'arm-soc/for-4.5/cleanup' of git://git.infradead.org/linux-mtd:
ARM: nand: make use of mtd_to_nand() where appropriate
mtd: nand: add an mtd_to_nand() helper
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next/cleanup
Merge "mvebu cleanup for 4.5 (part 1)" from Gregory CLEMENT:
remove unused mach/gpio.h in mach-mvebu
* tag 'mvebu-cleanup-4.5-1' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: remove unused mach/gpio.h
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This adds a device tree for the CloudEngines PogoPlug series 4
NAS device. Inspired by out-of-tree boardfiles from ArchLinux
by Kevin Mihelich.
Cc: Moonman <moonman.ca@gmail.com>
Cc: Kevin Mihelich <kevin@archlinuxarm.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
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Add a new DTS file to support the Zyxel NSA325(v2) dual bay
NAS device, based on the NSA320 DTS files.
The only difference to the NSA320 device is GPIO47.
This en/disables the power for the hdd in slot2, currently
fixed to on.
[gregory.clement@free-electrons.com: fix comment format]
Signed-off-by: Hans Ulli Kroll <ulli.kroll@googlemail.com>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
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Verify that the guest maximum storage address is below the MHA (maximum
host address) value allowed on the host.
Acked-by: Michael Holzheu <holzheu@linux.vnet.ibm.com>
Reviewed-by: Cornelia Huck <cornelia.huck@de.ibm.com>
Reviewed-by: David Hildenbrand <dahi@linux.vnet.ibm.com>
Signed-off-by: Guenther Hutzl <hutzl@linux.vnet.ibm.com>
Signed-off-by: Dominik Dingel <dingel@linux.vnet.ibm.com>
[adopt to match recent limit,size changes]
Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
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While the userspace interface requests the maximum size the gmap code
expects to get a maximum address.
This error resulted in bigger page tables than necessary for some guest
sizes, e.g. a 2GB guest used 3 levels instead of 2.
At the same time we introduce KVM_S390_NO_MEM_LIMIT, which allows in a
bright future that a guest spans the complete 64 bit address space.
We also switch to TASK_MAX_SIZE for the initial memory size, this is a
cosmetic change as the previous size also resulted in a 4 level pagetable
creation.
Reported-by: David Hildenbrand <dahi@linux.vnet.ibm.com>
Reviewed-by: Cornelia Huck <cornelia.huck@de.ibm.com>
Signed-off-by: Dominik Dingel <dingel@linux.vnet.ibm.com>
Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
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The s390dbf and trace events provide a debugfs interface.
If kptr_restrict is active, we should not expose kernel
pointers. We can fence the debugfs output by using %pK
instead of %p.
Cc: Kees Cook <keescook@chromium.org>
Reviewed-by: Cornelia Huck <cornelia.huck@de.ibm.com>
Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
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Replace two memcpy with proper assignment.
Suggested-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: David Hildenbrand <dahi@linux.vnet.ibm.com>
Acked-by: Cornelia Huck <cornelia.huck@de.ibm.com>
Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
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Section mismatches can now result in build failures.
As result, cris:allnoconfig fails to build as follows.
WARNING: modpost: Found 7 section mismatch(es).
To see full details build your kernel with:
'make CONFIG_DEBUG_SECTION_MISMATCH=y'
FATAL: modpost: Section mismatches detected.
Set CONFIG_SECTION_MISMATCH_WARN_ONLY=y to allow them.
Part of the problem is that references from .text to .init.text
are not permitted, and such references are used in cris startup code.
Since references from .head.text to .init.text are permitted, move
cris startup code to a new section .head.text.
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com>
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Section mismatches can now cause build failures, such as for
cris:allnoconfig. Rename affected variables to end with _console
to make section mismatch checks happy.
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com>
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__user_swpX_asm maybe failed in first STREX operation, emulate_swpX
will try again, but the *data has been changed in first time. which
causes the result is wrong.
This patch is to fix this issue. When STREX succeed, change the *data.
if it fail, *data is not changed.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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In cpu_v7_do_suspend routine, r11 is used while it is NOT
saved/restored, different compiler may have different usage
of ARM general registers, so it may cause issues during
calling cpu_v7_do_suspend.
We meet kernel fault occurs when using GCC 4.8.3, r11 contains
valid value before calling into cpu_v7_do_suspend, but when returned
from this routine, r11 is corrupted and lead to kernel fault.
Doing save/restore for those corrupted registers is a must in
assemble code.
Signed-off-by: Anson Huang <Anson.Huang@freescale.com>
Reviewed-by: Nicolas Pitre <nico@linaro.org>
Cc: <stable@vger.kernel.org> # v3.3+
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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The uaccess_with_memcpy() code is currently incompatible with the SW
PAN code: it takes locks within the region that we've changed the DACR,
potentially sleeping as a result. As we do not save and restore the
DACR across co-operative sleep events, can lead to an incorrect DACR
value later in this code path.
Reported-by: Peter Rosin <peda@axentia.se>
Tested-by: Peter Rosin <peda@axentia.se>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Data have to be held longer for the PMIC device. The ACT8945A
datasheet claims that minimum SDA data hold time is about 300 ns.
Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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A new compatible string has been introduced: atmel,sama5d4-i2c. It
allows to use the i2c-sda-hold-time-ns property if needed.
Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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After the change of frequency a SAMA5D4 can reach, we have to modify the
maximum clock specification for the master clock, up to 200MHz now.
It avoids the wrong message saying that "master clk is overclocked" for this
configuration.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Merge in EFI memblock changes from Ard, which form the preparatory work
for UEFI support on 32-bit ARM.
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Enable AT91SAM9X and SAMA5D4 watchdog drivers.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Add watchdog node to support SAMA5D4 watchdog.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Add support for the DENX MA5D4 SoM and MA5D4EVK board. The system
consists of a SoM with eMMC, SPI NOR for booting, 2x SPI CAN chip
and an EVK with microSD slot, 2x UART, 2x CAN port, 3x USB port,
LEDs and expansion headers.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Cc: Josh Wu <josh.wu@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Add pinmux for the 4 remaining signals used in 8-bit MMC 0
bus configuration.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Reviewed-by: Josh Wu <josh.wu@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Synchronise the comments in mmc0 pinmux node with HSMCI0 pinmux
description in the Atmel SAMA5D4 datasheet from 24-Aug-15 page
1119, section 37.6.1, Table 37-3 .
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Reviewed-by: Josh Wu <josh.wu@atmel.com>
Reported-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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WARN() takes a condition and a format string. The condition was
omitted. So I added it.
Signed-off-by: Geliang Tang <geliangtang@163.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
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The DA830 chip only works if the dcache is in writethrough mode,
but that produces a harmless Kconfig warning if the cache happens
to be disabled:
warning: (ARCH_DAVINCI_DA830) selects CPU_DCACHE_WRITETHROUGH which has unmet direct dependencies ((CPU_ARM740T || CPU_ARM920T || CPU_ARM922T || CPU_ARM925T || CPU_ARM926T || CPU_ARM940T || CPU_ARM946E || CPU_ARM1020 || CPU_FA526) && !CPU_DCACHE_DISABLE)
This makes the select conditional so we don't have to worry
about the warning in randconfig builds any more.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
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