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2021-08-08Merge tag 'tty-5.14-rc5' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty Pull tty/serial fixes from Greg KH: "Here are some small tty/serial driver fixes for 5.14-rc5 to resolve a number of reported problems. They include: - mips serial driver fixes - 8250 driver fixes for reported problems - fsl_lpuart driver fixes - other tiny driver fixes All have been in linux-next for a while with no reported problems" * tag 'tty-5.14-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty: serial: 8250_pci: Avoid irq sharing for MSI(-X) interrupts. serial: 8250_mtk: fix uart corruption issue when rx power off tty: serial: fsl_lpuart: fix the wrong return value in lpuart32_get_mctrl serial: 8250_pci: Enumerate Elkhart Lake UARTs via dedicated driver serial: 8250: fix handle_irq locking serial: tegra: Only print FIFO error message when an error occurs MIPS: Malta: Do not byte-swap accesses to the CBUS UART serial: 8250: Mask out floating 16/32-bit bus bits serial: max310x: Unprepare and disable clock in error path
2021-08-07Merge tag 'riscv-for-linus-5.14-rc5' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux Pull RISC-V fixes from Palmer Dabbelt: - avoid dereferencing a null task pointer while walking the stack - fix the memory size in the HiFive Unleashed device tree - disable stack protectors when randstruct is enabled, which results in non-deterministic offsets during module builds - a pair of fixes to avoid relying on a constant physical memory base for the non-XIP builds * tag 'riscv-for-linus-5.14-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: Revert "riscv: Remove CONFIG_PHYS_RAM_BASE_FIXED" riscv: Get rid of CONFIG_PHYS_RAM_BASE in kernel physical address conversion riscv: Disable STACKPROTECTOR_PER_TASK if GCC_PLUGIN_RANDSTRUCT is enabled riscv: dts: fix memory size for the SiFive HiFive Unmatched riscv: stacktrace: Fix NULL pointer dereference
2021-08-07Merge tag 'kbuild-fixes-v5.14-2' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild Pull Kbuild fixes from Masahiro Yamada: - Correct the Extended Regular Expressions in tools - Adjust scripts/checkversion.pl for the current Kbuild - Unset sub_make_done for 'make install' to make DKMS work again * tag 'kbuild-fixes-v5.14-2' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild: kbuild: cancel sub_make_done for the install target to fix DKMS scripts: checkversion: modernize linux/version.h search strings mips: Fix non-POSIX regexp x86/tools/relocs: Fix non-POSIX regexp
2021-08-06Revert "riscv: Remove CONFIG_PHYS_RAM_BASE_FIXED"Alexandre Ghiti
This reverts commit 9b79878ced8f7ab85c57623f8b1f6882e484a316. The removal of this config exposes CONFIG_PHYS_RAM_BASE for all kernel types: this value being implementation-specific, this breaks the genericity of the RISC-V kernel so revert it. Signed-off-by: Alexandre Ghiti <alex@ghiti.fr> Tested-by: Emil Renner Berthing <kernel@esmil.dk> Reviewed-by: Jisheng Zhang <jszhang@kernel.org> Cc: stable@vger.kernel.org Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2021-08-06riscv: Get rid of CONFIG_PHYS_RAM_BASE in kernel physical address conversionAlexandre Ghiti
The usage of CONFIG_PHYS_RAM_BASE for all kernel types was a mistake: this value is implementation-specific and this breaks the genericity of the RISC-V kernel. Fix this by introducing a new variable phys_ram_base that holds this value at runtime and use it in the kernel physical address conversion macro. Since this value is used only for XIP kernels, evaluate it only if CONFIG_XIP_KERNEL is set which in addition optimizes this macro for standard kernels at compile-time. Signed-off-by: Alexandre Ghiti <alex@ghiti.fr> Tested-by: Emil Renner Berthing <kernel@esmil.dk> Reviewed-by: Jisheng Zhang <jszhang@kernel.org> Fixes: 44c922572952 ("RISC-V: enable XIP") Cc: stable@vger.kernel.org Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2021-08-07powerpc/pseries: Fix update of LPAR security flavor after LPMLaurent Dufour
After LPM, when migrating from a system with security mitigation enabled to a system with mitigation disabled, the security flavor exposed in /proc is not correctly set back to 0. Do not assume the value of the security flavor is set to 0 when entering init_cpu_char_feature_flags(), so when called after a LPM, the value is set correctly even if the mitigation are not turned off. Fixes: 6ce56e1ac380 ("powerpc/pseries: export LPAR security flavor in lparcfg") Cc: stable@vger.kernel.org # v5.13+ Signed-off-by: Laurent Dufour <ldufour@linux.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20210805152308.33988-1-ldufour@linux.ibm.com
2021-08-07powerpc/smp: Fix OOPS in topology_init()Christophe Leroy
Running an SMP kernel on an UP platform not prepared for it, I encountered the following OOPS: BUG: Kernel NULL pointer dereference on read at 0x00000034 Faulting instruction address: 0xc0a04110 Oops: Kernel access of bad area, sig: 11 [#1] BE PAGE_SIZE=4K SMP NR_CPUS=2 CMPCPRO Modules linked in: CPU: 0 PID: 1 Comm: swapper/0 Not tainted 5.13.0-pmac-00001-g230fedfaad21 #5234 NIP: c0a04110 LR: c0a040d8 CTR: c0a04084 REGS: e100dda0 TRAP: 0300 Not tainted (5.13.0-pmac-00001-g230fedfaad21) MSR: 00009032 <EE,ME,IR,DR,RI> CR: 84000284 XER: 00000000 DAR: 00000034 DSISR: 20000000 GPR00: c0006bd4 e100de60 c1033320 00000000 00000000 c0942274 00000000 00000000 GPR08: 00000000 00000000 00000001 00000063 00000007 00000000 c0006f30 00000000 GPR16: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000005 GPR24: c0c67d74 c0c67f1c c0c60000 c0c67d70 c0c0c558 1efdf000 c0c00020 00000000 NIP [c0a04110] topology_init+0x8c/0x138 LR [c0a040d8] topology_init+0x54/0x138 Call Trace: [e100de60] [80808080] 0x80808080 (unreliable) [e100de90] [c0006bd4] do_one_initcall+0x48/0x1bc [e100def0] [c0a0150c] kernel_init_freeable+0x1c8/0x278 [e100df20] [c0006f44] kernel_init+0x14/0x10c [e100df30] [c00190fc] ret_from_kernel_thread+0x14/0x1c Instruction dump: 7c692e70 7d290194 7c035040 7c7f1b78 5529103a 546706fe 5468103a 39400001 7c641b78 40800054 80c690b4 7fb9402e <81060034> 7fbeea14 2c080000 7fa3eb78 ---[ end trace b246ffbc6bbbb6fb ]--- Fix it by checking smp_ops before using it, as already done in several other places in the arch/powerpc/kernel/smp.c Fixes: 39f87561454d ("powerpc/smp: Move ppc_md.cpu_die() to smp_ops.cpu_offline_self()") Cc: stable@vger.kernel.org Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/75287841cbb8740edd44880fe60be66d489160d9.1628097995.git.christophe.leroy@csgroup.eu
2021-08-07powerpc/32: Fix critical and debug interrupts on BOOKEChristophe Leroy
32 bits BOOKE have special interrupts for debug and other critical events. When handling those interrupts, dedicated registers are saved in the stack frame in addition to the standard registers, leading to a shift of the pt_regs struct. Since commit db297c3b07af ("powerpc/32: Don't save thread.regs on interrupt entry"), the pt_regs struct is expected to be at the same place all the time. Instead of handling a special struct in addition to pt_regs, just add those special registers to struct pt_regs. Fixes: db297c3b07af ("powerpc/32: Don't save thread.regs on interrupt entry") Cc: stable@vger.kernel.org Reported-by: Radu Rendec <radu.rendec@gmail.com> Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/028d5483b4851b01ea4334d0751e7f260419092b.1625637264.git.christophe.leroy@csgroup.eu
2021-08-07powerpc/32s: Fix napping restore in data storage interrupt (DSI)Christophe Leroy
When a DSI (Data Storage Interrupt) is taken while in NAP mode, r11 doesn't survive the call to power_save_ppc32_restore(). So use r1 instead of r11 as they both contain the virtual stack pointer at that point. Fixes: 4c0104a83fc3 ("powerpc/32: Dismantle EXC_XFER_STD/LITE/TEMPLATE") Cc: stable@vger.kernel.org # v5.13+ Reported-by: Finn Thain <fthain@linux-m68k.org> Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/731694e0885271f6ee9ffc179eb4bcee78313682.1628003562.git.christophe.leroy@csgroup.eu
2021-08-06Merge tag 'soc-fixes-5.14-2' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC fixes from Arnd Bergmann: "Lots of small fixes for Arm SoCs this time, nothing too worrying: - omap/beaglebone boot regression fix in gpt12 timer - revert for i.mx8 soc driver breaking as a platform_driver - kexec/kdump fixes for op-tee - various fixes for incorrect DT settings on imx, mvebu, omap, stm32, and tegra causing problems. - device tree fixes for static checks in nomadik, versatile, stm32 - code fixes for issues found in build testing and with static checking on tegra, ixp4xx, imx, omap" * tag 'soc-fixes-5.14-2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (36 commits) soc: ixp4xx/qmgr: fix invalid __iomem access soc: ixp4xx: fix printing resources ARM: ixp4xx: goramo_mlr depends on old PCI driver ARM: ixp4xx: fix compile-testing soc drivers soc/tegra: Make regulator couplers depend on CONFIG_REGULATOR ARM: dts: nomadik: Fix up interrupt controller node names ARM: dts: stm32: Fix touchscreen IRQ line assignment on DHCOM ARM: dts: stm32: Disable LAN8710 EDPD on DHCOM ARM: dts: stm32: Prefer HW RTC on DHCOM SoM omap5-board-common: remove not physically existing vdds_1v8_main fixed-regulator ARM: dts: am437x-l4: fix typo in can@0 node ARM: dts: am43x-epos-evm: Reduce i2c0 bus speed for tps65218 bus: ti-sysc: AM3: RNG is GP only ARM: omap2+: hwmod: fix potential NULL pointer access arm64: dts: armada-3720-turris-mox: remove mrvl,i2c-fast-mode arm64: dts: armada-3720-turris-mox: fixed indices for the SDHC controllers ARM: dts: imx: Swap M53Menlo pinctrl_power_button/pinctrl_power_out pins ARM: imx: fix missing 3rd argument in macro imx_mmdc_perf_init ARM: dts: colibri-imx6ull: limit SDIO clock to 25MHz arm64: dts: ls1028: sl28: fix networking for variant 2 ...
2021-08-06Merge tag 'arm64-fixes' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux Pull arm64 fixes from Will Deacon: "It's all pretty minor but the main fix is sorting out how we deal with return values from 32-bit system calls as audit expects error codes to be sign-extended to 64 bits Summary: - Fix extension/truncation of return values from 32-bit system calls - Fix interaction between unwinding and tracing - Fix spurious toolchain warning emitted during make - Fix Kconfig help text for RANDOMIZE_MODULE_REGION_FULL" * tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: arm64: stacktrace: avoid tracing arch_stack_walk() arm64: stacktrace: fix comment arm64: fix the doc of RANDOMIZE_MODULE_REGION_FULL arm64: move warning about toolchains to archprepare arm64: fix compat syscall return truncation
2021-08-06Merge tag 'mips-fixes_5.14_1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux Pull MIPS fix from Thomas Bogendoerfer: "Fix PMD accounting change" * tag 'mips-fixes_5.14_1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: MIPS: check return value of pgtable_pmd_page_ctor
2021-08-06arm64: mm: Fix TLBI vs ASID rolloverWill Deacon
When switching to an 'mm_struct' for the first time following an ASID rollover, a new ASID may be allocated and assigned to 'mm->context.id'. This reassignment can happen concurrently with other operations on the mm, such as unmapping pages and subsequently issuing TLB invalidation. Consequently, we need to ensure that (a) accesses to 'mm->context.id' are atomic and (b) all page-table updates made prior to a TLBI using the old ASID are guaranteed to be visible to CPUs running with the new ASID. This was found by inspection after reviewing the VMID changes from Shameer but it looks like a real (yet hard to hit) bug. Cc: <stable@vger.kernel.org> Cc: Marc Zyngier <maz@kernel.org> Cc: Jade Alglave <jade.alglave@arm.com> Cc: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com> Signed-off-by: Will Deacon <will@kernel.org> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Link: https://lore.kernel.org/r/20210806113109.2475-2-will@kernel.org Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2021-08-06perf/x86/intel: Apply mid ACK for small coreKan Liang
A warning as below may be occasionally triggered in an ADL machine when these conditions occur: - Two perf record commands run one by one. Both record a PEBS event. - Both runs on small cores. - They have different adaptive PEBS configuration (PEBS_DATA_CFG). [ ] WARNING: CPU: 4 PID: 9874 at arch/x86/events/intel/ds.c:1743 setup_pebs_adaptive_sample_data+0x55e/0x5b0 [ ] RIP: 0010:setup_pebs_adaptive_sample_data+0x55e/0x5b0 [ ] Call Trace: [ ] <NMI> [ ] intel_pmu_drain_pebs_icl+0x48b/0x810 [ ] perf_event_nmi_handler+0x41/0x80 [ ] </NMI> [ ] __perf_event_task_sched_in+0x2c2/0x3a0 Different from the big core, the small core requires the ACK right before re-enabling counters in the NMI handler, otherwise a stale PEBS record may be dumped into the later NMI handler, which trigger the warning. Add a new mid_ack flag to track the case. Add all PMI handler bits in the struct x86_hybrid_pmu to track the bits for different types of PMUs. Apply mid ACK for the small cores on an Alder Lake machine. The existing hybrid() macro has a compile error when taking address of a bit-field variable. Add a new macro hybrid_bit() to get the bit-field value of a given PMU. Fixes: f83d2f91d259 ("perf/x86/intel: Add Alder Lake Hybrid support") Reported-by: Ammy Yi <ammy.yi@intel.com> Signed-off-by: Kan Liang <kan.liang@linux.intel.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Reviewed-by: Andi Kleen <ak@linux.intel.com> Tested-by: Ammy Yi <ammy.yi@intel.com> Link: https://lkml.kernel.org/r/1627997128-57891-1-git-send-email-kan.liang@linux.intel.com
2021-08-06KVM: x86/mmu: Rename __gfn_to_rmap to gfn_to_rmapDavid Matlack
gfn_to_rmap was removed in the previous patch so there is no need to retain the double underscore on __gfn_to_rmap. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: David Matlack <dmatlack@google.com> Message-Id: <20210804222844.1419481-7-dmatlack@google.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-08-06KVM: x86/mmu: Leverage vcpu->last_used_slot for rmap_add and rmap_recycleDavid Matlack
rmap_add() and rmap_recycle() both run in the context of the vCPU and thus we can use kvm_vcpu_gfn_to_memslot() to look up the memslot. This enables rmap_add() and rmap_recycle() to take advantage of vcpu->last_used_slot and avoid expensive memslot searching. This change improves the performance of "Populate memory time" in dirty_log_perf_test with tdp_mmu=N. In addition to improving the performance, "Populate memory time" no longer scales with the number of memslots in the VM. Command | Before | After ------------------------------- | ---------------- | ------------- ./dirty_log_perf_test -v64 -x1 | 15.18001570s | 14.99469366s ./dirty_log_perf_test -v64 -x64 | 18.71336392s | 14.98675076s Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: David Matlack <dmatlack@google.com> Message-Id: <20210804222844.1419481-6-dmatlack@google.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-08-06KVM: x86/mmu: Leverage vcpu->last_used_slot in tdp_mmu_map_handle_target_levelDavid Matlack
The existing TDP MMU methods to handle dirty logging are vcpu-agnostic since they can be driven by MMU notifiers and other non-vcpu-specific events in addition to page faults. However this means that the TDP MMU is not benefiting from the new vcpu->last_used_slot. Fix that by introducing a tdp_mmu_map_set_spte_atomic() which is only called during a TDP page fault and has access to the kvm_vcpu for fast slot lookups. This improves "Populate memory time" in dirty_log_perf_test by 5%: Command | Before | After ------------------------------- | ---------------- | ------------- ./dirty_log_perf_test -v64 -x64 | 5.472321072s | 5.169832886s Signed-off-by: David Matlack <dmatlack@google.com> Message-Id: <20210804222844.1419481-5-dmatlack@google.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-08-06KVM: Move last_used_slot logic out of search_memslotsDavid Matlack
Make search_memslots unconditionally search all memslots and move the last_used_slot logic up one level to __gfn_to_memslot. This is in preparation for introducing a per-vCPU last_used_slot. As part of this change convert existing callers of search_memslots to __gfn_to_memslot to avoid making any functional changes. Signed-off-by: David Matlack <dmatlack@google.com> Message-Id: <20210804222844.1419481-3-dmatlack@google.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-08-06KVM: Rename lru_slot to last_used_slotDavid Matlack
lru_slot is used to keep track of the index of the most-recently used memslot. The correct acronym would be "mru" but that is not a common acronym. So call it last_used_slot which is a bit more obvious. Suggested-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: David Matlack <dmatlack@google.com> Message-Id: <20210804222844.1419481-2-dmatlack@google.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-08-06ARM: dts: ebaz4205: enable NAND supportMichael Walle
The board features a 128MiB NAND chip and recently linux gained support for the NAND controller on the Zynq SoC. Thus add the corresponding devicetree nodes. Signed-off-by: Michael Walle <michael@walle.cc> Link: https://lore.kernel.org/r/20210616155437.27378-4-michael@walle.cc Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-06ARM: dts: zynq: add NAND flash controller nodeMichael Walle
Recently, a driver for the ARM Primecell PL35x static memory controller (including NAND controller) was added in linux. Add the corresponding device tree node. Signed-off-by: Michael Walle <michael@walle.cc> Link: https://lore.kernel.org/r/20210616155437.27378-3-michael@walle.cc Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-06ARM: configs: multi_v7: enable PL35x NAND controllerMichael Walle
After years, linux finally got a driver for the PL35x NAND controller found on the Xilinx Zynq-7000 SoC for example. Enable support for this driver. Signed-off-by: Michael Walle <michael@walle.cc> Link: https://lore.kernel.org/r/20210616155437.27378-2-michael@walle.cc Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-06arm64: entry: Add SYM_CODE annotation for __bad_stackMark Brown
When converting arm64 to modern assembler annotations __bad_stack was left as a raw local label without annotations. While this will have little if any practical impact at present it may cause issues in the future if we start using the annotations for things like reliable stack trace. Add SYM_CODE annotations to fix this. Signed-off-by: Mark Brown <broonie@kernel.org> Acked-by: Will Deacon <will@kernel.org> Link: https://lore.kernel.org/r/20210804181710.19059-1-broonie@kernel.org Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2021-08-06ARM: dts: sti: remove clk_ignore_unused from bootargs for stih410-b2260Patrice Chotard
Remove clk_ignore_unused from bootargs as it's no more needed. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-08-06ARM: dts: sti: remove clk_ignore_unused from bootargs for stih418-b2199Patrice Chotard
Remove clk_ignore_unused from bootargs as it's no more needed. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-08-06ARM: dts: sti: remove clk_ignore_unused from bootargs for stih410-b2120Patrice Chotard
Remove clk_ignore_unused from bootargs as it's no more needed. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-08-06ARM: dts: sti: remove clk_ignore_unused from bootargs for stih407-b2120Patrice Chotard
Remove clk_ignore_unused from bootargs as it's no more needed. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-08-06ARM: dts: sti: Introduce 4KOpen (stih418-b2264) boardAlain Volmat
4KOpen (B2264) is a board based on the STMicroelectronics STiH418 soc: - 2GB DDR - HDMI - Ethernet 1000-BaseT - PCIe (mini PCIe connector) - MicroSD slot - USB2 and USB3 connectors - Sata - 40 pins GPIO header Signed-off-by: Alain Volmat <avolmat@me.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-08-06ARM: dts: sti: add the thermal sensor node within stih418Alain Volmat
The STiH418 embedded the same sensor as the STiH410. This commit adds the corresponding node, relying on the st_thermal driver. Signed-off-by: Alain Volmat <avolmat@me.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-08-06ARM: dts: sti: disable rng11 on the stih418 platformAlain Volmat
The rng11 is not available on the STiH418 hence is disabled in the stih418.dtsi Signed-off-by: Alain Volmat <avolmat@me.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-08-06ARM: dts: sti: add the spinor controller node within stih407-familyAlain Volmat
The STiH407 family (and further versions STiH410/STiH418) embedded a serial flash controller allowing fast access to SPI-NOR. This commit adds the corresponding node, relying on the st-spi-fsm drivers. Signed-off-by: Alain Volmat <avolmat@me.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-08-06ARM: dts: sti: update clkgen-fsyn entries in stih418-clockAlain Volmat
The clkgen-fsyn driver now embed the clock names (assuming the right compatible is used). Remove all clock-output-names property and update when necessary the compatible. Signed-off-by: Alain Volmat <avolmat@me.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-08-06ARM: dts: sti: update clkgen-fsyn entries in stih410-clockAlain Volmat
The clkgen-fsyn driver now embed the clock names (assuming the right compatible is used). Remove all clock-output-names property and update when necessary the compatible. Signed-off-by: Alain Volmat <avolmat@me.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-08-06ARM: dts: sti: update clkgen-fsyn entries in stih407-clockAlain Volmat
The clkgen-fsyn driver now embed the clock names (assuming the right compatible is used). Remove all clock-output-names property and update when necessary the compatible. Signed-off-by: Alain Volmat <avolmat@me.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-08-06ARM: dts: sti: update clkgen-pll entries in stih418-clockAlain Volmat
The clkgen-pll driver now embed the clock names (assuming the right compatible is used). Remove all clock-output-names property and update when necessary the compatible. Signed-off-by: Alain Volmat <avolmat@me.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-08-06ARM: dts: sti: update clkgen-pll entries in stih410-clockAlain Volmat
The clkgen-pll driver now embed the clock names (assuming the right compatible is used). Remove all clock-output-names property and update when necessary the compatible. Signed-off-by: Alain Volmat <avolmat@me.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-08-06ARM: dts: sti: update clkgen-pll entries in stih407-clockAlain Volmat
The clkgen-pll driver now embed the clock names (assuming the right compatible is used). Remove all clock-output-names property and update when necessary the compatible. Signed-off-by: Alain Volmat <avolmat@me.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-08-06ARM: dts: sti: update flexgen compatible within stih410-clockAlain Volmat
With the introduction of new flexgen compatible within the clk-flexgen driver, remove the clock-output-names entry from the flexgen nodes and set the new proper compatible corresponding. Signed-off-by: Alain Volmat <avolmat@me.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-08-06ARM: dts: sti: update flexgen compatible within stih407-clockAlain Volmat
With the introduction of new flexgen compatible within the clk-flexgen driver, remove the clock-output-names entry from the flexgen nodes and set the new proper compatible corresponding. Signed-off-by: Alain Volmat <avolmat@me.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-08-06ARM: dts: sti: update flexgen compatible within stih418-clockAlain Volmat
With the introduction of new flexgen compatible within the clk-flexgen driver, remove the clock-output-names entry from the flexgen nodes and set the new proper compatible corresponding. Signed-off-by: Alain Volmat <avolmat@me.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-08-06arm: omap2: Drop the unused OMAP_PACKAGE_* KConfig entriesPeter Robinson
The OMAP_PACKAGE_* Kconfig entries are no longer referenced in the kernel so can be dropped as they're obsolete. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-08-06arm: omap2: Drop obsolete MACH_OMAP3_PANDORA entryPeter Robinson
The MACH_OMAP3_PANDORA is no longer referenced anywhere in the kernel options so it can now be dropped as the board has long moved to DT. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-08-06ARM: dts: am335x-bone: switch to new cpsw switch drvGrygorii Strashko
The dual_mac mode has been preserved the same way between legacy and new driver, and one port devices works the same as 1 dual_mac port - it's safe to switch drivers. So, Switch BeagleBone boards to use new cpsw switch driver. Those boards have or 2 Ext. port wired and configured in dual_mac mode by default, or only 1 Ext. port. For am335x-sancloud-bbe-common.dtsi also removed duplicated davinci_mdio DT nodes which already defined in am335x-bone-common.dtsi. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-08-06ARM: dts: am33xx: update ethernet aliasesGrygorii Strashko
Update ethernet aliases to point at CPSW switchdev driver. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-08-06ARM: dts: am335x-sl50: switch to new cpsw switch drvGrygorii Strashko
The dual_mac mode has been preserved the same way between legacy and new driver, and one port devices works the same as 1 dual_mac port - it's safe to switch drivers. So, switch Toby Churchill SL50 Series to use new cpsw switch driver. Those boards have or 2 Ext. port wired and configured in dual_mac mode by default, or only 1 Ext. port. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-08-06ARM: dts: am335x-shc: switch to new cpsw switch drvGrygorii Strashko
The dual_mac mode has been preserved the same way between legacy and new driver, and one port devices works the same as 1 dual_mac port - it's safe to switch drivers. So, switch Bosch SHC to use new cpsw switch driver. Those boards have or 2 Ext. port wired and configured in dual_mac mode by default, or only 1 Ext. port. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-08-06ARM: dts: am335x-phycore: switch to new cpsw switch drvGrygorii Strashko
The dual_mac mode has been preserved the same way between legacy and new driver, and one port devices works the same as 1 dual_mac port - it's safe to switch drivers. So, switch Phytec AM335x phyCORE SOM, phyBOARD-WEGA, phyBOARD-REGOR, PCM-953 to use new cpsw switch driver. Those boards have or 2 Ext. port wired and configured in dual_mac mode by default, or only 1 Ext. port. Cc: Teresa Remmet <t.remmet@phytec.de> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-08-06ARM: dts: am335x-pepper: switch to new cpsw switch drvGrygorii Strashko
The dual_mac mode has been preserved the same way between legacy and new driver, and one port devices works the same as 1 dual_mac port - it's safe to switch drivers. So, switch Gumstix Pepper to use new cpsw switch driver. Those boards have or 2 Ext. port wired and configured in dual_mac mode by default, or only 1 Ext. port. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-08-06ARM: dts: am335x-pdu001: switch to new cpsw switch drvGrygorii Strashko
The dual_mac mode has been preserved the same way between legacy and new driver, and one port devices works the same as 1 dual_mac port - it's safe to switch drivers. So, switch EETS,PDU001 to use new cpsw switch driver. Those boards have or 2 Ext. port wired and configured in dual_mac mode by default, or only 1 Ext. port. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-08-06ARM: dts: am335x-osd3358-sm-red: switch to new cpsw switch drvGrygorii Strashko
The dual_mac mode has been preserved the same way between legacy and new driver, and one port devices works the same as 1 dual_mac port - it's safe to switch drivers. So, switch Octavo Systems OSD3358-SM-RED to use new cpsw switch driver. Those boards have or 2 Ext. port wired and configured in dual_mac mode by default, or only 1 Ext. port. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>