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2020-01-20efi/x86: Avoid RWX mappings for all of DRAMArd Biesheuvel
The EFI code creates RWX mappings for all memory regions that are occupied after the stub completes, and in the mixed mode case, it even creates RWX mappings for all of the remaining DRAM as well. Let's try to avoid this, by setting the NX bit for all memory regions except the ones that are marked as EFI runtime services code [which means text+rodata+data in practice, so we cannot mark them read-only right away]. For cases of buggy firmware where boot services code is called during SetVirtualAddressMap(), map those regions with exec permissions as well - they will be unmapped in efi_free_boot_services(). Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Signed-off-by: Ingo Molnar <mingo@kernel.org> Link: https://lore.kernel.org/r/20200113172245.27925-7-ardb@kernel.org
2020-01-20efi/x86: Don't map the entire kernel text RW for mixed modeArd Biesheuvel
The mixed mode thunking routine requires a part of it to be mapped 1:1, and for this reason, we currently map the entire kernel .text read/write in the EFI page tables, which is bad. In fact, the kernel_map_pages_in_pgd() invocation that installs this mapping is entirely redundant, since all of DRAM is already 1:1 mapped read/write in the EFI page tables when we reach this point, which means that .rodata is mapped read-write as well. So let's remap both .text and .rodata read-only in the EFI page tables. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Signed-off-by: Ingo Molnar <mingo@kernel.org> Link: https://lore.kernel.org/r/20200113172245.27925-6-ardb@kernel.org
2020-01-20x86/mm: Fix NX bit clearing issue in kernel_map_pages_in_pgdArd Biesheuvel
The following commit: 15f003d20782 ("x86/mm/pat: Don't implicitly allow _PAGE_RW in kernel_map_pages_in_pgd()") modified kernel_map_pages_in_pgd() to manage writable permissions of memory mappings in the EFI page table in a different way, but in the process, it removed the ability to clear NX attributes from read-only mappings, by clobbering the clear mask if _PAGE_RW is not being requested. Failure to remove the NX attribute from read-only mappings is unlikely to be a security issue, but it does prevent us from tightening the permissions in the EFI page tables going forward, so let's fix it now. Fixes: 15f003d20782 ("x86/mm/pat: Don't implicitly allow _PAGE_RW in kernel_map_pages_in_pgd() Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Signed-off-by: Ingo Molnar <mingo@kernel.org> Link: https://lore.kernel.org/r/20200113172245.27925-5-ardb@kernel.org
2020-01-20efi/libstub/x86: Fix unused-variable warningArnd Bergmann
The only users of these got removed, so they also need to be removed to avoid warnings: arch/x86/boot/compressed/eboot.c: In function 'setup_efi_pci': arch/x86/boot/compressed/eboot.c:117:16: error: unused variable 'nr_pci' [-Werror=unused-variable] unsigned long nr_pci; ^~~~~~ arch/x86/boot/compressed/eboot.c: In function 'setup_uga': arch/x86/boot/compressed/eboot.c:244:16: error: unused variable 'nr_ugas' [-Werror=unused-variable] unsigned long nr_ugas; ^~~~~~~ Fixes: 2732ea0d5c0a ("efi/libstub: Use a helper to iterate over a EFI handle array") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Signed-off-by: Ingo Molnar <mingo@kernel.org> Link: https://lore.kernel.org/r/20200113172245.27925-4-ardb@kernel.org
2020-01-20efi/libstub/x86: Use mandatory 16-byte stack alignment in mixed modeArd Biesheuvel
Reduce the stack frame of the EFI stub's mixed mode thunk routine by 8 bytes, by moving the GDT and return addresses to EBP and EBX, which we need to preserve anyway, since their top halves will be cleared by the call into 32-bit firmware code. Doing so results in the UEFI code being entered with a 16 byte aligned stack, as mandated by the UEFI spec, fixing the last occurrence in the 64-bit kernel where we violate this requirement. Also, move the saved GDT from a global variable to an unused part of the stack frame, and touch up some other parts of the code. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Signed-off-by: Ingo Molnar <mingo@kernel.org> Link: https://lore.kernel.org/r/20200113172245.27925-3-ardb@kernel.org
2020-01-20efi/libstub/x86: Use const attribute for efi_is_64bit()Ard Biesheuvel
Reshuffle the x86 stub code a bit so that we can tag the efi_is_64bit() function with the 'const' attribute, which permits the compiler to optimize away any redundant calls. Since we have two different entry points for 32 and 64 bit firmware in the startup code, this also simplifies the C code since we'll enter it with the efi_is64 variable already set. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Signed-off-by: Ingo Molnar <mingo@kernel.org> Link: https://lore.kernel.org/r/20200113172245.27925-2-ardb@kernel.org
2020-01-20Merge tag 'v5.5-rc7' into efi/core, to pick up fixesIngo Molnar
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2020-01-19Merge tag 'aspeed-5.6-devicetree' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed into arm/dt ASPEED device tree updates for 5.6 - Cleanups for dtc warnings - Ethernet hardware checksum cleanups. A bug in the driver was fixed so machines don't need to specify this anymore. - Misc improvements * tag 'aspeed-5.6-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed: ARM: dts: aspeed: rainier: Add UCD90320 power sequencer ARM: dts: aspeed: rainier: Switch PSUs to unknown version ARM: dts: aspeed: Add SD card for Vesnin ARM: dts: aspeed: yamp: Delete no-hw-checksum ARM: dts: aspeed: netbmc: Delete no-hw-checksum ARM: dts: aspeed: AST2400 disables hw checksum ARM: dts: ibm-power9-dual: Add a unit address for OCC nodes ARM: dts: aspeed-g6: Cleanup watchdog unit address ARM: dts: aspeed-g5: Sort LPC child nodes by unit address ARM: dts: aspeed: Add reg hints to syscon children ARM: dts: aspeed: Cleanup lpc-ctrl and snoop regs ARM: dts: witherspoon: Cleanup gpio-keys-polled properties ARM: dts: swift: Cleanup gpio-keys-polled properties ARM: dts: fp5280g2: Cleanup gpio-keys-polled properties ARM: dts: vesnin: Add unit address for memory node ARM: dts: aspeed-g5: Use recommended generic node name for SDMC ARM: dts: aspeed-g5: Move EDAC node to APB dt-bindings: misc: Document reg for aspeed, p2a-ctrl nodes dt-bindings: pinctrl: aspeed: Add reg property as a hint Link: https://lore.kernel.org/r/CACPK8XepSy6D4CNWjSWDDK0p7Dx_rneWne4t4uyy=di5nx3zmA@mail.gmail.com Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-19Merge tag 'at91-5.6-defconfig-2' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/defconfig AT91 defconfig for 5.6 #2 - Add pit64 and sdhci support for at91_dt * tag 'at91-5.6-defconfig-2' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: ARM: configs: at91: enable MMC_SDHCI_OF_AT91 and MICROCHIP_PIT64B Link: https://lore.kernel.org/r/20200119235223.GA92283@piout.net Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-19Merge tag 'at91-5.6-dt-2' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/dt AT91 DT for 5.6 #2 - Add sam9x60 dtsi - New board sam9x60 Evaluation Kit * tag 'at91-5.6-dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: ARM: dts: at91: sam9x60: add device tree for soc and board dt-bindings: arm: add sam9x60-ek board dt-bindings: atmel-gpbr: add microchip,sam9x60-gpbr dt-bindings: atmel-smc: add microchip,sam9x60-smc dt-bindings: atmel-sysreg: add microchip,sam9x60-ddramc dt-bindings: atmel-nand: add microchip,sam9x60-pmecc dt-bindings: atmel-matrix: add microchip,sam9x60-matrix dt-bindings: at91-sama5d2_adc: add microchip,sam9x60-adc dt-bindings: atmel-isi: add microchip,sam9x60-isi dt-bindings: atmel-can: add microchip,sam9x60-can dt-bindings: at_xdmac: add microchip,sam9x60-dma dt-bindings: at_xdmac: remove wildcard Link: https://lore.kernel.org/r/20200119234707.GA90094@piout.net Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-19Merge tag 'v5.6-rockchip-dts64-2' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt DSI display for px30 evaluation board and a number of cleanups accross multiple socs. * tag 'v5.6-rockchip-dts64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: arm64: dts: rockchip: Kill off "simple-panel" compatibles arm64: dts: rockchip: rename dwmmc node names to mmc arm64: dts: rockchip: hook up the px30-evb dsi display arm64: dts: rockchip: Enable sdio0 and uart0 on rk3399-roc-pc-mezzanine arm64: dts: rockchip: add reg property to brcmf sub-nodes arm64: dts: rockchip: fix dwmmc clock name for rk3308 arm64: dts: rockchip: fix dwmmc clock name for px30 Link: https://lore.kernel.org/r/7641353.lIegmeFAIi@phil Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-19Merge tag 'v5.6-rockchip-dts32-2' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt Removal of the simple-panel compatible and some minor additional cleanups. * tag 'v5.6-rockchip-dts32-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: ARM: dts: rockchip: Kill off "simple-panel" compatibles ARM: dts: rockchip: rename dwmmc node names to mmc ARM: dts: rockchip: add reg property to brcmf sub node for rk3188-bqedison2qc Link: https://lore.kernel.org/r/3473489.DgqFdXXe5V@phil Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-20ARM: dts: aspeed: rainier: Add UCD90320 power sequencerJim Wright
Change Rainier device tree to use UCD90320 chip and only bind driver to port which excepts PMBus commands. Signed-off-by: Jim Wright <wrightj@linux.vnet.ibm.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-01-20ARM: dts: aspeed: rainier: Switch PSUs to unknown versionEddie James
Rainier can use either version of the IBM CFFPS, so don't set the version in the devicetree so the driver can detect it automatically. Signed-off-by: Eddie James <eajames@linux.ibm.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-01-20Backmerge v5.5-rc7 into drm-nextDave Airlie
msm needs 5.5-rc4, go to the latest. Signed-off-by: Dave Airlie <airlied@redhat.com>
2020-01-20ARM: configs: at91: enable MMC_SDHCI_OF_AT91 and MICROCHIP_PIT64BClaudiu Beznea
Enable MMC_SDHCI_OF_AT91 and MICROCHIP_PIT64B. These are necessary for SAM9X60. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/1579085987-13976-5-git-send-email-claudiu.beznea@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-01-19um: Fix time-travel=inf-cpu with xor/raid6Johannes Berg
Today, I erroneously built a time-travel configuration with btrfs enabled, and noticed it cannot boot in time-travel=inf-cpu mode, both xor and raid6 speed measurement gets stuck. For xor, work around it by picking the first algorithm if inf-cpu mode is enabled. For raid6, I didn't find such a workaround, so disallow enabling time-travel mode if RAID6_PQ_BENCHMARK is enabled. With this, and RAID6_PQ_BENCHMARK disabled, I can boot a kernel that has btrfs enabled in time-travel=inf-cpu mode. Signed-off-by: Johannes Berg <johannes.berg@intel.com> Acked-by: Anton Ivanov <anton.ivanov@cambridgegreys.com> Signed-off-by: Richard Weinberger <richard@nod.at>
2020-01-19Revert "um: Enable CONFIG_CONSTRUCTORS"Johannes Berg
This reverts commit 786b2384bf1c ("um: Enable CONFIG_CONSTRUCTORS"). There are two issues with this commit, uncovered by Anton in tests on some (Debian) systems: 1) I completely forgot to call any constructors if CONFIG_CONSTRUCTORS isn't set. Don't recall now if it just wasn't needed on my system, or if I never tested this case. 2) With that fixed, it works - with CONFIG_CONSTRUCTORS *unset*. If I set CONFIG_CONSTRUCTORS, it fails again, which isn't totally unexpected since whatever wanted to run is likely to have to run before the kernel init etc. that calls the constructors in this case. Basically, some constructors that gcc emits (libc has?) need to run very early during init; the failure mode otherwise was that the ptrace fork test already failed: ---------------------- $ ./linux mem=512M Core dump limits : soft - 0 hard - NONE Checking that ptrace can change system call numbers...check_ptrace : child exited with exitcode 6, while expecting 0; status 0x67f Aborted ---------------------- Thinking more about this, it's clear that we simply cannot support CONFIG_CONSTRUCTORS in UML. All the cases we need now (gcov, kasan) involve not use of the __attribute__((constructor)), but instead some constructor code/entry generated by gcc. Therefore, we cannot distinguish between kernel constructors and system constructors. Thus, revert this commit. Cc: stable@vger.kernel.org [5.4+] Fixes: 786b2384bf1c ("um: Enable CONFIG_CONSTRUCTORS") Reported-by: Anton Ivanov <anton.ivanov@cambridgegreys.com> Signed-off-by: Johannes Berg <johannes.berg@intel.com> Acked-by: Anton Ivanov <anton.ivanov@cambridgegreys.co.uk> Signed-off-by: Richard Weinberger <richard@nod.at>
2020-01-19um: Mark non-vector net transports as obsoleteBrendan Higgins
UML_NET_VECTOR now supports filters compiled with pcap outside of UML; it also supports: EoGRE, EoL2TPv3, RAW (+/- BPF), TAP and BESS. While vector drivers are not 1:1 replacements for the existing drivers, you can achieve the same topologies and the same connectivity at much higher performance (2.5 to 9 Gbit on mid-range Ryzen desktop) - the old drivers test out in the 500Mbit range on the same hardware. For all these reasons, the non-vector based transports are now unnecessary, and some, most notably pcap and vde are maintenance burdens. Thus, it makes sense to at least start thinking about removing the non-vector transports, so for now, mark them as obsolete. Link: https://lore.kernel.org/lkml/15f048d3-07ab-61c1-c6e0-0712e626dd33@cambridgegreys.com/T/#u Suggested-by: Anton Ivanov <anton.ivanov@cambridgegreys.com> Signed-off-by: Brendan Higgins <brendanhiggins@google.com> Signed-off-by: Richard Weinberger <richard@nod.at>
2020-01-19um: Add an option to make serial driver non-rawJohannes Berg
In some cases, for example when the program(s) running inside UML isn't/aren't interactive (like the hwsim tests for wpa_supplicant) there's really no value in having the serial lines configured to be raw as they are now by default. Setting them to non-raw lets one abort the whole UML with Ctrl-C, which is really the right thing to do in these cases, basically the whole UML instance is more like a single (testing) program. Add a "ssl-non-raw" option to UML to support such a mode. Signed-off-by: Johannes Berg <johannes.berg@intel.com> Signed-off-by: Richard Weinberger <richard@nod.at>
2020-01-19Merge ra.kernel.org:/pub/scm/linux/kernel/git/netdev/netDavid S. Miller
2020-01-19Merge tag 'riscv/for-v5.5-rc7' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux Pull RISC-V fixes from Paul Walmsley: "Three fixes for RISC-V: - Don't free and reuse memory containing the code that CPUs parked at boot reside in. - Fix rv64 build problems for ubsan and some modules by adding logical and arithmetic shift helpers for 128-bit values. These are from libgcc and are similar to what's present for ARM64. - Fix vDSO builds to clean up their own temporary files" * tag 'riscv/for-v5.5-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: riscv: Less inefficient gcc tishift helpers (and export their symbols) riscv: delete temporary files riscv: make sure the cores stay looping in .Lsecondary_park
2020-01-19KVM: arm/arm64: Correct AArch32 SPSR on exception entryMark Rutland
Confusingly, there are three SPSR layouts that a kernel may need to deal with: (1) An AArch64 SPSR_ELx view of an AArch64 pstate (2) An AArch64 SPSR_ELx view of an AArch32 pstate (3) An AArch32 SPSR_* view of an AArch32 pstate When the KVM AArch32 support code deals with SPSR_{EL2,HYP}, it's either dealing with #2 or #3 consistently. On arm64 the PSR_AA32_* definitions match the AArch64 SPSR_ELx view, and on arm the PSR_AA32_* definitions match the AArch32 SPSR_* view. However, when we inject an exception into an AArch32 guest, we have to synthesize the AArch32 SPSR_* that the guest will see. Thus, an AArch64 host needs to synthesize layout #3 from layout #2. This patch adds a new host_spsr_to_spsr32() helper for this, and makes use of it in the KVM AArch32 support code. For arm64 we need to shuffle the DIT bit around, and remove the SS bit, while for arm we can use the value as-is. I've open-coded the bit manipulation for now to avoid having to rework the existing PSR_* definitions into PSR64_AA32_* and PSR32_AA32_* definitions. I hope to perform a more thorough refactoring in future so that we can handle pstate view manipulation more consistently across the kernel tree. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Reviewed-by: Alexandru Elisei <alexandru.elisei@arm.com> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20200108134324.46500-4-mark.rutland@arm.com
2020-01-19KVM: arm/arm64: Correct CPSR on exception entryMark Rutland
When KVM injects an exception into a guest, it generates the CPSR value from scratch, configuring CPSR.{M,A,I,T,E}, and setting all other bits to zero. This isn't correct, as the architecture specifies that some CPSR bits are (conditionally) cleared or set upon an exception, and others are unchanged from the original context. This patch adds logic to match the architectural behaviour. To make this simple to follow/audit/extend, documentation references are provided, and bits are configured in order of their layout in SPSR_EL2. This layout can be seen in the diagram on ARM DDI 0487E.a page C5-426. Note that this code is used by both arm and arm64, and is intended to fuction with the SPSR_EL2 and SPSR_HYP layouts. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Reviewed-by: Alexandru Elisei <alexandru.elisei@arm.com> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20200108134324.46500-3-mark.rutland@arm.com
2020-01-19KVM: arm64: Correct PSTATE on exception entryMark Rutland
When KVM injects an exception into a guest, it generates the PSTATE value from scratch, configuring PSTATE.{M[4:0],DAIF}, and setting all other bits to zero. This isn't correct, as the architecture specifies that some PSTATE bits are (conditionally) cleared or set upon an exception, and others are unchanged from the original context. This patch adds logic to match the architectural behaviour. To make this simple to follow/audit/extend, documentation references are provided, and bits are configured in order of their layout in SPSR_EL2. This layout can be seen in the diagram on ARM DDI 0487E.a page C5-429. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Reviewed-by: Alexandru Elisei <alexandru.elisei@arm.com> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20200108134324.46500-2-mark.rutland@arm.com
2020-01-19arm64: kvm: Fix IDMAP overlap with HYP VARussell King
Booting 5.4 on LX2160A reveals that KVM is non-functional: kvm: Limiting the IPA size due to kernel Virtual Address limit kvm [1]: IPA Size Limit: 43bits kvm [1]: IDMAP intersecting with HYP VA, unable to continue kvm [1]: error initializing Hyp mode: -22 Debugging shows: kvm [1]: IDMAP page: 81a26000 kvm [1]: HYP VA range: 0:22ffffffff as RAM is located at: 80000000-fbdfffff : System RAM 2080000000-237fffffff : System RAM Comparing this with the same kernel on Armada 8040 shows: kvm: Limiting the IPA size due to kernel Virtual Address limit kvm [1]: IPA Size Limit: 43bits kvm [1]: IDMAP page: 2a26000 kvm [1]: HYP VA range: 4800000000:493fffffff ... kvm [1]: Hyp mode initialized successfully which indicates that hyp_va_msb is set, and is always set to the opposite value of the idmap page to avoid the overlap. This does not happen with the LX2160A. Further debugging shows vabits_actual = 39, kva_msb = 38 on LX2160A and kva_msb = 33 on Armada 8040. Looking at the bit layout of the HYP VA, there is still one bit available for hyp_va_msb. Set this bit appropriately. This allows KVM to be functional on the LX2160A, but without any HYP VA randomisation: kvm: Limiting the IPA size due to kernel Virtual Address limit kvm [1]: IPA Size Limit: 43bits kvm [1]: IDMAP page: 81a24000 kvm [1]: HYP VA range: 4000000000:62ffffffff ... kvm [1]: Hyp mode initialized successfully Fixes: ed57cac83e05 ("arm64: KVM: Introduce EL2 VA randomisation") Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> [maz: small additional cleanups, preserved case where the tag is legitimately 0 and we can just use the mask, Fixes tag] Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/E1ilAiY-0000MA-RG@rmk-PC.armlinux.org.uk
2020-01-19KVM: arm64: Only sign-extend MMIO up to register widthChristoffer Dall
On AArch64 you can do a sign-extended load to either a 32-bit or 64-bit register, and we should only sign extend the register up to the width of the register as specified in the operation (by using the 32-bit Wn or 64-bit Xn register specifier). As it turns out, the architecture provides this decoding information in the SF ("Sixty-Four" -- how cute...) bit. Let's take advantage of this with the usual 32-bit/64-bit header file dance and do the right thing on AArch64 hosts. Signed-off-by: Christoffer Dall <christoffer.dall@arm.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20191212195055.5541-1-christoffer.dall@arm.com
2020-01-18riscv: Less inefficient gcc tishift helpers (and export their symbols)Olof Johansson
The existing __lshrti3 was really inefficient, and the other two helpers are also needed to compile some modules. Add the missing versions, and export all of the symbols like arm64 already does. This code is based on the assembly generated by libgcc builds. This fixes a build break triggered by ubsan: riscv64-unknown-linux-gnu-ld: lib/ubsan.o: in function `.L2': ubsan.c:(.text.unlikely+0x38): undefined reference to `__ashlti3' riscv64-unknown-linux-gnu-ld: ubsan.c:(.text.unlikely+0x42): undefined reference to `__ashrti3' Signed-off-by: Olof Johansson <olof@lixom.net> [paul.walmsley@sifive.com: use SYM_FUNC_{START,END} instead of ENTRY/ENDPROC; note libgcc origin] Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
2020-01-18arm64: dts: rockchip: Kill off "simple-panel" compatiblesRob Herring
"simple-panel" is a Linux driver and has never been an accepted upstream compatible string, so remove it. Cc: Heiko Stuebner <heiko@sntech.de> Cc: linux-rockchip@lists.infradead.org Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20200117230851.25434-1-robh@kernel.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-01-18ARM: dts: rockchip: Kill off "simple-panel" compatiblesRob Herring
"simple-panel" is a Linux driver and has never been an accepted upstream compatible string, so remove it. Cc: Heiko Stuebner <heiko@sntech.de> Cc: linux-rockchip@lists.infradead.org Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20200117230851.25434-1-robh@kernel.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-01-18arm64: dts: rockchip: rename dwmmc node names to mmcJohan Jonker
Current dts files with 'dwmmc' nodes are manually verified. In order to automate this process rockchip-dw-mshc.txt has to be converted to yaml. In the new setup rockchip-dw-mshc.yaml will inherit properties from mmc-controller.yaml and synopsys-dw-mshc-common.yaml. 'dwmmc' will no longer be a valid name for a node, so change them all to 'mmc' Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20200115185244.18149-2-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-01-18ARM: dts: rockchip: rename dwmmc node names to mmcJohan Jonker
Current dts files with 'dwmmc' nodes are manually verified. In order to automate this process rockchip-dw-mshc.txt has to be converted to yaml. In the new setup rockchip-dw-mshc.yaml will inherit properties from mmc-controller.yaml and synopsys-dw-mshc-common.yaml. 'dwmmc' will no longer be a valid name for a node, so change them all to 'mmc' Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20200115185244.18149-1-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-01-18riscv: delete temporary filesIlie Halip
Temporary files used in the VDSO build process linger on even after make mrproper: vdso-dummy.o.tmp, vdso.so.dbg.tmp. Delete them once they're no longer needed. Signed-off-by: Ilie Halip <ilie.halip@gmail.com> Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
2020-01-18Merge branch 'x86-urgent-for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull x86 fixes from Ingo Molnar: "Misc fixes: - a resctrl fix for uninitialized objects found by debugobjects - a resctrl memory leak fix - fix the unintended re-enabling of the of SME and SEV CPU flags if memory encryption was disabled at bootup via the MSR space" * 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/CPU/AMD: Ensure clearing of SME/SEV features is maintained x86/resctrl: Fix potential memory leak x86/resctrl: Fix an imbalance in domain_remove_cpu()
2020-01-18Merge branch 'ras-urgent-for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull x86 RAS fix from Ingo Molnar: "Fix a thermal throttling race that can result in easy to trigger boot crashes on certain Ice Lake platforms" * 'ras-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/mce/therm_throt: Do not access uninitialized therm_work
2020-01-18Merge branch 'perf-urgent-for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull perf fixes from Ingo Molnar: "Tooling fixes, three Intel uncore driver fixes, plus an AUX events fix uncovered by the perf fuzzer" * 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: perf/x86/intel/uncore: Remove PCIe3 unit for SNR perf/x86/intel/uncore: Fix missing marker for snr_uncore_imc_freerunning_events perf/x86/intel/uncore: Add PCI ID of IMC for Xeon E3 V5 Family perf: Correctly handle failed perf_get_aux_event() perf hists: Fix variable name's inconsistency in hists__for_each() macro perf map: Set kmap->kmaps backpointer for main kernel map chunks perf report: Fix incorrectly added dimensions as switch perf data file tools lib traceevent: Fix memory leakage in filter_event
2020-01-18Merge branch 'efi-urgent-for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull EFI fixes from Ingo Molnar: "Three EFI fixes: - Fix a slow-boot-scrolling regression but making sure we use WC for EFI earlycon framebuffer mappings on x86 - Fix a mixed EFI mode boot crash - Disable paging explicitly before entering startup_32() in mixed mode bootup" * 'efi-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/efistub: Disable paging at mixed mode entry efi/libstub/random: Initialize pointer variables to zero for mixed mode efi/earlycon: Fix write-combine mapping on x86
2020-01-18Merge tag 's390-5.5-5' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux Pull s390 fixes from Vasily Gorbik: - Fix printing misleading Secure-IPL enabled message when it is not. - Fix a race condition between host ap bus and guest ap bus doing device reset in crypto code. - Fix sanity check in CCA cipher key function (CCA AES cipher key support), which fails otherwise. * tag 's390-5.5-5' of git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux: s390/setup: Fix secure ipl message s390/zcrypt: move ap device reset from bus to driver code s390/zcrypt: Fix CCA cipher key gen with clear key value function
2020-01-18open: introduce openat2(2) syscallAleksa Sarai
/* Background. */ For a very long time, extending openat(2) with new features has been incredibly frustrating. This stems from the fact that openat(2) is possibly the most famous counter-example to the mantra "don't silently accept garbage from userspace" -- it doesn't check whether unknown flags are present[1]. This means that (generally) the addition of new flags to openat(2) has been fraught with backwards-compatibility issues (O_TMPFILE has to be defined as __O_TMPFILE|O_DIRECTORY|[O_RDWR or O_WRONLY] to ensure old kernels gave errors, since it's insecure to silently ignore the flag[2]). All new security-related flags therefore have a tough road to being added to openat(2). Userspace also has a hard time figuring out whether a particular flag is supported on a particular kernel. While it is now possible with contemporary kernels (thanks to [3]), older kernels will expose unknown flag bits through fcntl(F_GETFL). Giving a clear -EINVAL during openat(2) time matches modern syscall designs and is far more fool-proof. In addition, the newly-added path resolution restriction LOOKUP flags (which we would like to expose to user-space) don't feel related to the pre-existing O_* flag set -- they affect all components of path lookup. We'd therefore like to add a new flag argument. Adding a new syscall allows us to finally fix the flag-ignoring problem, and we can make it extensible enough so that we will hopefully never need an openat3(2). /* Syscall Prototype. */ /* * open_how is an extensible structure (similar in interface to * clone3(2) or sched_setattr(2)). The size parameter must be set to * sizeof(struct open_how), to allow for future extensions. All future * extensions will be appended to open_how, with their zero value * acting as a no-op default. */ struct open_how { /* ... */ }; int openat2(int dfd, const char *pathname, struct open_how *how, size_t size); /* Description. */ The initial version of 'struct open_how' contains the following fields: flags Used to specify openat(2)-style flags. However, any unknown flag bits or otherwise incorrect flag combinations (like O_PATH|O_RDWR) will result in -EINVAL. In addition, this field is 64-bits wide to allow for more O_ flags than currently permitted with openat(2). mode The file mode for O_CREAT or O_TMPFILE. Must be set to zero if flags does not contain O_CREAT or O_TMPFILE. resolve Restrict path resolution (in contrast to O_* flags they affect all path components). The current set of flags are as follows (at the moment, all of the RESOLVE_ flags are implemented as just passing the corresponding LOOKUP_ flag). RESOLVE_NO_XDEV => LOOKUP_NO_XDEV RESOLVE_NO_SYMLINKS => LOOKUP_NO_SYMLINKS RESOLVE_NO_MAGICLINKS => LOOKUP_NO_MAGICLINKS RESOLVE_BENEATH => LOOKUP_BENEATH RESOLVE_IN_ROOT => LOOKUP_IN_ROOT open_how does not contain an embedded size field, because it is of little benefit (userspace can figure out the kernel open_how size at runtime fairly easily without it). It also only contains u64s (even though ->mode arguably should be a u16) to avoid having padding fields which are never used in the future. Note that as a result of the new how->flags handling, O_PATH|O_TMPFILE is no longer permitted for openat(2). As far as I can tell, this has always been a bug and appears to not be used by userspace (and I've not seen any problems on my machines by disallowing it). If it turns out this breaks something, we can special-case it and only permit it for openat(2) but not openat2(2). After input from Florian Weimer, the new open_how and flag definitions are inside a separate header from uapi/linux/fcntl.h, to avoid problems that glibc has with importing that header. /* Testing. */ In a follow-up patch there are over 200 selftests which ensure that this syscall has the correct semantics and will correctly handle several attack scenarios. In addition, I've written a userspace library[4] which provides convenient wrappers around openat2(RESOLVE_IN_ROOT) (this is necessary because no other syscalls support RESOLVE_IN_ROOT, and thus lots of care must be taken when using RESOLVE_IN_ROOT'd file descriptors with other syscalls). During the development of this patch, I've run numerous verification tests using libpathrs (showing that the API is reasonably usable by userspace). /* Future Work. */ Additional RESOLVE_ flags have been suggested during the review period. These can be easily implemented separately (such as blocking auto-mount during resolution). Furthermore, there are some other proposed changes to the openat(2) interface (the most obvious example is magic-link hardening[5]) which would be a good opportunity to add a way for userspace to restrict how O_PATH file descriptors can be re-opened. Another possible avenue of future work would be some kind of CHECK_FIELDS[6] flag which causes the kernel to indicate to userspace which openat2(2) flags and fields are supported by the current kernel (to avoid userspace having to go through several guesses to figure it out). [1]: https://lwn.net/Articles/588444/ [2]: https://lore.kernel.org/lkml/CA+55aFyyxJL1LyXZeBsf2ypriraj5ut1XkNDsunRBqgVjZU_6Q@mail.gmail.com [3]: commit 629e014bb834 ("fs: completely ignore unknown open flags") [4]: https://sourceware.org/bugzilla/show_bug.cgi?id=17523 [5]: https://lore.kernel.org/lkml/20190930183316.10190-2-cyphar@cyphar.com/ [6]: https://youtu.be/ggD-eb3yPVs Suggested-by: Christian Brauner <christian.brauner@ubuntu.com> Signed-off-by: Aleksa Sarai <cyphar@cyphar.com> Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2020-01-17Merge tag 'arm-soc/for-5.6/devicetree-part2' of ↵Olof Johansson
https://github.com/Broadcom/stblinux into arm/dt This pull request contains Broadcom ARM-based SoC changes for 5.6, please pull the following: - Nicolas unifies the CMA reserved region declaration between all BCM283x/BCM2711 chips in order for firmwares to easily adjust those based on the use case needs - Nicolas adds the Broadcom STB PCIe Root Complex Device Tree node for the Raspberry Pi 4. The driver will go through the PCIe maintainers pull request for 5.6. * tag 'arm-soc/for-5.6/devicetree-part2' of https://github.com/Broadcom/stblinux: ARM: dts: bcm2711: Enable PCIe controller ARM: dts: bcm283x: Unify CMA configuration Link: https://lore.kernel.org/r/20200117222705.25391-2-f.fainelli@gmail.com Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-17Merge tag 'arm-soc/for-5.6/defconfig-arm64' of ↵Olof Johansson
https://github.com/Broadcom/stblinux into arm/defconfig This pull request contains Broadcom ARM64-based SoCs defconfig changes for 5.6, please pull the following: - Nicolas enables the Broadcom GENET controller and Broadcom STB PCIe Root Complex driver as a module for the ARM64 defconfig. The PCIe RC driver will go through the PCIe maintainers pull request for 5.6. * tag 'arm-soc/for-5.6/defconfig-arm64' of https://github.com/Broadcom/stblinux: arm64: defconfig: Enable Broadcom's GENET Ethernet controller arm64: defconfig: Enable Broadcom's STB PCIe controller Link: https://lore.kernel.org/r/20200117222705.25391-1-f.fainelli@gmail.com Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-17ARCv2: fpu: preserve userspace fpu stateVineet Gupta
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2020-01-17ARC: fpu: declutter code, move bits out into fpu.hVineet Gupta
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2020-01-17arm64: dts: exynos: Rename Samsung and Exynos to lowercaseKrzysztof Kozlowski
Fix up inconsistent usage of upper and lowercase letters in "Samsung" and "Exynos" names. "SAMSUNG" and "EXYNOS" are not abbreviations but regular trademarked names. Therefore they should be written with lowercase letters starting with capital letter. The lowercase "Exynos" name is promoted by its manufacturer Samsung Electronics Co., Ltd., in advertisement materials and on website. Although advertisement materials usually use uppercase "SAMSUNG", the lowercase version is used in all legal aspects (e.g. on Wikipedia and in privacy/legal statements on https://www.samsung.com/semiconductor/privacy-global/). Link: https://lore.kernel.org/r/20200117190305.5257-1-krzk@kernel.org Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-17arm64: defconfig: Enable Broadcom's GENET Ethernet controllerNicolas Saenz Julienne
Currently used on the Raspberry Pi 4 and various Broadcom STB SoCs. Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-01-17Merge tag 'ti-k3-soc-for-v5.6' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/kristo/linux into arm/dt Texas Instruments K3 SoC family changes for 5.6 - Add missing power domains for smmu for J721e - Add I2C, ADC, OSPI and UFS nodes for J721e - Add OSPI and MCU syscon nodes for am65x - Add IRQ line for GPIO expander on am65x * tag 'ti-k3-soc-for-v5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/kristo/linux: arm64: dts: ti: k3-j721e-main: Add missing power-domains for smmu arm64: dts: ti: k3-am65-mcu: add system control module node arm64: dts: k3-am654-base-board: Add IRQ line for GPIO expander arm64: dts: ti: k3-am65: Add OSPI DT node arm64: dts: ti: k3-j721e: Add DT nodes for few peripherials Link: https://lore.kernel.org/r/c5b74bfc-f2f0-1b72-4a3c-4c1d478a023a@ti.com Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-17ARM: multi_v7_defconfig: Enable devfreq thermal integrationMarek Szyprowski
Panfrost driver provides a devfreq driver for the Mali GPU and allows to scale GPU core frequency. Enable support for devfreq thermal integration to enable cooling of GPU thermal zone by reducing GPU core frequency. This fixes following warning during boot on Exynos5422-based Odroid XU4: panfrost 11800000.gpu: [drm:panfrost_devfreq_init] Failed to register cooling device Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-01-17ARM: exynos_defconfig: Enable devfreq thermal integrationMarek Szyprowski
Panfrost driver provides a devfreq driver for the Mali GPU and allows to scale GPU core frequency. Enable support for devfreq thermal integration to enable cooling of GPU thermal zone by reducing GPU core frequency. This fixes following warning during boot on Exynos5422-based Odroid XU4: panfrost 11800000.gpu: [drm:panfrost_devfreq_init] Failed to register cooling device Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-01-17ARM: multi_v7_defconfig: Enable NFS v4.1 and v4.2Krzysztof Kozlowski
NFS is widely used in debugging and Continuous Integration systems, so enable the newest versions of protocol: v4.1 and v4.2. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-01-17ARM: exynos_defconfig: Enable NFS v4.1 and v4.2Krzysztof Kozlowski
NFS is widely used in debugging and Continuous Integration systems, so enable the newest versions of protocol: v4.1 and v4.2. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>