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2020-05-20ARM: dts: imx6qdl-gw5904: add lsm9ds1 iio imu/magn supportTim Harvey
Add one node for the accel/gyro i2c device and another for the separate magnetometer device in the lsm9ds1. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-05-20ARM: dts: imx6qdl-gw560x: add lsm9ds1 iio imu/magn supportTim Harvey
Add one node for the accel/gyro i2c device and another for the separate magnetometer device in the lsm9ds1. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-05-20ARM: dts: imx53: Add src node interruptAnson Huang
Interrupt is a required property according to SRC binding, add it for SRC node. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-05-20ARM: dts: imx51: Add src node interruptAnson Huang
Interrupt is a required property according to SRC binding, add it for SRC node. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-05-20ARM: imx: pcm037: make pcm970_sja1000_platform_data staticMa Feng
Fix sparse warning: arch/arm/mach-imx/mach-pcm037.c:407:30: warning: symbol 'pcm970_sja1000_platform_data' was not declared. Should it be static? Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Ma Feng <mafeng.ma@huawei.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-05-20arm64: dts: imx8mp: Add src node interruptsAnson Huang
Interrupts is a required property according to SRC binding, add it for SRC node. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-05-20arm64: dts: imx8mq: Add src node interruptsAnson Huang
Interrupts is a required property according to SRC binding, add it for SRC node. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-05-20ARM: imx_v6_v7_defconfig: extend RN5T618 PMIC family supportAndreas Kemnade
There are new drivers for functionality of that family (RTC and ADC), so enable them, since they are used by various i.MX6 boards. Signed-off-by: Andreas Kemnade <andreas@kemnade.info> Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-05-20arm64: dts: imx8m: assign clocks for A53Peng Fan
Assign IMX8M*_CLK_A53_SRC's parent to system pll1 and assign IMX8M*_CLK_A53_CORE's parent to arm pll out as what is done in drivers/clk/imx/clk-imx8m*.c, then we could remove the settings in driver which triggers lockdep warning. Reported-by: Leonard Crestez <leonard.crestez@nxp.com> Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-05-20arm64: dts: freescale: sl28: enable LPUART1Michael Walle
Now that the LPUART has support for the LS1028A SoC, also enable it on our board. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-05-20ARM: dts: imx50: Remove unused iomuxc-gpr nodeFabio Estevam
The iomuxc-gpr node is not used and causes the following dtc warning with W=1: arch/arm/boot/dts/imx50.dtsi:286.28-289.6: Warning (unique_unit_address): /soc/bus@50000000/iomuxc@53fa8000: duplicate unit-address (also used in node /soc/bus@50000000/iomuxc-gpr@53fa8000) Remove the node to fix the warning. Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-05-20arm64: dts: ls1043a-rdb: add compatible for boardYangbo Lu
Add compatible for board to identify. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-05-19arm64: dts: meson: add ethernet interrupt to wetek dtsiChristian Hewitt
Add Ethernet interrupt details to the WeTek Hub/Play2 dtsi to resolve an issue with Ethernet probing in mainline u-boot. Signed-off-by: Christian Hewitt <christianshewitt@gmail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Link: https://lore.kernel.org/r/20200518025451.16401-1-christianshewitt@gmail.com
2020-05-19arm64: dts: meson: add support for the Smartlabs SML-5442TWChristian Hewitt
The Smartlabs SML-5442TW is based on the Amlogic P231 reference design but with the following differences: - The Yellow and Blue LEDs are available but disabled - The Red and Green LEDs are used to signal off/on status - uart_AO can be accessed after opening the case; soldered pins exist - QCA9377 instead of the usual Ampak/Broadcom module Signed-off-by: Christian Hewitt <christianshewitt@gmail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Link: https://lore.kernel.org/r/20200510124129.31575-4-christianshewitt@gmail.com
2020-05-19arm64: dts: meson: g12: add internal DAC glueJerome Brunet
add the internal DAC glue support on the g12 and sm1 family This glue connects the different TDM interfaces of the SoC to the internal audio DAC codec. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Link: https://lore.kernel.org/r/20200506221656.477379-8-jbrunet@baylibre.com
2020-05-19arm64: dts: meson: g12: add internal DACJerome Brunet
add internal audio DAC support on the g12 and sm1 SoC family Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Link: https://lore.kernel.org/r/20200506221656.477379-7-jbrunet@baylibre.com
2020-05-19arm64: dts: meson: libretech-pc: add internal DAC supportJerome Brunet
Add the internal DAC support on the libretech CC. The output of this DAC is provided on the 9J4 connector. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Link: https://lore.kernel.org/r/20200506221656.477379-6-jbrunet@baylibre.com
2020-05-19arm64: dts: meson: libretech-ac: add internal DAC supportJerome Brunet
Add the internal DAC support on the libretech CC. The output of this DAC is provided on the 9J5 connector. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Link: https://lore.kernel.org/r/20200506221656.477379-5-jbrunet@baylibre.com
2020-05-19arm64: dts: meson: libretech-cc: add internal DAC supportJerome Brunet
Add the internal DAC support on the libretech CC. The output of this DAC is provided on the 3.5mm jack connector. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Link: https://lore.kernel.org/r/20200506221656.477379-4-jbrunet@baylibre.com
2020-05-19arm64: dts: meson: p230-q200: add internal DAC supportJerome Brunet
Add the necessary bits to support the internal audio DAC the p230/q200 reference design derivated boards. The output of this DAC is provided on the 3.5mm jack connector Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Link: https://lore.kernel.org/r/20200506221656.477379-3-jbrunet@baylibre.com
2020-05-19arm64: dts: meson: gxl: add acodec supportJerome Brunet
Add the internal audio DAC to the gxl SoC DT Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Link: https://lore.kernel.org/r/20200506221656.477379-2-jbrunet@baylibre.com
2020-05-19arm64: dts: meson-sm1: add support for Hardkernel ODROID-C4Dongjin Kim
Add the board support for the Hardkernel Odroid-C4 single board computer. The Odroid-C4 is the Odroid-C2 successor with same form factor, but using a modern Amlogic S905X3 (SM1) SoC and 4x USB3 ports. Signed-off-by: Dongjin Kim <tobetter@gmail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Link: https://lore.kernel.org/r/20200506080702.6645-3-narmstrong@baylibre.com
2020-05-19arm64: dts: meson-sm1: add cpu thermal nodesNeil Armstrong
Add thermal nodes for the Amlogic SM1 SoCs based on the G12A and G12B thermal nodes. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Link: https://lore.kernel.org/r/20200512093916.19676-3-narmstrong@baylibre.com
2020-05-19arm64: dts: meson-g12b: move G12B thermal nodes to meson-g12b.dtsiNeil Armstrong
The G12B thermal nodes should be in the meson-g12b.dtsi file. Fixes: 195f140318a9 ("arm64: dts: meson: g12b: add cooling properties") Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Link: https://lore.kernel.org/r/20200512093916.19676-2-narmstrong@baylibre.com
2020-05-19arm64: dts: meson: libretech-pc: add initial audio playback supportJerome Brunet
Add initial audio support limited to HDMI i2s. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Tested-by: Christian Hewitt <christianshewitt@gmail.com> Link: https://lore.kernel.org/r/20200421163935.775935-7-jbrunet@baylibre.com
2020-05-19arm64: dts: meson: libretech-ac: add initial audio playback supportJerome Brunet
Add initial audio support limited to HDMI i2s. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Tested-by: Christian Hewitt <christianshewitt@gmail.com> Link: https://lore.kernel.org/r/20200421163935.775935-6-jbrunet@baylibre.com
2020-05-19arm64: dts: meson: libretech-cc: add initial audio playback supportJerome Brunet
Add initial audio support limited to HDMI i2s. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Tested-by: Christian Hewitt <christianshewitt@gmail.com> Link: https://lore.kernel.org/r/20200421163935.775935-5-jbrunet@baylibre.com
2020-05-19arm64: dts: meson: p230-q200: add initial audio playback supportJerome Brunet
Add basic audio support on the p230/q200 reference design. This initial support is limited to HDMI i2s and SPDIF (LPCM). Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Tested-by: Christian Hewitt <christianshewitt@gmail.com> Link: https://lore.kernel.org/r/20200421163935.775935-4-jbrunet@baylibre.com
2020-05-19arm64: dts: meson-gx: add aiu supportJerome Brunet
Add the AIU audio device to the Amlogic GX SoC family DT. ATM, this device provides the i2s and spdif output stages and also the hdmi and internal codec glues. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Tested-by: Christian Hewitt <christianshewitt@gmail.com> Link: https://lore.kernel.org/r/20200421163935.775935-3-jbrunet@baylibre.com
2020-05-19ARM: dts: meson: Switch existing boards with RGMII PHY to "rgmii-id"Martin Blumenstingl
Let the PHY generate the RX and TX delay on the Odroid-C1 and MXIII Plus. Previously we did not know that these boards used an RX delay. We assumed that setting the TX delay on the MAC side It turns out that these boards also require an RX delay of 2ns (verified on Odroid-C1, but the u-boot code uses the same setup on both boards). Ethernet only worked because u-boot added this RX delay on the MAC side. The 4ns TX delay was also wrong and the result of using an unsupported RGMII TX clock divider setting. This has been fixed in the driver with commit bd6f48546b9cb7 ("net: stmmac: dwmac-meson8b: Fix the RGMII TX delay on Meson8b/8m2 SoCs"). Switch to phy-mode "rgmii-id" to let the PHY side handle all the delays, (as recommended by the Ethernet maintainers anyways) to correctly describe the need for a 2ns RX as well as 2ns TX delay on these boards. This fixes the Ethernet performance on Odroid-C1 where there was a huge amount of packet loss when transmitting data due to the incorrect TX delay. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Link: https://lore.kernel.org/r/20200512215148.540322-3-martin.blumenstingl@googlemail.com
2020-05-19ARM: dts: meson: Add the Ethernet "timing-adjustment" clockMartin Blumenstingl
Add the "timing-adjusment" clock now that we now that this is connected to the PRG_ETHERNET registers. It is used internally to generate the RGMII RX delay no the MAC side (if needed). Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Link: https://lore.kernel.org/r/20200512215148.540322-2-martin.blumenstingl@googlemail.com
2020-05-19ARM: dts: meson8m2: Use the Meson8m2 specific USB2 PHY compatibleMartin Blumenstingl
Use the Meson8m2 specific USB2 PHY compatible string. The 3.10 vendor kernel has at least one known difference between Meson8 and Meson8m2: Meson8m2 sets the ACA_ENABLE bit while Meson8 doesn't. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Link: https://lore.kernel.org/r/20200515202520.1487514-1-martin.blumenstingl@googlemail.com
2020-05-19ARM: dts: meson: add the gadget mode properties to the USB0 controllerMartin Blumenstingl
Testing with a USB RNDIS connection and iperf3 gives the following results: - From the host computer to the device at ~250Mbit/s - From the device to the host computer at ~76Mbit/s Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Link: https://lore.kernel.org/r/20200504195105.2909711-1-martin.blumenstingl@googlemail.com
2020-05-19Merge tag 'arc-5.7-rc7' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc Pull ARC fixes from Vineet Gupta: - fix recent DSP code regression on ARC700 platforms - fix thinkos in ICCM/DCCM size checks - USB regression fix - other small fixes here and there * tag 'arc-5.7-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc: ARC: show_regs: avoid extra line of output ARC: guard dsp early init against non ARCv2 ARC: [plat-eznps]: Restrict to CONFIG_ISA_ARCOMPACT ARC: entry: comment arc: remove #ifndef CONFIG_AS_CFI_SIGNAL_FRAME arc: ptrace: hard-code "arc" instead of UTS_MACHINE ARC: [plat-hsdk]: fix USB regression ARC: Fix ICCM & DCCM runtime size checks
2020-05-19s390/net: remove pm ops from ccwgroup driversJulian Wiedmann
commit 5e1fb45ec8e2 ("s390/ccwgroup: remove pm support") removed power management support from the ccwgroup bus driver. So remove the associated callbacks from all ccwgroup drivers. CC: Vineeth Vijayan <vneethv@linux.ibm.com> Signed-off-by: Julian Wiedmann <jwi@linux.ibm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-19Merge tag 'hyperv-fixes-signed' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/hyperv/linux Pull hyperv fix from Wei Liu: "One patch from Vitaly to fix reenlightenment notifications" * tag 'hyperv-fixes-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/hyperv/linux: x86/hyperv: Properly suspend/resume reenlightenment notifications
2020-05-19perf/x86: Replace zero-length array with flexible-arrayGustavo A. R. Silva
The current codebase makes use of the zero-length array language extension to the C90 standard, but the preferred mechanism to declare variable-length types such as these ones is a flexible array member[1][2], introduced in C99: struct foo { int stuff; struct boo array[]; }; By making use of the mechanism above, we will get a compiler warning in case the flexible array does not occur last in the structure, which will help us prevent some kind of undefined behavior bugs from being inadvertently introduced[3] to the codebase from now on. Also, notice that, dynamic memory allocations won't be affected by this change: "Flexible array members have incomplete type, and so the sizeof operator may not be applied. As a quirk of the original implementation of zero-length arrays, sizeof evaluates to zero."[1] sizeof(flexible-array-member) triggers a warning because flexible array members have incomplete type[1]. There are some instances of code in which the sizeof operator is being incorrectly/erroneously applied to zero-length arrays and the result is zero. Such instances may be hiding some bugs. So, this work (flexible-array member conversions) will also help to get completely rid of those sorts of issues. This issue was found with the help of Coccinelle. [1] https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html [2] https://github.com/KSPP/linux/issues/21 [3] commit 76497732932f ("cxgb3/l2t: Fix undefined behaviour") Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lkml.kernel.org/r/20200511200911.GA13149@embeddedor
2020-05-19perf/x86/intel: Add more available bits for OFFCORE_RESPONSE of Intel TremontKan Liang
The mask in the extra_regs for Intel Tremont need to be extended to allow more defined bits. "Outstanding Requests" (bit 63) is only available on MSR_OFFCORE_RSP0; Fixes: 6daeb8737f8a ("perf/x86/intel: Add Tremont core PMU support") Reported-by: Stephane Eranian <eranian@google.com> Signed-off-by: Kan Liang <kan.liang@linux.intel.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: stable@vger.kernel.org Link: https://lkml.kernel.org/r/20200501125442.7030-1-kan.liang@linux.intel.com
2020-05-19perf/x86/rapl: Add Ice Lake RAPL supportKan Liang
Enable RAPL support for Intel Ice Lake X and Ice Lake D. For RAPL support, it is identical to Sky Lake X. Reported-by: Stephane Eranian <eranian@google.com> Signed-off-by: Kan Liang <kan.liang@linux.intel.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lkml.kernel.org/r/1588857258-38213-1-git-send-email-kan.liang@linux.intel.com
2020-05-19Merge branch 'sched/urgent'Peter Zijlstra
2020-05-19arm64: acpi: Make apei_claim_sea() synchronise with APEI's irq workJames Morse
APEI is unable to do all of its error handling work in nmi-context, so it defers non-fatal work onto the irq_work queue. arch_irq_work_raise() sends an IPI to the calling cpu, but this is not guaranteed to be taken before returning to user-space. Unless the exception interrupted a context with irqs-masked, irq_work_run() can run immediately. Otherwise return -EINPROGRESS to indicate ghes_notify_sea() found some work to do, but it hasn't finished yet. With this apei_claim_sea() returning '0' means this external-abort was also notification of a firmware-first RAS error, and that APEI has processed the CPER records. Signed-off-by: James Morse <james.morse@arm.com> Tested-by: Tyler Baicar <baicar@os.amperecomputing.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2020-05-19x86/mmiotrace: Use cpumask_available() for cpumask_var_t variablesNathan Chancellor
When building with Clang + -Wtautological-compare and CONFIG_CPUMASK_OFFSTACK unset: arch/x86/mm/mmio-mod.c:375:6: warning: comparison of array 'downed_cpus' equal to a null pointer is always false [-Wtautological-pointer-compare] if (downed_cpus == NULL && ^~~~~~~~~~~ ~~~~ arch/x86/mm/mmio-mod.c:405:6: warning: comparison of array 'downed_cpus' equal to a null pointer is always false [-Wtautological-pointer-compare] if (downed_cpus == NULL || cpumask_weight(downed_cpus) == 0) ^~~~~~~~~~~ ~~~~ 2 warnings generated. Commit f7e30f01a9e2 ("cpumask: Add helper cpumask_available()") added cpumask_available() to fix warnings of this nature. Use that here so that clang does not warn regardless of CONFIG_CPUMASK_OFFSTACK's value. Reported-by: Sedat Dilek <sedat.dilek@gmail.com> Signed-off-by: Nathan Chancellor <natechancellor@gmail.com> Signed-off-by: Borislav Petkov <bp@suse.de> Reviewed-by: Nick Desaulniers <ndesaulniers@google.com> Acked-by: Steven Rostedt (VMware) <rostedt@goodmis.org> Link: https://github.com/ClangBuiltLinux/linux/issues/982 Link: https://lkml.kernel.org/r/20200408205323.44490-1-natechancellor@gmail.com
2020-05-19ARM: OMAP2+: Drop old timer code for dmtimer and 32k counterTony Lindgren
With dmtimer and 32k counter being initialized based on devicetree data, we can just drop the old timer code. This still leaves the omap5 and dra7 realtime_counter_init() that depend on the smc calls and control module platform code for the dra7 quirk init. Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Keerthy <j-keerthy@ti.com> Cc: Lokesh Vutla <lokeshvutla@ti.com> Cc: Rob Herring <robh@kernel.org> Cc: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-05-19ARM: dts: Configure system timers for omap2Tony Lindgren
We can now init system timers using the dmtimer and 32k counter based on only devicetree data and drivers/clocksource timers. Let's configure the clocksource and clockevent, and drop the old unused platform data. As we're just dropping platform data, and the early platform data init is based on the custom ti,hwmods property, we want to drop both the platform data and ti,hwmods property in a single patch. Since the dmtimer can use both 32k clock and system clock as the source, let's also configure the SoC specific default values. The board specific dts files can reconfigure these with assigned-clocks and assigned-clock-parents as needed. Let's also update the dts file to use #include while at it. Cc: devicetree@vger.kernel.org Cc: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Keerthy <j-keerthy@ti.com> Cc: Lokesh Vutla <lokeshvutla@ti.com> Cc: Rob Herring <robh@kernel.org> Cc: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-05-19ARM: dts: Configure system timers for ti81xxTony Lindgren
We can now init system timers using the dmtimer and 32k counter based on only devicetree data and drivers/clocksource timers. Let's configure the clocksource and clockevent, and drop the old unused platform data. As we're just dropping platform data, and the early platform data init is based on the custom ti,hwmods property, we want to drop both the platform data and ti,hwmods property in a single patch. Since the dmtimer can use both 32k clock and system clock as the source, let's also configure the SoC specific default values. The board specific dts files can reconfigure these with assigned-clocks and assigned-clock-parents as needed. Note that for ti81xx, also timer1 is of type 2 unlike on am335x where timer1 is type1 while the rest of the timers are type 2. Cc: devicetree@vger.kernel.org Cc: Brian Hutchinson <b.hutchman@gmail.com> Cc: Graeme Smecher <gsmecher@threespeedlogic.com> Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Keerthy <j-keerthy@ti.com> Cc: Lokesh Vutla <lokeshvutla@ti.com> Cc: Rob Herring <robh@kernel.org> Cc: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-05-19ARM: dts: Configure system timers for omap3Tony Lindgren
We can now init system timers using the dmtimer and 32k counter based on only devicetree data and drivers/clocksource timers. Let's configure the clocksource and clockevent, and drop the old unused platform data. As we're just dropping platform data, and the early platform data init is based on the custom ti,hwmods property, we want to drop both the platform data and ti,hwmods property in a single patch. Since the dmtimer can use both 32k clock and system clock as the source, let's also configure the SoC specific default values. The board specific dts files can reconfigure these with assigned-clocks and assigned-clock-parents as needed. Let's also update the dts file to use #include while at it. Cc: devicetree@vger.kernel.org Cc: Adam Ford <aford173@gmail.com> Cc: Andreas Kemnade <andreas@kemnade.info> Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: "H. Nikolaus Schaller" <hns@goldelico.com> Cc: Keerthy <j-keerthy@ti.com> Cc: Lokesh Vutla <lokeshvutla@ti.com> Cc: Rob Herring <robh@kernel.org> Cc: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-05-19ARM: dts: Configure system timers for omap5 and dra7Tony Lindgren
We can now init system timers using the dmtimer and 32k counter based on only devicetree data and drivers/clocksource timers. Let's configure the clocksource and clockevent, and drop the old unused platform data. As we're just dropping platform data, and the early platform data init is based on the custom ti,hwmods property, we want to drop both the platform data and ti,hwmods property in a single patch. Since the dmtimer can use both 32k clock and system clock as the source, let's also configure the SoC specific default values. The board specific dts files can reconfigure these with assigned-clocks and assigned-clock-parents as needed. Note that similar to omap_init_time_of(), we now need to call omap_clk_init() also from omap5_realtime_timer_init(). Cc: devicetree@vger.kernel.org Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Keerthy <j-keerthy@ti.com> Cc: Lokesh Vutla <lokeshvutla@ti.com> Cc: Rob Herring <robh@kernel.org> Cc: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-05-19ARM: dts: Configure system timers for omap4Tony Lindgren
We can now init system timers using the dmtimer and 32k counter based on only devicetree data and drivers/clocksource timers. Let's configure the clocksource and clockevent, and drop the old unused platform data. As we're just dropping platform data, and the early platform data init is based on the custom ti,hwmods property, we want to drop both the platform data and ti,hwmods property in a single patch. Since the dmtimer can use both 32k clock and system clock as the source, let's also configure the SoC specific default values. The board specific dts files can reconfigure these with assigned-clocks and assigned-clock-parents as needed. Cc: devicetree@vger.kernel.org Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Keerthy <j-keerthy@ti.com> Cc: Lokesh Vutla <lokeshvutla@ti.com> Cc: Rob Herring <robh@kernel.org> Cc: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-05-19ARM: dts: Configure system timers for am437xTony Lindgren
We can now init system timers using the dmtimer and 32k counter based on only devicetree data and drivers/clocksource timers. Let's configure the clocksource and clockevent, and drop the old unused platform data. As we're just dropping platform data, and the early platform data init is based on the custom ti,hwmods property, we want to drop both the platform data and ti,hwmods property in a single patch. Since the dmtimer can use both 32k clock and system clock as the source, let's also configure the SoC specific default values. The board specific dts files can reconfigure these with assigned-clocks and assigned-clock-parents as needed. Cc: devicetree@vger.kernel.org Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Keerthy <j-keerthy@ti.com> Cc: Lokesh Vutla <lokeshvutla@ti.com> Cc: Rob Herring <robh@kernel.org> Cc: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-05-19ARM: dts: Configure system timers for am335xTony Lindgren
We can now init system timers using the dmtimer and 32k counter based on only devicetree data and drivers/clocksource timers. Let's configure the clocksource and clockevent, and drop the old unused platform data. As we're just dropping platform data, and the early platform data init is based on the custom ti,hwmods property, we want to drop both the platform data and ti,hwmods property in a single patch. Since the dmtimer can use both 32k clock and system clock as the source, let's also configure the SoC specific default values. The board specific dts files can reconfigure these with assigned-clocks and assigned-clock-parents as needed. Cc: devicetree@vger.kernel.org Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Keerthy <j-keerthy@ti.com> Cc: Lokesh Vutla <lokeshvutla@ti.com> Cc: Rob Herring <robh@kernel.org> Cc: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>