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2009-01-31x86, apic: clean up header sectionIngo Molnar
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-01-31x86, irq: add LOCAL_PERF_VECTORIngo Molnar
Add a slot for the performance monitoring interrupt. Not yet used by any subsystem - but the hardware has it. (This eases integration with performance monitoring code.) Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-01-31rename platform_driver name "flash" to "sa1100-mtd"Uwe Kleine-König
"flash" is a very generic name for a platform_driver that is only available on SA11x0. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Cc: Nicolas Pitre <nico@marvell.com>
2009-01-31annotate that [fp, #-4] is the saved lrUwe Kleine-König
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2009-01-31Use __SPIN_LOCK_UNLOCKED to initialize bad_irq_desc.lockUwe Kleine-König
SPIN_LOCK_UNLOCKED is deprecated as lockdep cannot properly work with locks initialized with it. This fix is necessary to compile the linux-rt tree for ARM. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Cc: Steven Rostedt <srostedt@redhat.com>
2009-01-30x86 setup: fix asm constraints in vesa_store_edidAndreas Schwab
Impact: fix potential miscompile (currently believed non-manifest) As the comment explains, the VBE DDC call can clobber any register. Tell the compiler about that fact. Signed-off-by: Andreas Schwab <schwab@suse.de> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-01-30x86/paravirt: fix missing callee-save call on pud_valJeremy Fitzhardinge
Impact: Fix build when CONFIG_PARAVIRT_DEBUG is enabled Fix missed convertion to using callee-saved calls for pud_val, which causes a compile error when CONFIG_PARAVIRT_DEBUG is enabled. Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2009-01-30x86/paravirt: use callee-saved convention for pte_val/make_pte/etcJeremy Fitzhardinge
Impact: Optimization In the native case, pte_val, make_pte, etc are all just identity functions, so there's no need to clobber a lot of registers over them. (This changes the 32-bit callee-save calling convention to return both EAX and EDX so functions can return 64-bit values.) Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2009-01-30x86/paravirt: implement PVOP_CALL macros for callee-save functionsJeremy Fitzhardinge
Impact: Optimization Functions with the callee save calling convention clobber many fewer registers than the normal C calling convention. Implement variants of PVOP_V?CALL* accordingly. This only bothers with functions up to 3 args, since functions with more args may as well use the normal calling convention. Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2009-01-30x86/paravirt: add register-saving thunks to reduce caller register pressureJeremy Fitzhardinge
Impact: Optimization One of the problems with inserting a pile of C calls where previously there were none is that the register pressure is greatly increased. The C calling convention says that the caller must expect a certain set of registers may be trashed by the callee, and that the callee can use those registers without restriction. This includes the function argument registers, and several others. This patch seeks to alleviate this pressure by introducing wrapper thunks that will do the register saving/restoring, so that the callsite doesn't need to worry about it, but the callee function can be conventional compiler-generated code. In many cases (particularly performance-sensitive cases) the callee will be in assembler anyway, and need not use the compiler's calling convention. Standard calling convention is: arguments return scratch x86-32 eax edx ecx eax ? x86-64 rdi rsi rdx rcx rax r8 r9 r10 r11 The thunk preserves all argument and scratch registers. The return register is not preserved, and is available as a scratch register for unwrapped callee code (and of course the return value). Wrapped function pointers are themselves wrapped in a struct paravirt_callee_save structure, in order to get some warning from the compiler when functions with mismatched calling conventions are used. The most common paravirt ops, both statically and dynamically, are interrupt enable/disable/save/restore, so handle them first. This is particularly easy since their calls are handled specially anyway. XXX Deal with VMI. What's their calling convention? Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2009-01-30x86/paravirt: selectively save/restore regs around pvops callsJeremy Fitzhardinge
Impact: Optimization Each asm paravirt-ops call says what registers are available for clobbering. This patch makes use of this to selectively save/restore registers around each pvops call. In many cases this significantly shrinks code size. Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2009-01-30x86: fix paravirt clobber in entry_64.SJeremy Fitzhardinge
Impact: Fix latent bug The clobber is trying to say that anything except RDI is available for clobbering, but actually clobbers everything. This hasn't mattered because the clobbers were basically ignored, but subsequent patches will rely on them. Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2009-01-30x86/pvops: add a paravirt_ident functions to allow special patchingJeremy Fitzhardinge
Impact: Optimization Several paravirt ops implementations simply return their arguments, the most obvious being the make_pte/pte_val class of operations on native. On 32-bit, the identity function is literally a no-op, as the calling convention uses the same registers for the first argument and return. On 64-bit, it can be implemented with a single "mov". This patch adds special identity functions for 32 and 64 bit argument, and machinery to recognize them and replace them with either nops or a mov as appropriate. At the moment, the only users for the identity functions are the pagetable entry conversion functions. The result is a measureable improvement on pagetable-heavy benchmarks (2-3%, reducing the pvops overhead from 5 to 2%). Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2009-01-30xen: move remaining mmu-related stuff into mmu.cJeremy Fitzhardinge
Impact: Cleanup Move remaining mmu-related stuff into mmu.c. A general cleanup, and lay the groundwork for later patches. Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2009-01-30Merge branch 'core/percpu' into x86/paravirtH. Peter Anvin
2009-01-30x86, apic, 32-bit: add self-IPI methodsIngo Molnar
Impact: fix rare crash on 32-bit The 32-bit APIC drivers had their send_IPI_self vectors set to NULL, but ioapic_retrigger_irq() depends on it being always set. Fix it. Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-01-30MIPS: Alchemy: time.c build fixManuel Lauss
In Linus' current -git the cpumask member is now a pointer. Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30MIPS: RB532: Export rb532_gpio_set_func()Phil Sutter
This kernel symbol provides a way for drivers to switch on alternate function for a certain GPIO pin. Turning it off is done implicitly when changing the GPIO direction, as that would be fixed when using the given pin als alternate function. Signed-off-by: Phil Sutter <n0-1@freewrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30MIPS: RB532: Update headersPhil Sutter
Remove the {set,get}_434_reg() prototypes, as the functions have been removed. Also move the prototypes for {get,set}_latch_u5() to the correct place. Signed-off-by: Phil Sutter <n0-1@freewrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30MIPS: RB532: Simplify dev3 initPhil Sutter
As rb532_dev3_ctl_res is not used by any platform device, it can be dropped when not used for holding the physical address of the device 3 controller. Also a size of one byte should suffice when ioremapping the physical address mentioned above, as only a single byte is being read from and written to it. Signed-off-by: Phil Sutter <n0-1@freewrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30MIPS: RB532: Remove {get,set}_434_reg()Phil Sutter
These kernel symbols are unused. Also, since dev3 init has been moved to devices.c, set_434_reg() breaks compiling as it uses dev3. Signed-off-by: Phil Sutter <n0-1@freewrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30MIPS: RB532: Move dev3 init code to devices.cPhil Sutter
This code doesn't belong to gpio.c, as it's completely unrelated to GPIO. As dev1 and dev2 init code is in devices.c, it seems to be a more adequate place. Signed-off-by: Phil Sutter <n0-1@freewrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30MIPS: RB532: Fix set_latch_u5()Phil Sutter
The data to be written is just a byte, so use writeb instead of writel. Also, dev3.base contains the address, not the data so referencing here is wrong. Signed-off-by: Phil Sutter <n0-1@freewrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30MIPS: RB532: Fix init of rb532_dev3_ctl_resPhil Sutter
This register just contains the address of the actual resource, so initialisation has to be the same as cf_slot0_res and nand_slot0_res. Signed-off-by: Phil Sutter <n0-1@freewrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30MIPS: RB532: Use driver_data instead of platform_dataPhil Sutter
As the korina ethernet driver uses platform_get_drvdata() to extract the driver specific data from the platform device, driver_data has to be used here. Signed-off-by: Phil Sutter <n0-1@freewrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30MIPS: RB532: Detect uart type, add platform devicePhil Sutter
Auto-detection works just fine, so use it instead of specifying the type manually. Also define a platform device for the uart, as suggested by David Daney. Signed-off-by: Phil Sutter <n0-1@freewrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30MIPS: RB532: remove useless CF GPIO initialisationPhil Sutter
As the pata-rb532-cf driver calls gpio_direction_input(), the calls to rb532_gpio_set_func() and rb532_gpio_direction_input() are not needed since the alternate function is automatically being disabled when changing the GPIO pin direction. The later two calls to rb532_gpio_set_{ilevel,istat}() are implicitly being done by the IRQ initialisation of pata-rb532-cf. Signed-off-by: Phil Sutter <n0-1@freewrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30MIPS: RB532: Auto disable GPIO alternate functionPhil Sutter
When a driver calls gpio_set_direction_{input,output}(), it obviously doesn't want the alternate function for that pin to be active (as the direction would not matter in that case). This patch ensures alternate function is disabled when the direction is being changed. Signed-off-by: Phil Sutter <n0-1@freewrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30MIPS: RB532: Add set_type() function to IRQ struct.Phil Sutter
Interrupt Group 4 mapps the GPIO pins enabled as interrupt sources; add defines to make this clear when addressing them later in code. The mapped GPIOs support triggering on either level high or low. To achieve this, the set_type() function calls rb532_gpio_set_ilevel() for interrupts of the above mentioned group. As there is no way to alter the triggering characteristics of the other interrupts, accept level triggering on status high only. (This is just a guess; but as the system boots fine and interrupt-driven devices (e.g. serial console) work with no implications, it seems to be right.) To clear a GPIO mapped IRQ, the source has to be cleared (i.e., the interrupt status bit of the corresponding GPIO pin). This is done inside rb532_disable_irq(). After applying these changes I could undo most of my former "fixes" to pata-rb532-cf. Particularly all interrupt handling can be done generically via set_irq_type() as it was before. Signed-off-by: Phil Sutter <n0-1@freewrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30MIPS: RC32434: Define io_map_base for PCI controllerPhil Sutter
The code is rather based on trial-and-error than knowledge. Verified Via Rhine functionality in PIO as well as MMIO mode. [Looks sane -- Ralf] Signed-off-by: Phil Sutter <n0-1@freewrt.org> Tested-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30MIPS: RB532: Fix bit swapping in rb532_set_bit()Phil Sutter
The algorithm works unconditionally. If bitval is one, the first line is a no op and the second line sets the bit at offset position. Vice versa, if bitval is zero, the first line clears the bit at offset position and the second line is a no op. Signed-off-by: Phil Sutter <n0-1@freewrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30MIPS: Use hardware watchpoints on all R1 and R2 CPUs.David Daney
The previous definition inadvertently omits Octeon which currently is treated as an architecture variant separate from MIPS32 and MIPS64. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30MIPS: Read watch registers with interrupts disabled.David Daney
If a context switch occurred between the watch exception and reading the watch registers, it would be possible for the new process to corrupt their state. Enabling interrupts only after the watch registers are read avoids this race. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30MIPS: Fix a typo in watchpoint register structure.David Daney
This fixes the ptrace ABI for watch registers, and should allow 64bit kernels to use the watch register support. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30MIPS: TXx9: Add support for TX4939 internal RTCAtsushi Nemoto
Add platform support to use rtc-tx4939 driver. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30MIPS: R2: Fix broken installation of cache error handler.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30MIPS: IP27: Switch from DMA_IP27 to DMA_COHERENTRalf Baechle
The special IP27 DMA code selected by DMA_IP27 has been removed a while ago turning DMA_IP27 into almost a nop. Also fixup the broken logic of its last users memcpy.S and memcpy-inatomic.s. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30MIPS: Add return value checks to user_termio_to_kernel_termios()Ralf Baechle
And while at it, convert all functions from macros to inline functions for sanity. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30MIPS: Octeon: Remove duplicated #includesHuang Weiyi
Signed-off-by: Huang Weiyi <weiyi.huang@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30MIPS: atomic_*(): Change type of intermediate variables.Ralf Baechle
This shaves of 1912 bytes of an IP27 defconfig kernel and avoids unexpected overflow behaviour in atomic_sub_if_positive. Apply the same changes to the atomic64_* functions for consistency. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30MIPS: Port "mm: invoke oom-killer from page fault" from UML / x86Ralf Baechle
Original commit 1c0fe6e3bda0464728c23c8d84aa47567e8b716c. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30MIPS: Avoid destructive invalidation on partial cachelines.Ralf Baechle
See discussion e9c3a7c20901051031y528d0d31r18d44c5096c59e0@mail.gmail.com. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-30MIPS: SMTC: Fix build after recent creditial changes.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-31headers_check fix: x86, swab.hJaswinder Singh Rajput
fix the following 'make headers_check' warnings: usr/include/asm/swab.h:4: include of <linux/types.h> is preferred over <asm/types.h> usr/include/asm/swab.h:7: found __[us]{8,16,32,64} type without #include <linux/types.h> Signed-off-by: Jaswinder Singh Rajput <jaswinderrajput@gmail.com>
2009-01-31headers_check fix: x86, sigcontext32.hJaswinder Singh Rajput
fix the following 'make headers_check' warning: usr/include/asm/sigcontext32.h:20: found __[us]{8,16,32,64} type without #include <linux/types.h> Signed-off-by: Jaswinder Singh Rajput <jaswinderrajput@gmail.com>
2009-01-31headers_check fix: x86, sigcontext.hJaswinder Singh Rajput
fix the following 'make headers_check' warnings: usr/include/asm/sigcontext.h:5: include of <linux/types.h> is preferred over <asm/types.h> usr/include/asm/sigcontext.h:24: found __[us]{8,16,32,64} type without #include <linux/types.h> Signed-off-by: Jaswinder Singh Rajput <jaswinderrajput@gmail.com>
2009-01-31headers_check fix: x86, ptrace-abi.hJaswinder Singh Rajput
fix the following 'make headers_check' warnings: usr/include/asm/ptrace-abi.h:86: include of <linux/types.h> is preferred over <asm/types.h> usr/include/asm/ptrace-abi.h:93: found __[us]{8,16,32,64} type without #include <linux/types.h> Signed-off-by: Jaswinder Singh Rajput <jaswinderrajput@gmail.com>
2009-01-31headers_check fix: x86, mtrr.hJaswinder Singh Rajput
fix the following 'make headers_check' warning: usr/include/asm/mtrr.h:61: found __[us]{8,16,32,64} type without #include <linux/types.h> Signed-off-by: Jaswinder Singh Rajput <jaswinderrajput@gmail.com>
2009-01-31headers_check fix: x86, mce.hJaswinder Singh Rajput
fix the following 'make headers_check' warnings: usr/include/asm/mce.h:7: include of <linux/types.h> is preferred over <asm/types.h> usr/include/asm/mce.h:29: found __[us]{8,16,32,64} type without #include <linux/types.h> Signed-off-by: Jaswinder Singh Rajput <jaswinderrajput@gmail.com>
2009-01-31headers_check fix: x86, kvm.hJaswinder Singh Rajput
fix the following 'make headers_check' warnings: usr/include/asm/kvm.h:9: include of <linux/types.h> is preferred over <asm/types.h> usr/include/asm/kvm.h:16: found __[us]{8,16,32,64} type without #include <linux/types.h> Signed-off-by: Jaswinder Singh Rajput <jaswinderrajput@gmail.com>