| Age | Commit message (Collapse) | Author |
|---|
|
https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt
Qualcomm ARM64 DTS updates for 6.1
Support for Samsung Galaxy E5, E7 and Grand Max is added, with support
for both 32-bit and 64-bit variants. The Samsung Galaxy S4 Mini Value
Edition gains magnetometer support.
MSM8996-based Xiaomi devices gains descriptions of the LPG-based LEDs.
On SA8295P ADP problems arising from regulators being switched into
low-power mode is worked around by removing this ability, for now.
The onboard USB Hub on SC7180 Trogdor is finally described and a few ADC
related updates are introduced.
On SC7280 support for the CPU and LLC bwmon instances are introduced.
Soundwire, audio codecs and sound introduced for a variety of boards.
Using required-opps the USB controllers votes for a minimum corner on
VDD_CX.
The onboard USB Hub Herobrine is described. A new board, the Google
Evoker is added, as is another revision of Herobrine Villager.
On SC8280XP the USB controllers are marked as wakeup-sources, to keep
them powered during suspend. The CRD has HID devices marked as
wakeup-sources to enable resuming the system. In addition to these
changes the alternative touchpad is introduced on the Lenovo ThinkPad
X13s.
SDM845 gains RPMh stats support and the LLCC BWMON is added. For SM6350
interconnect providers and GPI DMA is introduced. A description of the
PM7280b PMIC is added to Fairphone FP4 on SM7225.
With the multi-MSI support added in the PCIe controller, SM8250 gets all
its MSI interrupts added.
UFS ICE and the second SDHCI controller is introduced on SM8450. Support
for the Sony Xperia 1 IV is introduced.
Throughout a variety of platforms the TCSR mutex syscon is replaced with
the MMIO-based binding. TCSR nodes gained proper compatibles and halt
syscon nodes are split out from the mutex ranges.
A range of fixes to align with DT bindings are introduced. Among these
are the changes to the follow the TLMM binding and suffix pinctrl states
with -state and subnodes thereof with -pins, another is a number of
changes transitioning to use -gpios and introduction of proper parent
clock references in various clock providers.
* tag 'qcom-arm64-for-6.1' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (136 commits)
arm64: dts: qcom: sc7280: Add required-opps for USB
arm64: dts: qcom: sm8450: fix UFS PHY serdes size
arm64: dts: qcom: ipq8074: fix PCIe PHY serdes size
arm64: dts: qcom: sa8295p-adp: add missing gpio-ranges in PMIC GPIOs
arm64: dts: qcom: sa8295p-adp: add fallback compatible to PMIC GPIOs
arm64: dts: qcom: msm8996-xiaomi: align PMIC GPIO pin configuration with DT schema
arm64: dts: qcom: msm8994-msft-lumia-octagon: align resin node name with bindings
arm64: dts: qcom: pmi8994: add missing MPP compatible fallback
dt-bindings: pci: QCOM Add missing sc7280 aggre0, aggre1 clocks
arm64: dts: qcom: sc7280: Add missing aggre0, aggre1 clocks
arm64: dts: qcom: sc7280-villager: Adjust LTE SKUs
dt-bindings: arm: qcom: Adjust LTE SKUs for sc7280-villager
arm64: dts: qcom: sc7280-herobrine: Add nodes for onboard USB hub
arm64: dts: qcom: sc7180-trogdor: Add nodes for onboard USB hub
arm64: dts: qcom: align SDHCI reg-names with DT schema
arm64: dts: qcom: sm8250: provide additional MSI interrupts
arm64: dts: qcom: msm8996: add #clock-cells and XO clock to the HDMI PHY node
arm64: dts: qcom: Use WCD9335 DT bindings
arm64: dts: qcom: msm8994: switch TCSR mutex to MMIO
arm64: dts: qcom: ipq6018: switch TCSR mutex to MMIO
...
Link: https://lore.kernel.org/r/20220921234854.1343238-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt
Qualcomm ARM DTS updates for 6.1
This adds extends the IPQ8064 support with the two variants IPQ8062 and
IPQ8065. MSM8974 and APQ8084 gained RPM stats support.
The Audio DSP remoteproc was added to MSM8226 and enabled for ASUS
ZenWatch 2 and LG G Watch R.
MSM8660 gained one I2C and one SPI bus and the APQ8060 Dragonboard got
the TMA340 Touchscreen described.
A wide range of improvements are done throughout the DTS files to align
with bindings, fix issues and improve structure on things.
* tag 'qcom-dts-for-6.1' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (35 commits)
ARM: dts: qcom: apq8026-lg-lenok: Enable ADSP
ARM: dts: qcom: apq8026-asus-sparrow: Enable ADSP
ARM: dts: qcom: msm8226: Add ADSP node
ARM: dts: qcom: ipq8064: pad addresses to 8 digit
ARM: dts: qcom: ipq8064: reorganize node order and sort them
ARM: dts: qcom: align SDHCI clocks with DT schema
ARM: dts: qcom: align SDHCI reg-names with DT schema
ARM: dts: qcom: msm8960: add clocks to the MMCC device node
ARM: dts: qcom: apq8064: add clocks to the MMCC device node
ARM: dts: qcom: msm8960: add clocks to the GCC device node
ARM: dts: qcom: apq8064: add clocks to the GCC device node
ARM: dts: qcom: msm8960: add clocks to the LCC device node
ARM: dts: qcom: apq8064: add clocks to the LCC device node
ARM: dts: qcom: msm8226: switch TCSR mutex to MMIO
ARM: dts: qcom: apq8084: switch TCSR mutex to MMIO
ARM: dts: qcom: msm8660: fix node names for fixed clocks
ARM: dts: qcom: msm8660: add pxo/cxo clocks to the GCC node
ARM: dts: qcom: apq8060-dragonboard: Add TMA340 to APQ8060 DragonBoard
ARM: dts: qcom: msm8660: Add GSBI3 I2C bus
ARM: dts: qcom: msm8660: Add GSBI1 SPI bus
...
Link: https://lore.kernel.org/r/20220921222619.1338380-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into arm/dt
TI K3 device tree updates for v6.1
New Features:
AM62A:
* Basic support for AM62A SoC and SK Board
AM62:
* EPWM support
AM64:
* GPMC, LED, Crypto accelerator support
Fixes:
J7200 pinmux node update
Fixes for Crypto and RNG accelerators on AM65, J721e, J7200
Cleanups:
Reorder SoC compatible and pinmux macros alphabetically
* tag 'ti-k3-dt-for-v6.1' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux: (22 commits)
arm64: dts: ti: k3-j7200: fix main pinmux range
arm64: dts: ti: Add support for AM62A7-SK
arm64: dts: ti: Introduce AM62A7 family of SoCs
dt-bindings: pinctrl: k3: Introduce pinmux definitions for AM62A
dt-bindings: arm: ti: Add bindings for AM62A7 SoC
dt-bindings: arm: ti: Rearrange IOPAD macros alphabetically
arm64: dts: ti: k3-am625-sk: Add epwm nodes
arm64: dts: ti: k3-am62-main: Add epwm nodes
arm64: dts: ti: k3-am642-sk: Add DT entry for onboard LEDs
arm64: dts: ti: k3-j7200-mcu-wakeup: Add SA2UL node
arm64: dts: ti: k3-am65-main: Do not exclusively claim SA2UL
arm64: dts: ti: k3-am65-main: Move SA2UL to unused PSI-L thread ID
arm64: dts: ti: k3-am65-main: Disable RNG node
arm64: dts: ti: k3-j7200-main: Add main domain watchdog entries
arm64: dts: ti: k3-am64-main: Add ELM (Error Location Module) node
arm64: dts: ti: k3-am64-main: Add GPMC memory controller node
arm64: dts: ti: k3-j721e-main: fix RNG node clock id
arm64: dts: ti: k3-am64-main: Enable crypto accelerator
arm64: dts: ti: k3-am64: Add SA2UL address space to Main CBASS ranges
arm64: dts: ti: k3-am64-main: Add main_cpts label
...
Link: https://lore.kernel.org/r/44729b46-27f9-94a0-17ed-8868649a4a0a@ti.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt
Renesas ARM DT updates for v6.1 (take two)
- Merge Renesas ARM/ARM64 maintainers entries,
- CAN support for the RZ/N1 SoC and the RZN1D-DB development board,
- Watchdog, pin control, I2C (EEPROM), GPIO (LEDS/switches), and
Ethernet support for the R-Car V4H SoC and the White Hawk
development board,
- Miscellaneous fixes and improvements.
* tag 'renesas-arm-dt-for-v6.1-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (26 commits)
arm64: dts: renesas: Adjust whitespace around '{'
arm64: dts: renesas: rzg2ul-smarc: Include SoM DTSI into board DTS
arm64: dts: renesas: rzg2ul-smarc-som: Drop enabling wdt2
ARM: dts: renesas: Fix USB PHY device and child node names
arm64: dts: renesas: r8a779a0: Update to R-Car Gen4 compatible values
arm64: dts: renesas: white-hawk-cpu: Add missing bootargs
arm64: dts: renesas: spider-cpu: Add missing bootargs
arm64: dts: renesas: spider: Move aliases and chosen
arm64: dts: renesas: white-hawk-cpu: Add Ethernet support
arm64: dts: renesas: white-hawk: Move aliases and chosen
arm64: dts: renesas: r8a779g0: Add RAVB nodes
arm64: dts: renesas: white-hawk-cpu: Add push switches
arm64: dts: renesas: white-hawk-cpu: Add GP LEDs
arm64: dts: renesas: r8a779g0: Add GPIO nodes
arm64: dts: renesas: white-hawk: Add Ethernet sub-board
arm64: dts: renesas: white-hawk: Add CSI/DSI sub-board
arm64: dts: renesas: white-hawk: Add I2C0 and EEPROMs
arm64: dts: renesas: r8a779g0: Add I2C nodes
arm64: dts: renesas: white-hawk-cpu: Add serial port pin control
arm64: dts: renesas: r8a779g0: Add pinctrl device node
...
Link: https://lore.kernel.org/r/cover.1663588776.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/dt
mt6795:
- add add system timer node
mt7986a:
- add wifi support
mt8183:
- add MDP3 and keypad
mt8186:
- basic support for the Evaluation Board including, i2c, usb and uart.
mt8192:
- add nodes to support PWM, MIPI transciever, display with GCE and DSI.
mt8195:
- disable nodes not used on all boards
- Add support for CPU freq, clocks, power domain controller, spmi, scp.
- Enable audio decoder, DSP, IOMMU, mailbox.
- Add display nodes for vdosys0.
- On Cherry based chromebooks, enable the system companion processor,
Cross EC, Google Security Chip, secondary MMC controller, trackpad and
a few regulators.
* tag 'v6.0-next-dts64' of https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux: (34 commits)
arm64: dts: mediatek: mt6795: Add CPUX system timer node
arm64: dts: mt7986: add built-in Wi-Fi device nodes
arm64: dts: mediatek: cherry: Enable MT6315 regulators on SPMI bus
arm64: dts: mediatek: cherry: Enable Elantech eKTH3000 i2c trackpad
arm64: dts: mediatek: cherry: Enable secondary SD/MMC controller
arm64: dts: mediatek: cherry: Add keyboard mapping for the top row
arm64: dts: mediatek: cherry: Add Google Security Chip (GSC) TPM
arm64: dts: mediatek: cherry: Wire up the ChromeOS Embedded Controller
arm64: dts: mediatek: cherry: Enable the System Companion Processor
arm64: dts: mediatek: Fix build warnings of mt8173 vcodec nodes
arm64: dts: mediatek: Add missing xHCI clocks for mt8192 and mt8195
arm64: dts: mt8192: Add dsi node
arm64: dts: mt8192: Add display nodes
arm64: dts: mediatek: Add mmsys #reset-cells property for mt8192
arm64: dts: mt8192: Add mipi_tx node
arm64: dts: mt8192: Add pwm node
arm64: dts: Add MediaTek MT8186 dts and evaluation board and Makefile
arm64: dts: mt8195: Add display node for vdosys0
arm64: dts: mt8195: Add gce node
arm64: dts: mt8195: Add iommu and smi nodes
...
Link: https://lore.kernel.org/r/3b915692-c8a9-c508-5a4a-0fdb49355e99@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
The DT parser is dependent on the PCI device being tagged as
device_type = "pci" in order to parse memory ranges properly.
Fix this up.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20220919092608.813511-1-linus.walleij@linaro.org'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/dt
- Allwinner A100 DMA node
- Allwinner H6 GPU devfreq scaling
- sunxi sram bindings cleanup and D1 addition
* tag 'sunxi-dt-for-6.1-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
dt-bindings: sram: sunxi-sram: Add D1 compatible string
dt-bindings: sram: sunxi-sram: Clean up the compatible lists
arm64: dts: allwinner: beelink-gs1: Enable GPU OPP
arm64: dts: allwinner: h6: Add GPU OPP table
arm64: dts: allwinner: h6: Add cooling map for GPU
arm64: dts: allwinner: a100: Add I2C DMA requests
arm64: dts: allwinner: a100: Add device node for DMA controller
Link: https://lore.kernel.org/r/YyePKDnOeP8Tdt5n@kista.localdomain
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt
i.MX arm64 device tree change for 6.1:
- New board support: i.MX8DXL EVK, Kontron SL/BL i.MX8MM OSM-S, i.MX8MM
Gateworks GW7904, MSC SM2S-IMX8PLUS SoM and carrier board, NXP
LS2081ARDB.
- Update i.MX8MQ device tree to use generic name 'dma-controller' for
SDMA.
- A number of i.MX8ULP device tree improvements and updates: correct
parent clock of LPI2C & LPSPI, increase the clock speed of LPSPI, add
PMU and mailbox device, drop undocumented CGC property, enable FEC, etc.
- Add interconnect property for various i.MX8MP blk-ctrl devices.
- Enable VPU PGC, blk-ctrl and PCIe support for i.MX8MP SoC.
- A set of changes from Peng Fan to add various devices for i.MX93 SoC,
including MU, blk-ctrl, PMU, LPI2C, LPSPI, SRC, etc.
- Two set of changes to update LS1043A and LS1046A device trees on
various aspects, including USB3, PCIe, DMA, mdio-mux, QSPI Flash, etc.
- Board imx8mq-librem5 update: add USB role switching, add RGB PWM
notification LEDs, add voice coil motor for focus control, fix MIPI_CSI
description.
- A series from Frieder Schrempf to improve imx8mm-kontron device trees
for VSELECT switch, DDRC operating point, SPI NOR partition layout etc.
- A set of display and PMIC related additions and improvements on
imx8mm-verdin board.
- A number of i.MX8M Plus DHCOM PDK2 device tree improvments from Marek
Vasut.
- A few imx8mp-venice device tree updates on USB, cpufreq and WiFi/BT.
- A series from Vladimir Oltean to enable multiple switch CPU ports
support.
- Other small and random board specific updates.
* tag 'imx-dt64-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (90 commits)
arm64: dts: ls1046a-qds: Modify the qspi flash frequency
arm64: dts: ls1046a-qds: add mmio based mdio-mux nodes for FPGA
arm64: dts: ls1046a: add gpios based i2c recovery information
arm64: dts: ls1046a: use a pseudo-bus to constrain usb and sata dma size
arm64: dts: ls1046a: make dma-coherent global to the SoC
arm64: dts: ls1046a: add missing dma ranges property
arm64: dts: ls1046a: Add big-endian property for PCIe nodes
arm64: dts: ls1046a: Add the PME interrupt and big-endian to PCIe EP nodes
arm64: dts: ls1046a: Enable usb3-lpm-capable for usb3 node
arm64: dts: ls1043a-rdb: add pcf85263 rtc node
arm64: dts: ls1043a-qds: add mmio based mdio-mux support
arm64: dts: ls1043a: use a pseudo-bus to constrain usb and sata dma size
arm64: dts: ls1043a: add gpio based i2c recovery information
arm64: dts: ls1043a: make dma-coherent global to the SoC
arm64: dts: ls1043a: add missing dma ranges property
arm64: dts: ls1043a: Add big-endian property for PCIe nodes
arm64: dts: ls1043a: Add SCFG phandle for PCIe nodes
arm64: dts: ls1043a: use pcie aer/pme interrupts
arm64: dts: ls1043a: Enable usb3-lpm-capable for usb3 node
arm64: dts: ls1043a: fix the wrong size of dcfg space
...
Link: https://lore.kernel.org/r/20220918092806.2152700-4-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
https://git.kernel.org/pub/scm/linux/kernel/git/kvms390/linux into HEAD
More pci fixes
Fix for a code analyser warning
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt
i.MX device tree change for 6.1
- A series from Alexander Stein to add missing properties for i.MX6 SRAM.
- Drop 'interrupts' property when 'interrupts-extended' is present. This
fixes a dtbs_check warning with i.MX6 DT.
- Update device trees to use generic name 'dma-controller' for SDMA.
- A set of changes from Krzysztof Kozlowski to align SPI, LED and
gpio-keys node name with dtschema.
- A series of indentation and white-space cleanups from Marcel Ziswiler
to address various checkpatch warnings.
- Add DDR pinmux defines to VF610 DT header.
- A couple of changes from Peng Fan to update clock-names and add IPG
clock for i.MX7ULP LPI2C devices.
- Improve device tree structure for Kontron i.MX6UL/ULL based boards.
- A series of changes from Tim Harvey to add CAN regulator for Gateworks
i.MX6QDL boards.
- Various small and random board specific updates.
* tag 'imx-dt-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (40 commits)
ARM: dts: imx6qdl-gw54xx: add CAN regulator
ARM: dts: imx6qdl-gw53xx: add CAN regulator
ARM: dts: imx6qdl-gw52xx: add CAN regulator
ARM: dts: imx: update sdma node name format
ARM: dts: imx6: skov: migrate to resistive-adc-touch
ARM: dts: imx6sx-udoo-neo: don't use multiple blank lines
ARM: dts: imx6sl: use tabs for code indent
ARM: dts: imx6sx: add missing properties for sram
ARM: dts: imx6sll: add missing properties for sram
ARM: dts: imx6sl: add missing properties for sram
ARM: dts: imx6qp: add missing properties for sram
ARM: dts: imx6dl: add missing properties for sram
ARM: dts: imx6q: add missing properties for sram
ARM: dts: imx7ulp: Add IPG clock for lpi2c
ARM: dts: imx7ulp: update the LPI2C clock-names
ARM: dts: vf610: ddr pinmux
ARM: dts: imx6qdl-dhcom: Move IPU iomux node from PDK2 to SoM file
ARM: dts: imx6ul-kontron: Add imx6ull-kontron-bl to Makefile
ARM: dts: imx6ul-kontron: Simplify devicetree structure
ARM: dts: vf610: align SPI node name with dtschema
...
Link: https://lore.kernel.org/r/20220918092806.2152700-3-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
Use rk gpio naming convention into reset-gpios of ov5695 camera
Signed-off-by: Tommaso Merciai <tommaso.merciai@amarulasolutions.com>
Link: https://lore.kernel.org/r/20220620161321.1898840-4-tommaso.merciai@amarulasolutions.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
|
|
Add right mux for mipi-pdn. Mux this pad as gpio2 14
Signed-off-by: Tommaso Merciai <tommaso.merciai@amarulasolutions.com>
Link: https://lore.kernel.org/r/20220620161321.1898840-3-tommaso.merciai@amarulasolutions.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
|
|
Add max drive-strength for cif_clkout_m0. This fix the issue that
sometimes camera ov5695 is not probed correctly.
Tested on PX30_Mini_EVB_V11_20190507
Signed-off-by: Tommaso Merciai <tommaso.merciai@amarulasolutions.com>
Link: https://lore.kernel.org/r/20220620161321.1898840-2-tommaso.merciai@amarulasolutions.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
|
|
4c and pi4
this patch adds avdd-0v9-supply and avdd-1v8-supply to hdmi node for
Radxa ROCK 4 series.
Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Link: https://lore.kernel.org/r/20220909195006.127957-6-naoki@radxa.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
|
|
sort nodes/properties alphabetically
Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Link: https://lore.kernel.org/r/20220909195006.127957-5-naoki@radxa.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
|
|
fix regulator name
ref:
https://dl.radxa.com/rockpi4/docs/hw/rockpi4/rockpi4_v13_sch_20181112.pdf
Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Link: https://lore.kernel.org/r/20220909195006.127957-4-naoki@radxa.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
|
|
sort nodes/properties alphabetically
Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Link: https://lore.kernel.org/r/20220909195006.127957-3-naoki@radxa.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
|
|
fix regulator name.
also, add vcc_3v3 and vdd_log.
ref:
https://dl.radxa.com/rockpi4/docs/hw/rockpi4/rockpi4c_plus_v12_sch_220304.pdf
Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Link: https://lore.kernel.org/r/20220909195006.127957-2-naoki@radxa.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
|
|
GPIO pins for LEDs on ROCK 4C+ are in APIO5
Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Link: https://lore.kernel.org/r/20220909195006.127957-1-naoki@radxa.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt
arm64: tegra: Device tree changes for v6.1-rc1
These changes enable PCI, Ethernet and HDA support on Jetson AGX Orin.
DMA support is enabled for I2C on a number of SoC generations and the
Google Pixel C (a.k.a. Smaug) device receives Bluetooth and Wi-Fi
support.
Other than that this also contains some minor cleanups and fixes.
* tag 'tegra-for-6.1-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
arm64: tegra: Add GPCDMA support for Tegra I2C
arm64: tegra: Add iommus for HDA on Tegra234
arm64: tegra: Enable HDA node for Jetson AGX Orin
arm64: tegra: Add context isolation domains on Tegra234
arm64: tegra: Fixup iommu-map property formatting
arm64: dts: tegra: smaug: Add Wi-Fi node
arm64: dts: tegra: smaug: Add Bluetooth node
arm64: tegra: Enable MGBE on Jetson AGX Orin Developer Kit
arm64: tegra: Add MGBE nodes on Tegra234
arm64: tegra: Fix up compatible for Tegra234 GPCDMA
arm64: tegra: Enable PCIe slots in P3737-0000 board
arm64: tegra: Add P2U and PCIe controller nodes to Tegra234 DT
arm64: tegra: Add regulators required for PCIe
Link: https://lore.kernel.org/r/20220916101957.1635854-5-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
We introduced uaccess pointer masking for arm64 in commit:
4d8efc2d5ee4c9cc ("arm64: Use pointer masking to limit uaccess speculation")
Which was intended to prevent speculative uaccesses to kernel memory on
CPUs where access permissions were not respected under speculation.
At the time, the uaccess primitives were occasionally used to access
kernel memory, with the maximum permitted address held in
thread_info::addr_limit. Consequently, the address masking needed to
take this dynamic limit into account.
Subsequently the uaccess primitives were reworked such that they are
only used for user memory, and as of commit:
3d2403fd10a1dbb3 ("arm64: uaccess: remove set_fs()")
... the address limit was made a compile-time constant, but the logic
was otherwise unchanged.
Regardless of the configured VA size or whether TBI is in use, the
address space can be divided into three ranges:
* The TTBR0 VA range, for which any valid pointer has bit 55 *clear*,
and any non-tag bits [63-56] must match bit 55 (i.e. must be clear).
* The TTBR1 VA range, for which any valid pointer has bit 55 *set*, and
any non-tag bits [63-56] must match bit 55 (i.e. must be set).
* The gap between the TTBR0 and TTBR1 ranges, where bit 55 may be set or
clear, but any access will result in a fault.
As the uaccess primitives are now only used for user memory in the TTBR0
VA range, we can prevent generation of TTBR1 addresses by clearing bit
55, which will either result in a TTBR0 address or a faulting address
between the TTBR VA ranges.
This is beneficial for code generation as:
* We no longer clobber the condition codes.
* We no longer burn a register on (TASK_SIZE_MAX - 1).
* We no longer need to consume the untagged pointer.
When building a defconfig v6.0-rc3 with GCC 12.1.0, this change makes
the resulting Image 64KiB smaller.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Cc: James Morse <james.morse@arm.com>
Cc: Robin Murphy <robin.murphy@arm.com>
Cc: Will Deacon <will@kernel.org>
Reviewed-by: Robin Murphy <robin.murphy@arm.com>
Link: https://lore.kernel.org/r/20220922151053.3520750-1-mark.rutland@arm.com
[catalin.marinas@arm.com: remove csdb() as the bit clearing is unconditional]
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/fixes
Two fixes for omaps
A fix to remove usb4 from am5748 as it does not exist on the SoC, and
a fix for am335x mmc dma that wired direct and should not use the xbar.
Note that the am5748 fix depends on the recent deferred probe regression
fixes to boot. I ended up picking the merge commit to base it on as it
describes what got fixed quite nicely rather than a -rc tag.
* tag 'omap-for-6.0/fixes-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: am5748: keep usb4_tm disabled
ARM: dts: am33xx: Fix MMCHS0 dma properties
Link: https://lore.kernel.org/r/pull-1663140667-273537@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
resctrl_arch_rmid_read() returns a value in chunks, as read from the
hardware. This needs scaling to bytes by mon_scale, as provided by
the architecture code.
Now that resctrl_arch_rmid_read() performs the overflow and corrections
itself, it may as well return a value in bytes directly. This allows
the accesses to the architecture specific 'hw' structure to be removed.
Move the mon_scale conversion into resctrl_arch_rmid_read().
mbm_bw_count() is updated to calculate bandwidth from bytes.
Signed-off-by: James Morse <james.morse@arm.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Reviewed-by: Jamie Iles <quic_jiles@quicinc.com>
Reviewed-by: Shaopeng Tan <tan.shaopeng@fujitsu.com>
Reviewed-by: Reinette Chatre <reinette.chatre@intel.com>
Tested-by: Xin Hao <xhao@linux.alibaba.com>
Tested-by: Shaopeng Tan <tan.shaopeng@fujitsu.com>
Tested-by: Cristian Marussi <cristian.marussi@arm.com>
Link: https://lore.kernel.org/r/20220902154829.30399-22-james.morse@arm.com
|
|
resctrl_rmid_realloc_threshold can be set by user-space. The maximum
value is specified by the architecture.
Currently max_threshold_occ_write() reads the maximum value from
boot_cpu_data.x86_cache_size, which is not portable to another
architecture.
Add resctrl_rmid_realloc_limit to describe the maximum size in bytes
that user-space can set the threshold to.
Signed-off-by: James Morse <james.morse@arm.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Reviewed-by: Jamie Iles <quic_jiles@quicinc.com>
Reviewed-by: Shaopeng Tan <tan.shaopeng@fujitsu.com>
Reviewed-by: Reinette Chatre <reinette.chatre@intel.com>
Tested-by: Xin Hao <xhao@linux.alibaba.com>
Tested-by: Shaopeng Tan <tan.shaopeng@fujitsu.com>
Tested-by: Cristian Marussi <cristian.marussi@arm.com>
Link: https://lore.kernel.org/r/20220902154829.30399-21-james.morse@arm.com
|
|
resctrl_cqm_threshold is stored in a hardware specific chunk size,
but exposed to user-space as bytes.
This means the filesystem parts of resctrl need to know how the hardware
counts, to convert the user provided byte value to chunks. The interface
between the architecture's resctrl code and the filesystem ought to
treat everything as bytes.
Change the unit of resctrl_cqm_threshold to bytes. resctrl_arch_rmid_read()
still returns its value in chunks, so this needs converting to bytes.
As all the users have been touched, rename the variable to
resctrl_rmid_realloc_threshold, which describes what the value is for.
Neither r->num_rmid nor hw_res->mon_scale are guaranteed to be a power
of 2, so the existing code introduces a rounding error from resctrl's
theoretical fraction of the cache usage. This behaviour is kept as it
ensures the user visible value matches the value read from hardware
when the rmid will be reallocated.
Signed-off-by: James Morse <james.morse@arm.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Reviewed-by: Jamie Iles <quic_jiles@quicinc.com>
Reviewed-by: Shaopeng Tan <tan.shaopeng@fujitsu.com>
Reviewed-by: Reinette Chatre <reinette.chatre@intel.com>
Tested-by: Xin Hao <xhao@linux.alibaba.com>
Tested-by: Shaopeng Tan <tan.shaopeng@fujitsu.com>
Tested-by: Cristian Marussi <cristian.marussi@arm.com>
Link: https://lore.kernel.org/r/20220902154829.30399-20-james.morse@arm.com
|
|
resctrl_arch_rmid_read() is intended as the function that an
architecture agnostic resctrl filesystem driver can use to
read a value in bytes from a counter. Currently the function returns
the MBM values in chunks directly from hardware. When reading a bandwidth
counter, get_corrected_mbm_count() must be used to correct the
value read.
get_corrected_mbm_count() is architecture specific, this work should be
done in resctrl_arch_rmid_read().
Move the function calls. This allows the resctrl filesystems's chunks
value to be removed in favour of the architecture private version.
Signed-off-by: James Morse <james.morse@arm.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Reviewed-by: Jamie Iles <quic_jiles@quicinc.com>
Reviewed-by: Shaopeng Tan <tan.shaopeng@fujitsu.com>
Reviewed-by: Reinette Chatre <reinette.chatre@intel.com>
Tested-by: Xin Hao <xhao@linux.alibaba.com>
Tested-by: Shaopeng Tan <tan.shaopeng@fujitsu.com>
Tested-by: Cristian Marussi <cristian.marussi@arm.com>
Link: https://lore.kernel.org/r/20220902154829.30399-19-james.morse@arm.com
|
|
resctrl_arch_rmid_read() is intended as the function that an
architecture agnostic resctrl filesystem driver can use to
read a value in bytes from a counter. Currently the function returns
the MBM values in chunks directly from hardware. When reading a bandwidth
counter, mbm_overflow_count() must be used to correct for any possible
overflow.
mbm_overflow_count() is architecture specific, its behaviour should
be part of resctrl_arch_rmid_read().
Move the mbm_overflow_count() calls into resctrl_arch_rmid_read().
This allows the resctrl filesystems's prev_msr to be removed in
favour of the architecture private version.
Signed-off-by: James Morse <james.morse@arm.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Reviewed-by: Jamie Iles <quic_jiles@quicinc.com>
Reviewed-by: Shaopeng Tan <tan.shaopeng@fujitsu.com>
Reviewed-by: Reinette Chatre <reinette.chatre@intel.com>
Tested-by: Xin Hao <xhao@linux.alibaba.com>
Tested-by: Shaopeng Tan <tan.shaopeng@fujitsu.com>
Tested-by: Cristian Marussi <cristian.marussi@arm.com>
Link: https://lore.kernel.org/r/20220902154829.30399-18-james.morse@arm.com
|
|
resctrl_arch_rmid_read() is intended as the function that an
architecture agnostic resctrl filesystem driver can use to
read a value in bytes from a hardware register. Currently the function
returns the MBM values in chunks directly from hardware.
To convert this to bytes, some correction and overflow calculations
are needed. These depend on the resource and domain structures.
Overflow detection requires the old chunks value. None of this
is available to resctrl_arch_rmid_read(). MPAM requires the
resource and domain structures to find the MMIO device that holds
the registers.
Pass the resource and domain to resctrl_arch_rmid_read(). This makes
rmid_dirty() too big. Instead merge it with its only caller, and the
name is kept as a local variable.
Signed-off-by: James Morse <james.morse@arm.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Reviewed-by: Jamie Iles <quic_jiles@quicinc.com>
Reviewed-by: Shaopeng Tan <tan.shaopeng@fujitsu.com>
Reviewed-by: Reinette Chatre <reinette.chatre@intel.com>
Tested-by: Xin Hao <xhao@linux.alibaba.com>
Tested-by: Shaopeng Tan <tan.shaopeng@fujitsu.com>
Tested-by: Cristian Marussi <cristian.marussi@arm.com>
Link: https://lore.kernel.org/r/20220902154829.30399-17-james.morse@arm.com
|
|
Fix kconfig dependency warnings and subsequent build errors:
WARNING: unmet direct dependencies detected for SERIAL_SUNPLUS
Depends on [n]: TTY [=n] && HAS_IOMEM [=y] && (ARCH_SUNPLUS [=y] || COMPILE_TEST [=n])
Selected by [y]:
- SOC_SP7021 [=y] && ARCH_SUNPLUS [=y]
WARNING: unmet direct dependencies detected for SERIAL_SUNPLUS_CONSOLE
Depends on [n]: TTY [=n] && HAS_IOMEM [=y] && SERIAL_SUNPLUS [=y]
Selected by [y]:
- SOC_SP7021 [=y] && ARCH_SUNPLUS [=y]
(samples, not all:)
drivers/tty/serial/sunplus-uart.c:342: undefined reference to `uart_get_baud_rate'
arm-linux-gnueabi-ld: drivers/tty/serial/sunplus-uart.c:379: undefined reference to `uart_update_timeout'
drivers/tty/serial/sunplus-uart.c:526: undefined reference to `uart_console_write'
arm-linux-gnueabi-ld: drivers/tty/serial/sunplus-uart.c:274: undefined reference to `tty_flip_buffer_push'
arm-linux-gnueabi-ld: drivers/tty/serial/sunplus-uart.o:(.data+0xa8): undefined reference to `uart_console_device'
drivers/tty/serial/sunplus-uart.c:720: undefined reference to `uart_register_driver'
arm-linux-gnueabi-ld: drivers/tty/serial/sunplus-uart.c:726: undefined reference to `uart_unregister_driver'
drivers/tty/serial/sunplus-uart.c:551: undefined reference to `uart_parse_options'
arm-linux-gnueabi-ld: drivers/tty/serial/sunplus-uart.c:553: undefined reference to `uart_set_options'
This is the same technique that is used 2 times in
arch/arm/mach-versatile/Kconfig.
Fixes: 0aa94eea8d95 ("ARM: sunplus: Add initial support for Sunplus SP7021 SoC")
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Cc: Qin Jian <qinjian@cqplus1.com>
Cc: Necip Fazil Yildiran <fazilyildiran@gmail.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: linux-arm-kernel@lists.infradead.org
Cc: patches@armlinux.org.uk
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
__rmid_read() selects the specified eventid and returns the counter
value from the MSR. The error handling is architecture specific, and
handled by the callers, rdtgroup_mondata_show() and __mon_event_count().
Error handling should be handled by architecture specific code, as
a different architecture may have different requirements. MPAM's
counters can report that they are 'not ready', requiring a second
read after a short delay. This should be hidden from resctrl.
Make __rmid_read() the architecture specific function for reading
a counter. Rename it resctrl_arch_rmid_read() and move the error
handling into it.
A read from a counter that hardware supports but resctrl does not
now returns -EINVAL instead of -EIO from the default case in
__mon_event_count(). It isn't possible for user-space to see this
change as resctrl doesn't expose counters it doesn't support.
Signed-off-by: James Morse <james.morse@arm.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Reviewed-by: Jamie Iles <quic_jiles@quicinc.com>
Reviewed-by: Shaopeng Tan <tan.shaopeng@fujitsu.com>
Reviewed-by: Reinette Chatre <reinette.chatre@intel.com>
Tested-by: Xin Hao <xhao@linux.alibaba.com>
Tested-by: Shaopeng Tan <tan.shaopeng@fujitsu.com>
Tested-by: Cristian Marussi <cristian.marussi@arm.com>
Link: https://lore.kernel.org/r/20220902154829.30399-16-james.morse@arm.com
|
|
In preparation for reducing the use of ksize(), record the actual
allocation size for later memcpy(). This avoids copying extra
(uninitialized!) bytes into the patch buffer when the requested
allocation size isn't exactly the size of a kmalloc bucket.
Additionally, fix potential future issues where runtime bounds checking
will notice that the buffer was allocated to a smaller value than
returned by ksize().
Fixes: 757885e94a22 ("x86, microcode, amd: Early microcode patch loading support for AMD")
Suggested-by: Daniel Micay <danielmicay@gmail.com>
Signed-off-by: Kees Cook <keescook@chromium.org>
Signed-off-by: Borislav Petkov <bp@suse.de>
Link: https://lore.kernel.org/lkml/CA+DvKQ+bp7Y7gmaVhacjv9uF6Ar-o4tet872h4Q8RPYPJjcJQA@mail.gmail.com/
|
|
To abstract the rmid counters into a helper that returns the number
of bytes counted, architecture specific per-rmid state is needed.
It needs to be possible to reset this hidden state, as the values
may outlive the life of an rmid, or the mount time of the filesystem.
mon_event_read() is called with first = true when an rmid is first
allocated in mkdir_mondata_subdir(). Add resctrl_arch_reset_rmid()
and call it from __mon_event_count()'s rr->first check.
Signed-off-by: James Morse <james.morse@arm.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Reviewed-by: Jamie Iles <quic_jiles@quicinc.com>
Reviewed-by: Shaopeng Tan <tan.shaopeng@fujitsu.com>
Reviewed-by: Reinette Chatre <reinette.chatre@intel.com>
Tested-by: Xin Hao <xhao@linux.alibaba.com>
Tested-by: Shaopeng Tan <tan.shaopeng@fujitsu.com>
Tested-by: Cristian Marussi <cristian.marussi@arm.com>
Link: https://lore.kernel.org/r/20220902154829.30399-15-james.morse@arm.com
|
|
This adds the DSI controller nodes and DSI-DPHY controller nodes to the
rk356x device tree.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Acked-by: Michael Riesch <michael.riesch@wolfvision.net>
Link: https://lore.kernel.org/r/20220919164616.12492-4-macroalpha82@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
|
|
This enables the GPU and HDMI output (including HDMI audio) on
the PINE64 Quartz64 Model B single board computer.
Signed-off-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
Link: https://lore.kernel.org/r/20220920143446.633956-1-frattaroli.nicolas@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
|
|
Add the missing LEDs for GB-PC2. The ethblack-green, ethblue-green, power
and system LEDs weren't added previously, because they don't exist on the
device schematics. Tests on a GB-PC2 by me and Petr proved otherwise.
The i2c bus cannot be used on GB-PC2 as its pins are wired to LEDs instead,
and GB-PC1 does not use it. Therefore, do not enable it on both devices.
Link: https://github.com/ngiger/GnuBee_Docs/blob/master/GB-PCx/Documents/GB-PC2_V1.1_schematic.pdf
Tested-by: Petr Louda <petr.louda@outlook.cz>
Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
Reviewed-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
|
|
The address of the external phy on the mdio bus is 5. Update the devicetree
for GB-PC2 accordingly.
Fixes: 5bc148649cf3 ("staging: mt7621-dts: fix GB-PC2 devicetree")
Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
Reviewed-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
|
|
In the case of muxing phy0 of the MT7530 switch, the switch and the phy
will have the same address on the mdio bus, 0. This causes the ethernet
driver to fail since devices on the mdio bus cannot share an address.
Any address can be used for the switch, therefore, change the switch
address to 0x1f.
Suggested-by: Sungbo Eo <mans0n@gorani.run>
Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
Reviewed-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
|
|
Change phy-mode of gmac1 to rgmii on mt7621.dtsi. Same code path is
followed for delayed rgmii and rgmii phy-mode on mtk_eth_soc.c.
Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
Reviewed-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
|
|
The interrupt-parent property is inherited from the ethernet node as it's a
parent node of the switch node. Therefore, remove the unnecessary
interrupt-parent property from the switch node.
Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
Reviewed-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
|
|
Fix the dtc warnings below.
uartlite@c00: $nodename:0: 'uartlite@c00' does not match '^serial(@.*)?$'
From schema: /home/arinc9/Documents/linux/Documentation/devicetree/bindings/serial/8250.yaml
uartlite@c00: Unevaluated properties are not allowed ('clock-names' was unexpected)
From schema: /home/arinc9/Documents/linux/Documentation/devicetree/bindings/serial/8250.yaml
sdhci@1e130000: $nodename:0: 'sdhci@1e130000' does not match '^mmc(@.*)?$'
From schema: /home/arinc9/Documents/linux/Documentation/devicetree/bindings/mmc/mtk-sd.yaml
xhci@1e1c0000: $nodename:0: 'xhci@1e1c0000' does not match '^usb(@.*)?'
From schema: /home/arinc9/Documents/linux/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml
xhci@1e1c0000: compatible: ['mediatek,mt8173-xhci'] is too short
From schema: /home/arinc9/Documents/linux/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml
switch0@0: $nodename:0: 'switch0@0' does not match '^(ethernet-)?switch(@.*)?$'
From schema: /home/arinc9/Documents/linux/Documentation/devicetree/bindings/net/dsa/mediatek,mt7530.yaml
port@1: status:0: 'off' is not one of ['okay', 'disabled', 'reserved']
From schema: /home/arinc9/.local/lib/python3.10/site-packages/dtschema/schemas/dt-core.yaml
port@2: status:0: 'off' is not one of ['okay', 'disabled', 'reserved']
From schema: /home/arinc9/.local/lib/python3.10/site-packages/dtschema/schemas/dt-core.yaml
port@3: status:0: 'off' is not one of ['okay', 'disabled', 'reserved']
From schema: /home/arinc9/.local/lib/python3.10/site-packages/dtschema/schemas/dt-core.yaml
- Change "memc: syscon@5000" to "memc: memory-controller@5000".
- Change "uartlite: uartlite@c00" to "serial0: serial@c00" and remove the
aliases node.
- Remove "clock-names" from the serial0 node. The property doesn't exist on
the 8250.yaml schema.
- Change "sdhci: sdhci@1e130000" to "mmc: mmc@1e130000".
- Change "xhci: xhci@1e1c0000" to "usb: usb@1e1c0000".
- Add "mediatek,mtk-xhci" as the second compatible string on the usb node.
- Change "switch0: switch0@0" to "switch0: switch@0"
- Change "off" to "disabled" for disabled nodes.
Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
Reviewed-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
|
|
Enable the driver SDHCI support for the Synopsys DWC MSHC
controller which can be found on Rockchip 356x SoCs.
Cc: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Anand Moon <linux.amoon@gmail.com>
Link: https://lore.kernel.org/r/20220922192050.2031-1-linux.amoon@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
|
|
An arm64 'allmodconfig' build fails with GCC due to use of a C++-style
comment for the new SVE vector granule 'enum perf_event_arm_regs' entry:
| /usr/include/asm/perf_regs.h:42:26: error: C++ style comments are not allowed in ISO C90
Use good ol' /* */ comment syntax to keep things rosey.
Link: https://lore.kernel.org/r/632cceb2.170a0220.599ec.0a3a@mx.google.com
Fixes: cbb0c02caf4b ("perf: arm64: Add SVE vector granule register to user regs")
Signed-off-by: Will Deacon <will@kernel.org>
|
|
Inject #UD when emulating XSETBV if CR4.OSXSAVE is not set. This also
covers the "XSAVE not supported" check, as setting CR4.OSXSAVE=1 #GPs if
XSAVE is not supported (and userspace gets to keep the pieces if it
forces incoherent vCPU state).
Add a comment to kvm_emulate_xsetbv() to call out that the CPU checks
CR4.OSXSAVE before checking for intercepts. AMD'S APM implies that #UD
has priority (says that intercepts are checked before #GP exceptions),
while Intel's SDM says nothing about interception priority. However,
testing on hardware shows that both AMD and Intel CPUs prioritize the #UD
over interception.
Fixes: 02d4160fbd76 ("x86: KVM: add xsetbv to the emulator")
Cc: stable@vger.kernel.org
Cc: Vitaly Kuznetsov <vkuznets@redhat.com>
Signed-off-by: Sean Christopherson <seanjc@google.com>
Message-Id: <20220824033057.3576315-4-seanjc@google.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
|
|
Allow FP and SSE state to be saved and restored via KVM_{G,SET}_XSAVE on
XSAVE-capable hosts even if their bits are not exposed to the guest via
XCR0.
Failing to allow FP+SSE first showed up as a QEMU live migration failure,
where migrating a VM from a pre-XSAVE host, e.g. Nehalem, to an XSAVE
host failed due to KVM rejecting KVM_SET_XSAVE. However, the bug also
causes problems even when migrating between XSAVE-capable hosts as
KVM_GET_SAVE won't set any bits in user_xfeatures if XSAVE isn't exposed
to the guest, i.e. KVM will fail to actually migrate FP+SSE.
Because KVM_{G,S}ET_XSAVE are designed to allowing migrating between
hosts with and without XSAVE, KVM_GET_XSAVE on a non-XSAVE (by way of
fpu_copy_guest_fpstate_to_uabi()) always sets the FP+SSE bits in the
header so that KVM_SET_XSAVE will work even if the new host supports
XSAVE.
Fixes: ad856280ddea ("x86/kvm/fpu: Limit guest user_xfeatures to supported bits of XCR0")
bz: https://bugzilla.redhat.com/show_bug.cgi?id=2079311
Cc: stable@vger.kernel.org
Cc: Leonardo Bras <leobras@redhat.com>
Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
[sean: add comment, massage changelog]
Signed-off-by: Sean Christopherson <seanjc@google.com>
Message-Id: <20220824033057.3576315-3-seanjc@google.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
|
|
Reinstate the per-vCPU guest_supported_xcr0 by partially reverting
commit 988896bb6182; the implicit assessment that guest_supported_xcr0 is
always the same as guest_fpu.fpstate->user_xfeatures was incorrect.
kvm_vcpu_after_set_cpuid() isn't the only place that sets user_xfeatures,
as user_xfeatures is set to fpu_user_cfg.default_features when guest_fpu
is allocated via fpu_alloc_guest_fpstate() => __fpstate_reset().
guest_supported_xcr0 on the other hand is zero-allocated. If userspace
never invokes KVM_SET_CPUID2, supported XCR0 will be '0', whereas the
allowed user XFEATURES will be non-zero.
Practically speaking, the edge case likely doesn't matter as no sane
userspace will live migrate a VM without ever doing KVM_SET_CPUID2. The
primary motivation is to prepare for KVM intentionally and explicitly
setting bits in user_xfeatures that are not set in guest_supported_xcr0.
Because KVM_{G,S}ET_XSAVE can be used to svae/restore FP+SSE state even
if the host doesn't support XSAVE, KVM needs to set the FP+SSE bits in
user_xfeatures even if they're not allowed in XCR0, e.g. because XCR0
isn't exposed to the guest. At that point, the simplest fix is to track
the two things separately (allowed save/restore vs. allowed XCR0).
Fixes: 988896bb6182 ("x86/kvm/fpu: Remove kvm_vcpu_arch.guest_supported_xcr0")
Cc: stable@vger.kernel.org
Cc: Leonardo Bras <leobras@redhat.com>
Signed-off-by: Sean Christopherson <seanjc@google.com>
Message-Id: <20220824033057.3576315-2-seanjc@google.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
|
|
The update to statistic max_mmu_rmap_size is unintentionally removed by
commit 4293ddb788c1 ("KVM: x86/mmu: Remove redundant spte present check
in mmu_set_spte"). Add missing update to it or max_mmu_rmap_size will
always be nonsensical 0.
Fixes: 4293ddb788c1 ("KVM: x86/mmu: Remove redundant spte present check in mmu_set_spte")
Signed-off-by: Miaohe Lin <linmiaohe@huawei.com>
Message-Id: <20220907080657.42898-1-linmiaohe@huawei.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into HEAD
KVM/arm64 fixes for 6.0, take #2
- Fix kmemleak usage in Protected KVM (again)
|
|
drivers/net/ethernet/freescale/fec.h
7b15515fc1ca ("Revert "fec: Restart PPS after link state change"")
40c79ce13b03 ("net: fec: add stop mode support for imx8 platform")
https://lore.kernel.org/all/20220921105337.62b41047@canb.auug.org.au/
drivers/pinctrl/pinctrl-ocelot.c
c297561bc98a ("pinctrl: ocelot: Fix interrupt controller")
181f604b33cd ("pinctrl: ocelot: add ability to be used in a non-mmio configuration")
https://lore.kernel.org/all/20220921110032.7cd28114@canb.auug.org.au/
tools/testing/selftests/drivers/net/bonding/Makefile
bbb774d921e2 ("net: Add tests for bonding and team address list management")
152e8ec77640 ("selftests/bonding: add a test for bonding lladdr target")
https://lore.kernel.org/all/20220921110437.5b7dbd82@canb.auug.org.au/
drivers/net/can/usb/gs_usb.c
5440428b3da6 ("can: gs_usb: gs_can_open(): fix race dev->can.state condition")
45dfa45f52e6 ("can: gs_usb: add RX and TX hardware timestamp support")
https://lore.kernel.org/all/84f45a7d-92b6-4dc5-d7a1-072152fab6ff@tessares.net/
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC fixes from Arnd Bergmann:
"Another set of fixes for fixes for the soc tree:
- A fix for the interrupt number on at91/lan966 ethernet PHYs
- A second round of fixes for NXP i.MX series, including a couple of
build issues, and board specific DT corrections on TQMa8MPQL,
imx8mp-venice-gw74xx and imx8mm-verdin for reliability and
partially broken functionality
- Several fixes for Rockchip SoCs, addressing a USB issue on
BPI-R2-Pro, wakeup on Gru-Bob and reliability of high-speed SD
cards, among other minor issues
- A fix for a long-running naming mistake that prevented the moxart
mmc driver from working at all
- Multiple Arm SCMI firmware fixes for hardening some corner cases"
* tag 'soc-fixes-6.0-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (30 commits)
arm64: dts: imx8mp-venice-gw74xx: fix port/phy validation
ARM: dts: lan966x: Fix the interrupt number for internal PHYs
arm64: dts: imx8mp-venice-gw74xx: fix ksz9477 cpu port
arm64: dts: imx8mp-venice-gw74xx: fix CAN STBY polarity
dt-bindings: memory-controllers: fsl,imx8m-ddrc: drop Leonard Crestez
arm64: dts: tqma8mqml: Include phy-imx8-pcie.h header
arm64: defconfig: enable ARCH_NXP
arm64: dts: imx8mp-tqma8mpql-mba8mpxl: add missing pinctrl for RTC alarm
ARM: dts: fix Moxa SDIO 'compatible', remove 'sdhci' misnomer
arm64: dts: imx8mm-verdin: extend pmic voltages
arm64: dts: rockchip: Remove 'enable-active-low' from rk3566-quartz64-a
arm64: dts: rockchip: Remove 'enable-active-low' from rk3399-puma
arm64: dts: rockchip: fix property for usb2 phy supply on rk3568-evb1-v10
arm64: dts: rockchip: fix property for usb2 phy supply on rock-3a
arm64: dts: imx8ulp: add #reset-cells for pcc
arm64: dts: tqma8mpxl-ba8mpxl: Fix button GPIOs
arm64: dts: imx8mn: remove GPU power domain reset
arm64: dts: rockchip: Set RK3399-Gru PCLK_EDP to 24 MHz
arm64: dts: imx8mm: Reverse CPLD_Dn GPIO label mapping on MX8Menlo
arm64: dts: rockchip: fix upper usb port on BPI-R2-Pro
...
|
|
If FEAT_MTE2 is disabled via the arm64.nomte command line argument on a
CPU that claims to support FEAT_MTE2, the kernel will use Tagged Normal
in the MAIR. If we interpret arm64.nomte to mean that the CPU does not
in fact implement FEAT_MTE2, setting the system register like this may
lead to UNSPECIFIED behavior. Fix it by arranging for MAIR to be set
in the C function cpu_enable_mte which is called based on the sanitized
version of the system register.
There is no need for the rest of the MTE-related system register
initialization to happen from assembly, with the exception of TCR_EL1,
which must be set to include at least TBI1 because the secondary CPUs
access KASan-allocated data structures early. Therefore, make the TCR_EL1
initialization unconditional and move the rest of the initialization to
cpu_enable_mte so that we no longer have a dependency on the unsanitized
ID register value.
Co-developed-by: Evgenii Stepanov <eugenis@google.com>
Signed-off-by: Peter Collingbourne <pcc@google.com>
Signed-off-by: Evgenii Stepanov <eugenis@google.com>
Suggested-by: Catalin Marinas <catalin.marinas@arm.com>
Reported-by: kernel test robot <lkp@intel.com>
Fixes: 3b714d24ef17 ("arm64: mte: CPU feature detection and initial sysreg configuration")
Cc: <stable@vger.kernel.org> # 5.10.x
Link: https://lore.kernel.org/r/20220915222053.3484231-1-eugenis@google.com
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
|
