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2016-05-13MIPS: Octeon: Add DTS for D-Link DSR-1000NAaro Koskinen
Add DTS for D-Link DSR-1000N that is usable as is without any "pruning" with APPENDED_DTB. Split out the common parts from octeon_3xxx.dts into octeon_3xxx.dtsi. Compared to builtin generic DTB, we can specificy fixed links properly and avoid probing non-existent I2C devices. Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: David Daney <ddaney.cavm@gmail.com> Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/12840/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-05-13MIPS: panic immediately when panic_on_oopsAaro Koskinen
MIPS wants to sleep 5 seconds before panicking when panic_on_oops is set, with no apparent reason. Remove this feature, since some users may want their systems to fail as quickly as possible. Users who want to delay reboot after panic can use PANIC_TIMEOUT. Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: James E.J. Bottomley <jejb@parisc-linux.org> Cc: Helge Deller <deller@gmx.de> Cc: linux-mips@linux-mips.org Cc: linux-parisc@vger.kernel.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/12845/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-05-13MIPS: BCM47xx: Move SPROM driver to drivers/firmware/Rafał Miłecki
Broadcom ARM home routers store SPROM content in NVRAM just like MIPS ones. To share SPROM code we need to move it out of arch/mips/ to some common place. We already have bcm47xx_nvram in firmware path and SPROM should fit there as well. This driver is responsible for parsing SoC configuration data into a struct shared between ssb and bcma buses. This was tested with BCM4706 & BCM5357C0 (BCM47XX) and BCM4708A0 (ARCH_BCM_5301X). Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Cc: Hauke Mehrtens <hauke@hauke-m.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/12210/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-05-13MIPS: ralink: Make reset_control_ops constPhilipp Zabel
The reset_ops structure is never modified. Make it const. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: John Crispin <john@phrozen.org> Cc: linux-mips@linux-mips.org Cc: kernel@pengutronix.de Patchwork: https://patchwork.linux-mips.org/patch/12618/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-05-13MIPS: lantiq: Make reset_control_ops constPhilipp Zabel
The reset_ops structure is never modified. Make it const. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: John Crispin <john@phrozen.org> Cc: linux-mips@linux-mips.org Cc: kernel@pengutronix.de Patchwork: https://patchwork.linux-mips.org/patch/12619/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-05-13MIPS: Octeon: device_tree_init: fill mac addresses when using appended dtbAaro Koskinen
Fill MAC addresses from bootinfo when using appended DTB. Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi> Acked-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/12590/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-05-13MIPS: Octeon: device_tree_init: don't fill mac if already setAaro Koskinen
Don't fill MAC address if it's already set. This allows DTB to override the bootinfo. Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi> Acked-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/12589/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-05-13MIPS: Octeon: device_tree_init: use separate pass to fill mac addressesAaro Koskinen
Use separate pass to fill MAC addresses. This is needed because we want to do this also for the appended DTB. Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi> Acked-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/12588/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-05-13MIPS: Octeon: Use model string from DTB for unknown board typeAaro Koskinen
Use model string from DTB for board type if the board is unknown. This is more informative, e.g. with EdgeRouter Pro the /proc/cpuinfo will display "ubnt,e200 (CN6120p1.1-1000-NSP)" instead of misleading "Unsupported Board". Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: David Daney <ddaney.cavm@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/12582/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-05-13MIPS: Octeon: Initialize system type string after device tree init.Aaro Koskinen
Initialize system type string after device tree init. Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: David Daney <ddaney.cavm@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/12583/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-05-13MIPS: Octeon: board_type_to_string: return NULL for unsupported boardAaro Koskinen
Return NULL for unsupported board. Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: David Daney <ddaney.cavm@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/12581/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-05-13MIPS: OCTEON: Simplify code in octeon_irq_ciu_gpio_set_type()David Daney
Use the trigger type passed in to the function instead of reading it back out of the irq_data. Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/12501/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-05-13MIPS: OCTEON: Add SMP support for OCTEON cn78xx et al.David Daney
OCTEON chips with the CIU3 interrupt controller use a different IPI mechanism that previous models. Add plat_smp_ops for the cn78xx and probing code to choose between the two types of ops. Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/12499/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-05-13MIPS: OCTEON: Add support for OCTEON III interrupt controller.David Daney
Add irq_chip support for both IPI and "normal" interrupts of the CIU3 controller. Document the device tree binding for the CIU3. Some functions are non-static as they will be used by follow-on support for MSI-X. Signed-off-by: David Daney <david.daney@cavium.com> Acked-by: Rob Herring <robh@kernel.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Cc: devicetree@vger.kernel.org Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/12500/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-05-13MIPS: OCTEON: Don't attempt to use nonexistent registers on OCTEON III models.David Daney
Attempts to read the nonexistent registers results in bus errors. Either use registers that exist, or don't do the access as appropriate. Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/12502/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-05-13MIPS: OCTEON: Add model checking support for cn73xx, cnf75xx and cn78xxDavid Daney
Follow on patchs need to be able to distinguish the new models. Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/12498/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-05-13MIPS: OCTEON: Add register definitions for cn73xx, cnf75xx and cn78xx.David Daney
These new members of the OCTEON III family have some new registers, update some of the definitions for use in follow on patches. Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/12497/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-05-13MIPS: Select CONFIG_HANDLE_DOMAIN_IRQ and make it work.David Daney
Per the subject, always select HANDLE_DOMAIN_IRQ, and implement set_irq_regs() so that it actually works. Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/12496/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-05-13MIPS: OCTEON: Remove some code limiting NR_IRQS to 255David Daney
Follow-on patches for OCTEON III will increase the number of irqs to potentially more than 256. Increase the width of the octeon_irq_ciu_to_irq to int to be able to handle this case. Remove the hacky code that verified that u8 would not be overflowed. Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/12495/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-05-13MIPS: OCTEON: Extend number of supported CPUs past 32David Daney
To support more than 48 CPUs, the bootinfo structure grows a new coremask structure. Add the definition of the structure and add it to struct cvmx_bootinfo. In prom_init(), copy the new coremask data into the sysinfo structure, and use it in smp_setup(). Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/12319/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-05-13MIPS: OCTEON: Remove dead code from cvmx-sysinfo.David Daney
Get rid of the long unused code. Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/12318/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-05-13MIPS: Add CPU identifiers and probing for Cavium CN73xx and CNF75xx processors.David Daney
Add new processor identifiers for Cavium CN73xx and CNF75xx processors, and probe for them in cpu-probe.c Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/12311/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-05-13MIPS: highmem: Turn flush_cache_kmaps into a no-op.Ralf Baechle
It was calling flush_cache_all() which is a no-op since a long time anyway and which was overkill in the old days when it was actually doing something because only the D-cache needs to be flushed, never the I-cache, never the S-cache. Since however highmem on MIPS is still only supported on processors that don't suffer from cache aliases, we could turn flush_cache_kmaps() into a no-op - but for paranoia's sake we rather make it BUG_ON(cpu_has_dc_aliases()). Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-05-13MIPS: Loongson64: Remove call to flush_cache_all().Ralf Baechle
flush_cache_all() is a nop and loongson 3 is fully coherent. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-05-13MIPS: VR41xx: Use __flush_cache_all instead of flush_cache_all.Ralf Baechle
It's probably a good idea to flush caches before reset and by the time this code was written flush_cache_all did actually still do something. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-05-13MIPS: MSP71xx: Use __flush_cache_all instead of flush_cache_all.Ralf Baechle
Flushing caches is probably sensible on reset but flush_cache_all has been a no-op for a very long time. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-05-13MIPS: Octeon: Use __flush_cache_all instead of flush_cache_all.Ralf Baechle
flush_cache_all will go away. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-05-13MIPS: ath79: Use the reset controller to restart OF machinesAlban Bedel
Don't set _machine_restart() on OF machines as the reset driver now provides a system restart handler. Signed-off-by: Alban Bedel <albeu@free.fr> Cc: Felix Fietkau <nbd@openwrt.org> Cc: Antony Pavlov <antonynpavlov@gmail.com> Cc: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/12235/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-05-13MIPS: ath79: Add zboot debug serial supportAlban Bedel
Reuse the early printk code to support the serial in zboot. We copy early_printk.c instead of referencing it because we need to build a different object file for the normal kernel and zboot. Signed-off-by: Alban Bedel <albeu@free.fr> Cc: Andrew Bresticker <abrestic@chromium.org> Cc: Alex Smith <alex.smith@imgtec.com> Cc: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/12234/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-05-13MIPS: ath79: Remove the builtin DTB supportAlban Bedel
Now that appended DTB is usable we can drop the builtin DTB support. Signed-off-by: Alban Bedel <albeu@free.fr> Cc: Felix Fietkau <nbd@openwrt.org> Cc: Antony Pavlov <antonynpavlov@gmail.com> Cc: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/12231/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-05-13MIPS: ath79: Add support for DTB passed using the UHI boot protocolAlban Bedel
This is needed for bootloader supporting UHI and to support appended DTB. Signed-off-by: Alban Bedel <albeu@free.fr> Cc: Felix Fietkau <nbd@openwrt.org> Cc: Antony Pavlov <antonynpavlov@gmail.com> Cc: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/12230/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-05-13x86/arch_prctl/64: Restore accidentally removed put_cpu() in ARCH_SET_GSMateusz Guzik
This fixes an oversight in: 731e33e39a5b95 ("Remove FSBASE/GSBASE < 4G optimization") Signed-off-by: Mateusz Guzik <mguzik@redhat.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Andy Lutomirski <luto@amacapital.net> Cc: Andy Lutomirski <luto@kernel.org> Cc: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Borislav Petkov <bp@alien8.de> Cc: Brian Gerst <brgerst@gmail.com> Cc: Denys Vlasenko <dvlasenk@redhat.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Stephane Eranian <eranian@google.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Vince Weaver <vincent.weaver@maine.edu> Link: http://lkml.kernel.org/r/1462913803-29634-1-git-send-email-mguzik@redhat.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
2016-05-13Merge branch 'kvm-ppc-next' of ↵Paolo Bonzini
git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc into HEAD
2016-05-13ARC: pae: STRICT_MM_TYPECHECKS was brokenVineet Gupta
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2016-05-12coredump: get rid of coredump_params->writtenOmar Sandoval
cprm->written is redundant with cprm->file->f_pos, so use that instead. Signed-off-by: Omar Sandoval <osandov@fb.com> Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2016-05-12ARM: dts: igep0020: Add SD card write-protect pin.Enric Balletbo i Serra
A host device that supports write protection should refuse to write to an SD card that is designated read-only when write-protect is set. This is an optional feature of the SD specification. Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-05-12ARM: dts: igep00x0: Add SD card-detect.Enric Balletbo i Serra
Fix SD card remove/insert detection by adding the correct card-detect pin. All IGEP OMAP3 based boards use the same card-detect pin. Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Signed-off-by: Ladislav Michl <ladis@linux-mips.org> Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-05-12ARM: OMAP2+: AM43XX: Enable fixes for Cortex-A9 errataDave Gerlach
This patch explicitly enables the fixes for the below errata applicable for AM43x Socs as was done for OMAP4. 754322: Faulty MMU translations following ASID switch 775420: A data cache maintenance operation which aborts, followed by an ISB, without any DSB in-between, might lead to deadlock Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-05-12ARM: dts: am57xx-idk-common: Fix input supply namesNishanth Menon
Palmas Regulator is an exception and does not follow the standard "vin-supply" common definitions for all regulators, as a result of this, the input supplies are not reported to regulator framework, with the obvious result of not being appropriately mapped. Fix the same. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-05-12ARM: dts: dra7: Add gpmc dma channelFranklin S Cooper Jr
Add dma channel information to the gpmc. Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-05-12ARM: dts: disable mmc by default and enable when needed for dm814xNicolas Chauvet
This patch disable mmc nodes by default in the dm814x.dtsi and enable only when needed on a given dts v2: Disable un-used mmc nodes on the related boards dts files instead of from the included SOC dts Signed-off-by: Nicolas Chauvet <kwizart@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-05-12ARM: dts: Add non-removable to hsmmc on hp-t410Nicolas Chauvet
This will clean-up warnings at boot, since either that or cd-gpio{,s} are mandated by the dts specification of_get_named_gpiod_flags: can't parse 'cd-gpios' property of node '/ocp/mmc@47810000[0]' of_get_named_gpiod_flags: can't parse 'cd-gpio' property of node '/ocp/mmc@47810000[0]' v2: use the generic non-removable instead of ti,non-removable Signed-off-by: Nicolas Chauvet <kwizart@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-05-12ARM: dts: Fix ldo7 source for HDMI on igepv5Tony Lindgren
Fix ldo7 source for HDMI on igepv5. Suggested-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-05-12ARM: dts: Fix uart wakeirq on omap5 by removing WAKEUP_EN for omapsTony Lindgren
The padconf register WAKEUP_EN is now handled in a generic way using Linux wakeirqs where pinctrl-single toggles the WAKEUP_EN bit when a wakeirq is enabled or disabled. At least omap5 gets confused if the WAKEUP_EN bit is set and the pin is not claimed as a wakeirq. The end result is that wakeirqs don't work properly as there is nothing handling the wakeirq. So let's just remove the WAKEUP_EN usage from dts files. Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-05-12ARM: dts: Fix igepv5 audiopwon-gpioTony Lindgren
Playing audio works on omap5-uevm, but produces an "Unhandled fault: imprecise external abort (0x1406) at 0x00000000" error on igepv5. Looks like the twl6040 audpwron GPIO pin is different for these boards. Let's fix the issue by configuring the audpwron in the board specific dts file. Cc: Agustí Fontquerni <af@iseebcn.com> Cc: Eduard Gavin <egavin@iseebcn.com> Cc: Enric Balletbo i Serra <eballetbo@gmail.com> Acked-by: Peter Ujfalusi <peter.ujflausi@ti com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-05-12ARM: OMAP5 / DRA7: Introduce workaround for 801819Nishanth Menon
Add workaround for Cortex-A15 ARM erratum 801819 which says in summary that "A livelock can occur in the L2 cache arbitration that might prevent a snoop from completing. Under certain conditions this can cause the system to deadlock. " Recommended workaround is as follows: Do both of the following: 1) Do not use the write-back no-allocate memory type. 2) Do not issue write-back cacheable stores at any time when the cache is disabled (SCTLR.C=0) and the MMU is enabled (SCTLR.M=1). Because it is implementation defined whether cacheable stores update the cache when the cache is disabled it is not expected that any portable code will execute cacheable stores when the cache is disabled. For implementations of Cortex-A15 configured without the “L2 arbitration register slice” option (typically one or two core systems), you must also do the following: 3) Disable write-streaming in each CPU by setting ACTLR[28:25] = 0b1111 So, we provide an option to disable write streaming on OMAP5 and DRA7. It is a rare condition to occur and may be enabled selectively based on platform acceptance of risk. Applies to: A15 revisions r2p0, r2p1, r2p2, r2p3 or r2p4 and REVIDR[3] is set to 0. Based on ARM errata Document revision 18.0 (22 Nov 2013) Note: the configuration for the workaround needs to be done with each CPU bringup, since CPU0 bringup is done by bootloader, it is recommended to have the workaround in the bootloader, kernel also does ensure that CPU0 has the workaround and makes the workaround active when CPU1 gets active. With CONFIG_SMP disabled, it is expected to be done by the bootloader. This does show significant degradation in synthetic tests such as mbw (https://packages.qa.debian.org/m/mbw.html) mbw -n 100 100|grep AVG (on a test platform) Without enabling the erratum: AVG Method: MEMCPY Elapsed: 0.13406 MiB: 100.00000 Copy: 745.913 MiB/s AVG Method: DUMB Elapsed: 0.06746 MiB: 100.00000 Copy: 1482.357 MiB/s AVG Method: MCBLOCK Elapsed: 0.03058 MiB: 100.00000 Copy: 3270.569 MiB/s After enabling the erratum: AVG Method: MEMCPY Elapsed: 0.13757 MiB: 100.00000 Copy: 726.913 MiB/s AVG Method: DUMB Elapsed: 0.12024 MiB: 100.00000 Copy: 831.668 MiB/s AVG Method: MCBLOCK Elapsed: 0.09243 MiB: 100.00000 Copy: 1081.942 MiB/s Most benchmarks are designed for specific performance analysis, so overall usecase must be considered before making a decision to enable/disable the erratum workaround. Pending internal investigation, the erratum is kept disabled by default. Cc: Russell King <rmk+kernel@arm.linux.org.uk> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Tony Lindgren <tony@atomide.com> Suggested-by: Richard Woodruff <r-woodruff2@ti.com> Suggested-by: Brad Griffis <bgriffis@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-05-12Merge tag 'at91-fixes2' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91 into fixes Merge "Second AT91 fix PR for 4.6" from Nicolas Ferre: - fix a regression on the clock subsystem while switching to syscon/regmap due to a stricter check of the register map. * tag 'at91-fixes2' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91: ARM: dts: at91: sam9x5: Fix the memory range assigned to the PMC
2016-05-12powerpc/4xx: Device tree update for the 460ex DWC SATAAndy Shevchenko
Device tree update for the Applied micro processor 460ex on-chip SATA to use "dmas" property. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Tejun Heo <tj@kernel.org>
2016-05-12arm64: do not enforce strict 16 byte alignment to stack pointerColin Ian King
copy_thread should not be enforcing 16 byte aligment and returning -EINVAL. Other architectures trap misaligned stack access with SIGBUS so arm64 should follow this convention, so remove the strict enforcement check. For example, currently clone(2) fails with -EINVAL when passing a misaligned stack and this gives little clue to what is wrong. Instead, it is arguable that a SIGBUS on the fist access to a misaligned stack allows one to figure out that it is a misaligned stack issue rather than trying to figure out why an unconventional (and undocumented) -EINVAL is being returned. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
2016-05-12perf/x86/intel/pt: Generate PMI in the STOP region as wellAlexander Shishkin
Currently, the PT driver always sets the PMI bit one region (page) before the STOP region so that we can wake up the consumer before we run out of room in the buffer and have to disable the event. However, we also need an interrupt in the last output region, so that we actually get to disable the event (if no more room from new data is available at that point), otherwise hardware just quietly refuses to start, but the event is scheduled in and we end up losing trace data till the event gets removed. For a cpu-wide event it is even worse since there may not be any re-scheduling at all and no chance for the ring buffer code to notice that its buffer is filled up and the event needs to be disabled (so that the consumer can re-enable it when it finishes reading the data out). In other words, all the trace data will be lost after the buffer gets filled up. This patch makes PT also generate a PMI when the last output region is full. Reported-by: Markus Metzger <markus.t.metzger@intel.com> Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: <stable@vger.kernel.org> Cc: Arnaldo Carvalho de Melo <acme@infradead.org> Cc: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Borislav Petkov <bp@alien8.de> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Stephane Eranian <eranian@google.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Vince Weaver <vincent.weaver@maine.edu> Cc: vince@deater.net Link: http://lkml.kernel.org/r/1462886313-13660-2-git-send-email-alexander.shishkin@linux.intel.com Signed-off-by: Ingo Molnar <mingo@kernel.org>