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2010-10-21ARM: S5P: Remove the unused clk_arm clock from plat-s5pThomas Abraham
All the S5P series SoCs use the 'struct clksrc_clk' type to represent the armclk. So the clk_arm clock instance available in the plat-s5p clock code is not used in any of the S5P series SoCs. This patch removes the unused clk_arm instance from plat-s5p clock code. Reported-by: Jaecheol Lee <jc.lee@samsung.com> Signed-off-by: Thomas Abraham <thomas.ab@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-10-21ARM: S5P64XX: Remove redundant selection PLAT_S5P.Kukjin Kim
This patch removes redundant selection PLAT_S5P in the CPU_S5P64XX config. Because PLAT_S5P is selected if select ARCH_S5P64XX in the plat-s5p/Kconfig. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-10-21ARM: S5P: Remove redundant selection PLAT_S5P for S5PC100, S5PV210 and S5PV310Kyungmin Park
The selection PLAT_S5P is selected with plat-s5p/Kconfig. So remove it form each CPU_S5PXXXX config. Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> [kgene.kim@samsung.com: edited title] Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-10-21ARM: S5PV310: Place the common SPARSEMEM at ARCH_S5PV310Kyungmin Park
In case of S5PV310/S5PC210, it uses the SPARSEMEM as default memory configuration. So moved to ARCH_S5PV310 config. Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> [kgene.kim@samsung.com: edited title] Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-10-21ARM: S5PV210: Place the common SPARSEMEM at ARCH_S5PV210Kyungmin Park
In case of S5PV210/S5PC110, it uses the SPARSEMEM as default memory configuration. So moved to ARCH_S5PV210 config. Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> [kgene.kim@samsung.com: edited title] Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-10-21ARM: S5PV210: Add Torbreck board supportKyuho Choi
This patch adds to support Torbreck board of aESOP community using Samsung S5PV210 SoC. Signed-off-by: Kyuho Choi <chlrbgh0@gmail.com> Signed-off-by: Hyunchul Ko <ghcstop@gmail.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-10-21ARM: S5PV310: Fix physical address of System Controller RegisterBoojin Kim
The physical address of SYSCON(System Controller) is wrong. This patch fixs this wrong physical address value from 0x10020000 to 0x10010000. Signed-off-by: Boojin Kim <boojin.kim@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-10-21ARM: S5PV310: Optimize interrupt source searching codeChanghwan Youn
It is reported by Junseok Jung that using clz instruction is better instead of using for-loop to find the interrupt source. This patch modifies interrupt source searching code using __ffs(). The __ffs() is implemented using clz instruction. Suggested-by: Junseok Jung <jundols.jung@samsung.com> Signed-off-by: Changhwan Youn <chaos.youn@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-10-21ARM: S5PV310: Add support Watchdog TimerJemings Ko
This patch adds support Watchdog Timer for S5PV310 and S5PC210. Signed-off-by: Jemings Ko <jemings@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-10-21ARM: S5PV310: Add support RTCChanghwan Youn
This patch adds support RTC for S5PV310 and S5PC210. Signed-off-by: Changhwan Youn <chaos.youn@samsung.com> Signed-off-by: Jemings Ko <jemings@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-10-21ARM: S5PV210: Add DMC map_desc table for supporting DMC accessJaecheol Lee
This patch adds DMC(DRAM Memory Controller) map_desc table. Because some driver such as CPUFREQ need to access DMC register. Signed-off-by: Jaecheol Lee <jc.lee@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-10-21ARM: S5PV210: Add keypad device to the GONI boardJoonyoung Shim
This patch is to support keypad device to the GONI board. Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-10-21ARM: S5PV310: Fix clkset_moutcore_listJaecheol Lee
This patch fixes source clocks of moutcore. That should be clk_mout_apll instead of clk_sclk_apll. Signed-off-by: Jaecheol Lee <jc.lee@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-10-21ARM: SAMSUNG: Change the 3rd HSMMC interrupt name for compatibilityKukjin Kim
This patch changes the 3rd HSMMC interrupt name for compatibility from IRQ_MMC to IRQ_HSMMC3. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-10-21ARM: S5PV310: Adds various special clocksJongpill Lee
This patch adds various special clocks for S5PV310/S5PC210. Signed-off-by: Jongpill Lee <boyko.lee@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-10-21ARM: S5PV310: Add video clocksJongpill Lee
This patch adds video clocks for S5PV310/S5PC210. Signed-off-by: Jongpill Lee <boyko.lee@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-10-21ARM: S5PV310: Add various clocksJongpill Lee
This patch adds various clocks for S5PV310/S5PC210. Signed-off-by: Jongpill Lee <boyko.lee@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-10-21ARM: S5PV310: Adds SDMMC clock for S5PV310Jongpill Lee
This patch adds SDMMC clocks for S5PV310/S5PC210. Signed-off-by: Jongpill Lee <boyko.lee@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-10-21ARM: S5PV310: Adds enable and ctrlbit for clk_vpllsrcJongpill Lee
This patch adds enable and ctrlbit for struct clksrc_clk clk_vpllsrc Signed-off-by: Jongpill Lee <boyko.lee@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-10-21ARM: S5PV310: Adds printing ACLK200, ACLK100, ACLK160 and ACLK133Jongpill Lee
This patch adds log messages of aclk_200, aclk_100, aclk_160, and aclk_133. And adds clk_p.rate from calculated aclk_100. Signed-off-by: Jongpill Lee <boyko.lee@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-10-21ARM: S5PV310: Adds clk_sclk_usbphy0, _usbphy1, and _hdmiphyJongpill Lee
This patch adds struct clk clk_sclk_usbphy0, _usbphy1, and _hdmiphy for adding member of clkset_group_list. Signed-off-by: Jongpill Lee <boyko.lee@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-10-21ARM: S5PV310: Adds clkset_aclk for removing clkset_aclk_xxxKukjin Kim
This patch adds 'clkset_aclk' to use commonly. And removed struct clksrc_sources clkset_aclk_200, clkset_aclk_100, clkset_aclk_160, and clkset_aclk_133. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-10-21ARM: S5PV310: Removed unused clockKukjin Kim
This pach removed unused clock on S5PV310/S5PC210. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-10-21ARM: S5PV310: Adds clock addresses for S5PV310Kukjin Kim
This patch adds definition of clock address. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-10-21ARM: S5PV310: Add CPU hotplug support for S5PV310Changhwan Youn
This patch adds CPU hotplug support for S5PV310/S5PC210. Signed-off-by: Changhwan Youn <chaos.youn@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-10-21ARM: S5PV310: Add GPIO keys at Universal boardKyungmin Park
Universal board has 5 GPIO keys. Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-10-21ARM: S5PV310: update S5PV310 Kconfig for supporting multiple machinesKukjin Kim
This patch updates Kconfig of mach-s5pv310 for easily dividing S5PC210 and S5PV310 boards. S5PC210(MCP) machines and S5PV310 machines can be build into one kernel, this will be provied/submitted when new defconfig can be merged. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-10-21ARM: S5PV310: Add SMDKC210 board support fileKukjin Kim
This patch adds Samsung SMDKC210 board support file. The SoC of SMDKC210, S5PC210(MCP) is one of package option of S5PV310. And because composition of SMDKC210 and SMDKV310 differs, need SMDKC210 with SMDKV310. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-10-21ARM: S3C64XX: add touchscreen support for mach-mini6410Darius Augulis
Add touchscreen device support for mach-mini6410 Signed-off-by: Darius Augulis <augulis.darius@gmail.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-10-21ARM: S3C64XX: add backlight control for mach-mini6410Darius Augulis
Add support for platform-lcd device for mach-mini6410 Signed-off-by: Darius Augulis <augulis.darius@gmail.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-10-21ARM: S3C64XX: add frame buffer support for mach-mini6410Darius Augulis
Add support for frame buffer device for mach-mini6410. Patch also adds support for feature string parsing for mini6410. The feature string is kernel command line passed and currently lets select only LCD configuration. At the moment there is support for two LCD configurations - 4.3" and 7.0". Feature parser is mach-mini2440 based. Signed-off-by: Darius Augulis <augulis.darius@gmail.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-10-21ARM: S3C64XX: add nand support for mach-mini6410Darius Augulis
Add nand device support and mtd partition table for mini6410 Signed-off-by: Darius Augulis <augulis.darius@gmail.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-10-21ARM: S3C64XX: add support for mach-mini6410Darius Augulis
Add support for mini6410 board from FriendlyARM Signed-off-by: Darius Augulis <augulis.darius@gmail.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-10-20x86: Spread tlb flush vector between nodesShaohua Li
Currently flush tlb vector allocation is based on below equation: sender = smp_processor_id() % 8 This isn't optimal, CPUs from different node can have the same vector, this causes a lot of lock contention. Instead, we can assign the same vectors to CPUs from the same node, while different node has different vectors. This has below advantages: a. if there is lock contention, the lock contention is between CPUs from one node. This should be much cheaper than the contention between nodes. b. completely avoid lock contention between nodes. This especially benefits kswapd, which is the biggest user of tlb flush, since kswapd sets its affinity to specific node. In my test, this could reduce > 20% CPU overhead in extreme case.The test machine has 4 nodes and each node has 16 CPUs. I then bind each node's kswapd to the first CPU of the node. I run a workload with 4 sequential mmap file read thread. The files are empty sparse file. This workload will trigger a lot of page reclaim and tlbflush. The kswapd bind is to easy trigger the extreme tlb flush lock contention because otherwise kswapd keeps migrating between CPUs of a node and I can't get stable result. Sure in real workload, we can't always see so big tlb flush lock contention, but it's possible. [ hpa: folded in fix from Eric Dumazet to use this_cpu_read() ] Signed-off-by: Shaohua Li <shaohua.li@intel.com> LKML-Reference: <1287544023.4571.8.camel@sli10-conroe.sh.intel.com> Cc: Eric Dumazet <eric.dumazet@gmail.com> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2010-10-20x86-32, mm: Add an initial page table for core bootstrappingBorislav Petkov
This patch adds an initial page table with low mappings used exclusively for booting APs/resuming after ACPI suspend/machine restart. After this, there's no need to add low mappings to swapper_pg_dir and zap them later or create own swsusp PGD page solely for ACPI sleep needs - we have initial_page_table for that. Signed-off-by: Borislav Petkov <bp@alien8.de> LKML-Reference: <20101020070526.GA9588@liondog.tnic> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2010-10-20Merge branch 'x86/cleanups' into x86/trampolineH. Peter Anvin
2010-10-20Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/upstream-linusLinus Torvalds
* 'upstream' of git://git.linux-mips.org/pub/scm/upstream-linus: MIPS: O32 compat/N32: Fix to use compat syscall wrappers for AIO syscalls. MAINTAINERS: Change list for ioc_serial to linux-serial. SERIAL: ioc3_serial: Return -ENOMEM on memory allocation failure MIPS: jz4740: Fix Kbuild Platform file. MIPS: Repair Kbuild make clean breakage.
2010-10-20Merge branch 'x86/vmware' into x86/trampolineH. Peter Anvin
2010-10-20x86, mm: Fix incorrect data type in vmalloc_sync_all()Borislav Petkov
arch/x86/mm/fault.c: In function 'vmalloc_sync_all': arch/x86/mm/fault.c:238: warning: assignment makes integer from pointer without a cast introduced by 617d34d9e5d8326ec8f188c616aa06ac59d083fe. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com> LKML-Reference: <20101020103642.GA3135@kryptos.osrc.amd.com> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2010-10-20Merge branch 'kvm-updates/2.6.36' of git://git.kernel.org/pub/scm/virt/kvm/kvmLinus Torvalds
* 'kvm-updates/2.6.36' of git://git.kernel.org/pub/scm/virt/kvm/kvm: KVM: Fix fs/gs reload oops with invalid ldt
2010-10-20ARM: S3C2416: Add Power Management support for SMDK2416Abhilash Kesavan
Adds suspend-to-ram support for SMDK2416 based on existing 2412 PM code Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Sangbeom Kim <sbkim73@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-10-20ARM: S3C24XX: Fix gpiolib support for ports K..MYauhen Kharuzhy
S3C2443 and S3C2416 has 12 GPIO banks (from A to M), increase ARCH_NR_GPIOS for this architectures. Also typo from previous commit has been fixed: CONFIG_CPU_S3C24XX instead CONFIG_CPU_244X. Signed-off-by: Yauhen Kharuzhy <jekhor@gmail.com> Tested-by: Vasily Khoruzhick <anarsoul@gmail.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-10-20arm: remove machine_desc.io_pg_offst and .phys_ioNicolas Pitre
Since we're now using addruart to establish the debug mapping, we can remove the io_pg_offst and phys_io members of struct machine_desc. The various declarations were removed using the following script: grep -rl MACHINE_START arch/arm | xargs \ sed -i '/MACHINE_START/,/MACHINE_END/ { /\.\(phys_io\|io_pg_offst\)/d }' [ Initial patch was from Jeremy Kerr, example script from Russell King ] Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org> Acked-by: Eric Miao <eric.miao at canonical.com>
2010-10-20arm: use addruart macro to establish debug mappingsJeremy Kerr
Since we can get both physical and virtual addresses from the addruart macro, we can use this to establish the debug mappings. In the case of CONFIG_DEBUG_ICEDCC, we don't need any mappings, but may still need to setup r7 correctly. Incorporating ASM changes from Nicolas Pitre <npitre@fluxnic.net>. Signed-off-by: Jeremy Kerr <jeremy.kerr@canonical.com> Tested-by: Kevin Hilman <khilman@deeprootsystems.com>
2010-10-20arm: return both physical and virtual addresses from addruartJeremy Kerr
Rather than checking the MMU status in every instance of addruart, do it once in kernel/debug.S, and change the existing addruart macros to return both physical and virtual addresses. The main debug code can then select the appropriate address to use. This will also allow us to retreive the address of a uart for the MMU state that we're not current in. Updated with fixes for OMAP from Jason Wang <jason77.wang@gmail.com> and Tony Lindgren <tony@atomide.com>, and fix for versatile express from Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>. Signed-off-by: Jeremy Kerr <jeremy.kerr@canonical.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Jason Wang <jason77.wang@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Tested-by: Kevin Hilman <khilman@deeprootsystems.com>
2010-10-20arm/debug: consolidate addruart macros for CONFIG_DEBUG_ICEDCCJeremy Kerr
We have the same (empty) macro for all IDEDCC flavours, so consolidate it to one. Signed-off-by: Jeremy Kerr <jeremy.kerr@canonical.com>
2010-10-20ARM: make struct machine_desc definition coherent with its commentNicolas Pitre
As mentioned in the comment right at the top, the first four fields are directly accessed by assembly code in head.S. Move nr_irqs so the comment is true again. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2010-10-20apic, x86: Use BIOS settings for IBS and MCE threshold interrupt LVT offsetsRobert Richter
We want the BIOS to setup the EILVT APIC registers. The offsets were hardcoded and BIOS settings were overwritten by the OS. Now, the subsystems for MCE threshold and IBS determine the LVT offset from the registers the BIOS has setup. If the BIOS setup is buggy on a family 10h system, a workaround enables IBS. If the OS determines an invalid register setup, a "[Firmware Bug]: " error message is reported. We need this change also for upcomming cpu families. Signed-off-by: Robert Richter <robert.richter@amd.com> LKML-Reference: <1286360874-1471-3-git-send-email-robert.richter@amd.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2010-10-20apic, x86: Check if EILVT APIC registers are available (AMD only)Robert Richter
This patch implements checks for the availability of LVT entries (APIC500-530) and reserves it if used. The check becomes necessary since we want to let the BIOS provide the LVT offsets. The offsets should be determined by the subsystems using it like those for MCE threshold or IBS. On K8 only offset 0 (APIC500) and MCE interrupts are supported. Beginning with family 10h at least 4 offsets are available. Since offsets must be consistent for all cores, we keep track of the LVT offsets in software and reserve the offset for the same vector also to be used on other cores. An offset is freed by setting the entry to APIC_EILVT_MASKED. If the BIOS is right, there should be no conflicts. Otherwise a "[Firmware Bug]: ..." error message is generated. However, if software does not properly determines the offsets, it is not necessarily a BIOS bug. Signed-off-by: Robert Richter <robert.richter@amd.com> LKML-Reference: <1286360874-1471-2-git-send-email-robert.richter@amd.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2010-10-20Merge branch 'linus' into irq/coreIngo Molnar
Merge reason: update to almost-final-.36 Signed-off-by: Ingo Molnar <mingo@elte.hu>