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Add sparse IRQ support in ARCH_MMP.
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
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Bringup tavorevb3 development platform. UART and PMIC are enabled.
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
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Signed-off-by: Mark F. Brown <mark.brown314@gmail.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
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Signed-off-by: Mark F. Brown <mark.brown314@gmail.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
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mach-mmp needs to clear wake event in order to clear the keypad interrupt
Signed-off-by: Mark F. Brown <mark.brown314@gmail.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
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Signed-off-by: Mark F. Brown <mark.brown314@gmail.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
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Signed-off-by: Mark F. Brown <mark.brown314@gmail.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
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mach-mmp utilizes pxa27x_keypad code so we need to move header to
platform pxa directory.
Signed-off-by: Mark F. Brown <mark.brown314@gmail.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
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Transitioning into making this useful for architectures other than sparc.
This is a verbatim copy of all functions/variables that've been moved.
Signed-off-by: Andres Salomon <dilinger@queued.net>
Acked-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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Rather than passing around ints everywhere, use the
phandle type where appropriate for the various functions
that talk to the PROM.
Signed-off-by: Andres Salomon <dilinger@queued.net>
Acked-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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Add the platform data for the IOMMUs found on the Qualcomm
msm8x60 SoC.
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
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Register a driver for the MSM IOMMU devices and a driver
for the translation context devices. Set up the global
IOMMU registers and initialize the context banks.
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
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Add support for the IOMMUs found on the upcoming Qualcomm
MSM8x60 chips. These IOMMUs allow virtualization of the
address space used by most of the multimedia cores on these
chips.
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
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The MSM8X60 FFA contains different components than the MSM8X60 SURF,
and therefore requires a different ARCH type and machine ID.
Signed-off-by: Gregory Bean <gbean@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
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Board configuration for MSM8X60 simulation.
Signed-off-by: Steve Muckle <smuckle@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
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Signed-off-by: Steve Muckle <smuckle@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
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The MSM8x60 has a different physical memory offset than other targets.
Signed-off-by: Jeff Ohlstein <johlstei@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
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Private Peripheral interrupts could be edge triggered or level triggered
depending on the platform. Initialize handlers for these in board file.
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
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Signed-off-by: Jeff Ohlstein <johlstei@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
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Some MSM targets don't select the debug UART in this way. For those we
need to disable this selection mechanism.
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
Signed-off-by: Jeff Ohlstein <johlstei@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
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Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
Signed-off-by: Jeff Ohlstein <johlstei@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
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Need to add this until real clock support for 8x60 goes in, or else some
drivers won't compile.
Signed-off-by: Jeff Ohlstein <johlstei@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
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On RUMI platform STIs are not enabled by default, contrary to the
GIC spec. The bits for STIs in the enable/enable clear registers
are also RW instead of RO. STIs need to be enabled at initialization
time.
Signed-off-by: Steve Muckle <smuckle@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
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The existing MSM irq entry macro is specific to a VIC
implementation. Renaming this makes room for irq support based on
other interrupt controllers.
Signed-off-by: Steve Muckle <smuckle@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
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Board configuration for MSM8X60 emulation on RUMI3.
Signed-off-by: Steve Muckle <smuckle@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
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Signed-off-by: Jeff Ohlstein <johlstei@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
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Define the interrupt map in irq-8x60.h
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
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IRQ assignments are different for MSM8X60 than other existing MSMs.
Signed-off-by: Steve Muckle <smuckle@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
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MSM8X60 has different IO mappings than previous MSMs.
Signed-off-by: Steve Muckle <smuckle@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
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Some builds may not support the proc-comm interface with
the baseband processor.
Signed-off-by: Steve Muckle <smuckle@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-next-2.6
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The header comments diverged a bit from the implementation. Lets
re-sync them.
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
LKML-Reference: <1286564028-2352-3-git-send-email-konrad.wilk@oracle.com>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
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We don't need a complex IOMMU dependency list on IA64 so
we just define the IOMMU_* macro which is used the DMAR driver, as a dummy.
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
LKML-Reference: <1286564028-2352-2-git-send-email-konrad.wilk@oracle.com>
Reported-by: Tony Luck <tony.luck@intel.com>
Tested-by: Tony Luck <tony.luck@intel.com>
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-next-2.6 into for-davem
Conflicts:
Documentation/feature-removal-schedule.txt
drivers/net/wireless/ipw2x00/ipw2200.c
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It's unknown why openprom.h was being exported; there doesn't seem to be any
reason for it currently, and it creates headaches with userspace being able
to potentially use the structures in there. So, don't export it anymore.
Signed-off-by: Andres Salomon <dilinger@queued.net>
Acked-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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into omap-for-linus
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The OMAP4 PandaBoard has EHCI port1 hooked up to an external
SMSC3320 transciever. GPIO 1 is used to power on the transceiver
and GPIO 62 for reset on the transceiver.
Signed-off-by: David Anders <x0132446@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Avoid possible crash if CONFIG_MMC_OMAP_HS is not set.
Signed-off-by: David Anders <x0132446@ti.com>
Signed-off-by: Anand Gadiyar <gadiyar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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remove the second hsmmc definition as it is only used on the
expansion header of the PandaBoard and can be mux for other
functions.
Signed-off-by: David Anders <x0132446@ti.com>
Signed-off-by: Anand Gadiyar <gadiyar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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It seems these comments where accidentally added so remove them.
Signed-off-by: Jarkko Nikula <jhnikula@gmail.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Acked-by: Peter Ujfalusi <peter.ujfalusi@nokia.com>
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This is just a readability and debugging improvement. As selection bit in
DEVCONF register is cleared when using 96 MHz PRCM source and set when using
external CLKS pin, change definitions to be sync with these.
Signed-off-by: Jarkko Nikula <jhnikula@gmail.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Acked-by: Peter Ujfalusi <peter.ujfalusi@nokia.com>
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Fix bit clear. Now it clears all other bits than mask bit where it should
clear only it.
Signed-off-by: Jarkko Nikula <jhnikula@gmail.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Acked-by: Peter Ujfalusi <peter.ujfalusi@nokia.com>
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unused clocks
Reduce the amount of debugging generated by default when unused clocks
are being disabled by the clock code. The previous code would only
generate debug-level messages, but some people who wished to run
production kernels with debug-level messages enabled reported that the
large number of clock disable messages were slowing boot. Now to
enable clock-by-clock disable messages, DEBUG needs to be defined in
mach-omap2/clock.c.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Tuukka Tikkanen <tuukka.tikkanen@nokia.com>
Cc: Tim Bird <tim.bird@am.sony.com>
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Only OMAP2+ platforms have the System Control Module (SCM) IP block.
In the past, we've kept the SCM header file in plat-omap. This has
led to abuse - device drivers including it; includes being added that
create implicit dependencies on OMAP2+ builds; etc.
In response, move the SCM headers into mach-omap2/.
As part of this, remove the direct SCM access from the OMAP UDC
driver. It was clearly broken. The UDC code needs an indepth review for
use on OMAP2+ chips.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Cory Maccarrone <darkstar6262@gmail.com>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
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Split plat-omap/common.c into three pieces:
1. the 32KiHz sync timer and clocksource code, which now lives in
plat-omap/counter_32k.c;
2. the OMAP2+ common code, which has been moved to mach-omap2/common.c;
3. and the remainder of the OMAP-wide common code, which includes the
deprecated ATAGs code and a deprecated video RAM reservation function.
The primary motivation for doing this is to move the OMAP2+-specific parts
into an OMAP2+-specific file, so that build breakage related to the
System Control Module code can be resolved.
Benoît Cousson <b-cousson@ti.com> suggested a new filename and found
some bugs in the counter_32k.c comments - thanks Benoît.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
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Previously the OMAP McBSP ASoC driver implemented CLKS switching by
using omap_ctrl_{read,write}l() directly. This is against policy; the OMAP
System Control Module functions are not intended to be exported to drivers.
These symbols are no longer exported, so as a result, the OMAP McBSP ASoC
driver does not build as a module.
Resolve the CLKS clock changing portion of this problem by creating a
clock parent changing function that lives in
arch/arm/mach-omap2/mcbsp.c, and modify the ASoC driver to use it.
Due to the unfortunate way that McBSP support is implemented in ASoC
and the OMAP tree, this symbol must be exported for use by
sound/soc/omap/omap-mcbsp.c.
Going forward, the McBSP device driver should be moved from
arch/arm/*omap* into drivers/ or sound/soc/* and the CPU DAI driver
should be implemented as a platform_driver as many other ASoC CPU DAI
drivers are. These two steps should resolve many of the layering
problems, which will rapidly reappear during a McBSP hwmod/PM runtime
conversions.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Acked-by: Jarkko Nikula <jhnikula@gmail.com>
Acked-by: Peter Ujfalusi <peter.ujfalusi@nokia.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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The OMAP ASoC McBSP code implemented CLKR and FSR signal muxing via
direct System Control Module writes on OMAP2+. This required the
omap_ctrl_{read,write}l() functions to be exported, which is against
policy: the only code that should call those functions directly is
OMAP core code, not device drivers. omap_ctrl_{read,write}*() are no
longer exported, so the driver no longer builds as a module.
Fix the pinmuxing part of the problem by removing calls to
omap_ctrl_{read,write}l() from the OMAP ASoC McBSP code and
implementing signal muxing functions in arch/arm/mach-omap2/mcbsp.c.
Due to the unfortunate way that McBSP support is implemented in ASoC
and the OMAP tree, these symbols must be exported for use by
sound/soc/omap/omap-mcbsp.c.
Going forward, the McBSP device driver should be moved from
arch/arm/*omap* into drivers/ or sound/soc/*, and the CPU DAI driver
should be implemented as a platform_driver as many other ASoC CPU DAI
drivers are. These two steps should resolve many of the layering
problems, which will rapidly reappear during a McBSP hwmod/PM runtime
conversion.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Acked-by: Jarkko Nikula <jhnikula@gmail.com>
Acked-by: Peter Ujfalusi <peter.ujfalusi@nokia.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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The OMAP3 clock tree already contains the infrastructure to support
clock framework-based McBSP functional clock source switching. But it
did not contain the clkdev aliases for the McBSP code to refer to the
parent clocks in an SoC integration-neutral way. So, add the clkdev
aliases for the parent clocks.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
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Add the MCBSP_CLKS clock and the clksel structures needed to support clock
framework-based source switching for McBSPs 1-5. Also, add clkdev
aliases on the parent clocks for the McBSP source switching code, added
in a subsequent patch.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
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Add the MCBSP_CLKS clock and the clksel structures needed to support clock
framework-based source switching for McBSP 1 and 2. Also, add clkdev
aliases on the parent clocks for the McBSP source switching code, added
in a subsequent patch.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
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