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2023-12-13arm64: dts: ls1012a: Remove big-endian from thermalFabio Estevam
Per qoriq-thermal.yaml, 'big-endian' is not a valid property. When the 'little-endian' property is absent, the default is big endian. Remove it to fix the following schema warning: tmu@1f00000: 'big-endian' does not match any of the regexes: 'pinctrl-[0-9]+' from schema $id: http://devicetree.org/schemas/thermal/qoriq-thermal.yaml# Signed-off-by: Fabio Estevam <festevam@denx.de> Acked-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-12-13ARM: dts: Fix occasional boot hang for am3 usbTony Lindgren
With subtle timings changes, we can now sometimes get an external abort on non-linefetch error booting am3 devices at sysc_reset(). This is because of a missing reset delay needed for the usb target module. Looks like we never enabled the delay earlier for am3, although a similar issue was seen earlier with a similar usb setup for dm814x as described in commit ebf244148092 ("ARM: OMAP2+: Use srst_udelay for USB on dm814x"). Cc: stable@vger.kernel.org Fixes: 0782e8572ce4 ("ARM: dts: Probe am335x musb with ti-sysc") Signed-off-by: Tony Lindgren <tony@atomide.com>
2023-12-13RISCV: KVM: update external interrupt atomically for IMSIC swfileYong-Xuan Wang
The emulated IMSIC update the external interrupt pending depending on the value of eidelivery and topei. It might lose an interrupt when it is interrupted before setting the new value to the pending status. For example, when VCPU0 sends an IPI to VCPU1 via IMSIC: VCPU0 VCPU1 CSRSWAP topei = 0 The VCPU1 has claimed all the external interrupt in its interrupt handler. topei of VCPU1's IMSIC = 0 set pending in VCPU1's IMSIC topei of VCPU1' IMSIC = 1 set the external interrupt pending of VCPU1 clear the external interrupt pending of VCPU1 When the VCPU1 switches back to VS mode, it exits the interrupt handler because the result of CSRSWAP topei is 0. If there are no other external interrupts injected into the VCPU1's IMSIC, VCPU1 will never know this pending interrupt unless it initiative read the topei. If the interruption occurs between updating interrupt pending in IMSIC and updating external interrupt pending of VCPU, it will not cause a problem. Suppose that the VCPU1 clears the IPI pending in IMSIC right after VCPU0 sets the pending, the external interrupt pending of VCPU1 will not be set because the topei is 0. But when the VCPU1 goes back to VS mode, the pending IPI will be reported by the CSRSWAP topei, it will not lose this interrupt. So we only need to make the external interrupt updating procedure as a critical section to avoid the problem. Fixes: db8b7e97d613 ("RISC-V: KVM: Add in-kernel virtualization of AIA IMSIC") Tested-by: Roy Lin <roy.lin@sifive.com> Tested-by: Wayling Chen <wayling.chen@sifive.com> Co-developed-by: Vincent Chen <vincent.chen@sifive.com> Signed-off-by: Vincent Chen <vincent.chen@sifive.com> Signed-off-by: Yong-Xuan Wang <yongxuan.wang@sifive.com> Signed-off-by: Anup Patel <anup@brainfault.org>
2023-12-12merge mm-hotfixes-stable into mm-nonmm-stable to pick up depended-upon changesAndrew Morton
2023-12-12x86, kexec: fix the wrong ifdeffery CONFIG_KEXECBaoquan He
With the current ifdeffery CONFIG_KEXEC, get_cmdline_acpi_rsdp() is only available when kexec_load interface is taken, while kexec_file_load interface can't make use of it. Now change it to CONFIG_KEXEC_CORE. Link: https://lkml.kernel.org/r/20231208073036.7884-6-bhe@redhat.com Signed-off-by: Baoquan He <bhe@redhat.com> Cc: Eric DeVolder <eric_devolder@yahoo.com> Cc: Ignat Korchagin <ignat@cloudflare.com> Cc: kernel test robot <lkp@intel.com> Cc: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2023-12-12sh, kexec: fix the incorrect ifdeffery and dependency of CONFIG_KEXECBaoquan He
The select of KEXEC for CRASH_DUMP in kernel/Kconfig.kexec will be dropped, then compiling errors will be triggered if below config items are set: === CONFIG_CRASH_CORE=y CONFIG_KEXEC_CORE=y CONFIG_CRASH_DUMP=y === Here, change the dependency of building kexec_core related object files, and the ifdeffery on SuperH from CONFIG_KEXEC to CONFIG_KEXEC_CORE. Link: https://lkml.kernel.org/r/20231208073036.7884-5-bhe@redhat.com Signed-off-by: Baoquan He <bhe@redhat.com> Cc: Eric DeVolder <eric_devolder@yahoo.com> Cc: Ignat Korchagin <ignat@cloudflare.com> Cc: kernel test robot <lkp@intel.com> Cc: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2023-12-12mips, kexec: fix the incorrect ifdeffery and dependency of CONFIG_KEXECBaoquan He
The select of KEXEC for CRASH_DUMP in kernel/Kconfig.kexec will be dropped, then compiling errors will be triggered if below config items are set: === CONFIG_CRASH_CORE=y CONFIG_KEXEC_CORE=y CONFIG_CRASH_DUMP=y === -------------------------------------------------------------------- mipsel-linux-ld: kernel/kexec_core.o: in function `kimage_free': kernel/kexec_core.c:(.text+0x2200): undefined reference to `machine_kexec_cleanup' mipsel-linux-ld: kernel/kexec_core.o: in function `__crash_kexec': kernel/kexec_core.c:(.text+0x2480): undefined reference to `machine_crash_shutdown' mipsel-linux-ld: kernel/kexec_core.c:(.text+0x2488): undefined reference to `machine_kexec' mipsel-linux-ld: kernel/kexec_core.o: in function `kernel_kexec': kernel/kexec_core.c:(.text+0x29b8): undefined reference to `machine_shutdown' mipsel-linux-ld: kernel/kexec_core.c:(.text+0x29c0): undefined reference to `machine_kexec' -------------------------------------------------------------------- Here, change the dependency of building kexec_core related object files, and the ifdeffery in mips from CONFIG_KEXEC to CONFIG_KEXEC_CORE. Link: https://lkml.kernel.org/r/20231208073036.7884-4-bhe@redhat.com Signed-off-by: Baoquan He <bhe@redhat.com> Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202311302042.sn8cDPIX-lkp@intel.com/ Cc: Eric DeVolder <eric_devolder@yahoo.com> Cc: Ignat Korchagin <ignat@cloudflare.com> Cc: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2023-12-12m68k, kexec: fix the incorrect ifdeffery and build dependency of CONFIG_KEXECBaoquan He
The select of KEXEC for CRASH_DUMP in kernel/Kconfig.kexec will be dropped, then compiling errors will be triggered if below config items are set: === CONFIG_CRASH_CORE=y CONFIG_KEXEC_CORE=y CONFIG_CRASH_DUMP=y === Here, change the dependency of buinding machine_kexec.o relocate_kernel.o and the ifdeffery in asm/kexe.h to CONFIG_KEXEC_CORE. Link: https://lkml.kernel.org/r/20231208073036.7884-3-bhe@redhat.com Signed-off-by: Baoquan He <bhe@redhat.com> Cc: Eric DeVolder <eric_devolder@yahoo.com> Cc: Ignat Korchagin <ignat@cloudflare.com> Cc: kernel test robot <lkp@intel.com> Cc: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2023-12-12loongarch, kexec: change dependency of object filesBaoquan He
Patch series "kexec: fix the incorrect ifdeffery and dependency of CONFIG_KEXEC". The select of KEXEC for CRASH_DUMP in kernel/Kconfig.kexec will be dropped, then compiling errors will be triggered if below config items are set: === CONFIG_CRASH_CORE=y CONFIG_KEXEC_CORE=y CONFIG_CRASH_DUMP=y === E.g on mips, below link error are seen: -------------------------------------------------------------------- mipsel-linux-ld: kernel/kexec_core.o: in function `kimage_free': kernel/kexec_core.c:(.text+0x2200): undefined reference to `machine_kexec_cleanup' mipsel-linux-ld: kernel/kexec_core.o: in function `__crash_kexec': kernel/kexec_core.c:(.text+0x2480): undefined reference to `machine_crash_shutdown' mipsel-linux-ld: kernel/kexec_core.c:(.text+0x2488): undefined reference to `machine_kexec' mipsel-linux-ld: kernel/kexec_core.o: in function `kernel_kexec': kernel/kexec_core.c:(.text+0x29b8): undefined reference to `machine_shutdown' mipsel-linux-ld: kernel/kexec_core.c:(.text+0x29c0): undefined reference to `machine_kexec' -------------------------------------------------------------------- Here, change the incorrect dependency of building kexec_core related object files, and the ifdeffery on architectures from CONFIG_KEXEC to CONFIG_KEXEC_CORE. Testing: ======== Passed on mips and loognarch with the LKP reproducer. This patch (of 5): Currently, in arch/loongarch/kernel/Makefile, building machine_kexec.o relocate_kernel.o depends on CONFIG_KEXEC. Whereas, since we will drop the select of KEXEC for CRASH_DUMP in kernel/Kconfig.kexec, compiling error will be triggered if below config items are set: === CONFIG_CRASH_CORE=y CONFIG_KEXEC_CORE=y CONFIG_CRASH_DUMP=y === --------------------------------------------------------------- loongarch64-linux-ld: kernel/kexec_core.o: in function `.L209': >> kexec_core.c:(.text+0x1660): undefined reference to `machine_kexec_cleanup' loongarch64-linux-ld: kernel/kexec_core.o: in function `.L287': >> kexec_core.c:(.text+0x1c5c): undefined reference to `machine_crash_shutdown' >> loongarch64-linux-ld: kexec_core.c:(.text+0x1c64): undefined reference to `machine_kexec' loongarch64-linux-ld: kernel/kexec_core.o: in function `.L2^B5': >> kexec_core.c:(.text+0x2090): undefined reference to `machine_shutdown' loongarch64-linux-ld: kexec_core.c:(.text+0x20a0): undefined reference to `machine_kexec' --------------------------------------------------------------- Here, change the dependency of machine_kexec.o relocate_kernel.o to CONFIG_KEXEC_CORE can fix above building error. Link: https://lkml.kernel.org/r/20231208073036.7884-1-bhe@redhat.com Link: https://lkml.kernel.org/r/20231208073036.7884-2-bhe@redhat.com Signed-off-by: Baoquan He <bhe@redhat.com> Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202311300946.kHE9Iu71-lkp@intel.com/ Cc: Eric DeVolder <eric_devolder@yahoo.com> Cc: Ignat Korchagin <ignat@cloudflare.com> Cc: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2023-12-12riscv: fix VMALLOC_START definitionBaoquan He
When below config items are set, compiler complained: -------------------- CONFIG_CRASH_CORE=y CONFIG_KEXEC_CORE=y CONFIG_CRASH_DUMP=y ...... ----------------------- ------------------------------------------------------------------- arch/riscv/kernel/crash_core.c: In function 'arch_crash_save_vmcoreinfo': arch/riscv/kernel/crash_core.c:11:58: warning: format '%lx' expects argument of type 'long unsigned int', but argument 2 has type 'int' [-Wformat=] 11 | vmcoreinfo_append_str("NUMBER(VMALLOC_START)=0x%lx\n", VMALLOC_START); | ~~^ | | | long unsigned int | %x ---------------------------------------------------------------------- This is because on riscv macro VMALLOC_START has different type when CONFIG_MMU is set or unset. arch/riscv/include/asm/pgtable.h: -------------------------------------------------- Changing it to _AC(0, UL) in case CONFIG_MMU=n can fix the warning. Link: https://lkml.kernel.org/r/ZW7OsX4zQRA3mO4+@MiWiFi-R3L-srv Signed-off-by: Baoquan He <bhe@redhat.com> Reported-by: Randy Dunlap <rdunlap@infradead.org> Acked-by: Randy Dunlap <rdunlap@infradead.org> Tested-by: Randy Dunlap <rdunlap@infradead.org> # build-tested Cc: Eric DeVolder <eric_devolder@yahoo.com> Cc: Ignat Korchagin <ignat@cloudflare.com> Cc: Stephen Rothwell <sfr@canb.auug.org.au> Cc: Paul Walmsley <paul.walmsley@sifive.com> Cc: Palmer Dabbelt <palmer@dabbelt.com> Cc: Albert Ou <aou@eecs.berkeley.edu> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2023-12-12kexec: drop dependency on ARCH_SUPPORTS_KEXEC from CRASH_DUMPIgnat Korchagin
In commit f8ff23429c62 ("kernel/Kconfig.kexec: drop select of KEXEC for CRASH_DUMP") we tried to fix a config regression, where CONFIG_CRASH_DUMP required CONFIG_KEXEC. However, it was not enough at least for arm64 platforms. While further testing the patch with our arm64 config I noticed that CONFIG_CRASH_DUMP is unavailable in menuconfig. This is because CONFIG_CRASH_DUMP still depends on the new CONFIG_ARCH_SUPPORTS_KEXEC introduced in commit 91506f7e5d21 ("arm64/kexec: refactor for kernel/Kconfig.kexec") and on arm64 CONFIG_ARCH_SUPPORTS_KEXEC requires CONFIG_PM_SLEEP_SMP=y, which in turn requires either CONFIG_SUSPEND=y or CONFIG_HIBERNATION=y neither of which are set in our config. Given that we already established that CONFIG_KEXEC (which is a switch for kexec system call itself) is not required for CONFIG_CRASH_DUMP drop CONFIG_ARCH_SUPPORTS_KEXEC dependency as well. The arm64 kernel builds just fine with CONFIG_CRASH_DUMP=y and with both CONFIG_KEXEC=n and CONFIG_KEXEC_FILE=n after f8ff23429c62 ("kernel/Kconfig.kexec: drop select of KEXEC for CRASH_DUMP") and this patch are applied given that the necessary shared bits are included via CONFIG_KEXEC_CORE dependency. [bhe@redhat.com: don't export some symbols when CONFIG_MMU=n] Link: https://lkml.kernel.org/r/ZW03ODUKGGhP1ZGU@MiWiFi-R3L-srv [bhe@redhat.com: riscv, kexec: fix dependency of two items] Link: https://lkml.kernel.org/r/ZW04G/SKnhbE5mnX@MiWiFi-R3L-srv Link: https://lkml.kernel.org/r/20231129220409.55006-1-ignat@cloudflare.com Fixes: 91506f7e5d21 ("arm64/kexec: refactor for kernel/Kconfig.kexec") Signed-off-by: Ignat Korchagin <ignat@cloudflare.com> Signed-off-by: Baoquan He <bhe@redhat.com> Acked-by: Baoquan He <bhe@redhat.com> Cc: Alexander Gordeev <agordeev@linux.ibm.com> Cc: <stable@vger.kernel.org> # 6.6+: f8ff234: kernel/Kconfig.kexec: drop select of KEXEC for CRASH_DUMP Cc: <stable@vger.kernel.org> # 6.6+ Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2023-12-12riscv: hwprobe: export Zfa ISA extensionClément Léger
Export Zfa ISA extension[1] through hwprobe. Link: https://drive.google.com/file/d/1VT6QIggpb59-8QRV266dEE4T8FZTxGq4/view [1] Signed-off-by: Clément Léger <cleger@rivosinc.com> Reviewed-by: Evan Green <evan@rivosinc.com> Link: https://lore.kernel.org/r/20231114141256.126749-20-cleger@rivosinc.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
2023-12-12riscv: add ISA extension parsing for ZfaClément Léger
Add parsing for Zfa ISA extension [1] which were ratified in commit 056b6ff467c7 ("Zfa is ratified") of riscv-isa-manual[2]. Link: https://drive.google.com/file/d/1VT6QIggpb59-8QRV266dEE4T8FZTxGq4/view [1] Link: https://github.com/riscv/riscv-isa-manual/commits/056b6ff467c7 [2] Signed-off-by: Clément Léger <cleger@rivosinc.com> Reviewed-by: Evan Green <evan@rivosinc.com> Link: https://lore.kernel.org/r/20231114141256.126749-19-cleger@rivosinc.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
2023-12-12riscv: hwprobe: export Zvfh[min] ISA extensionsClément Léger
Export Zvfh[min] ISA extension[1] through hwprobe. Link: https://drive.google.com/file/d/1_Yt60HGAf1r1hx7JnsIptw0sqkBd9BQ8/view [1] Signed-off-by: Clément Léger <cleger@rivosinc.com> Reviewed-by: Evan Green <evan@rivosinc.com> Link: https://lore.kernel.org/r/20231114141256.126749-17-cleger@rivosinc.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
2023-12-12riscv: add ISA extension parsing for Zvfh[min]Clément Léger
Add parsing for Zvfh[min] ISA extension[1] which were ratified in june 2023 around commit e2ccd0548d6c ("Remove draft warnings from Zvfh[min]") in riscv-v-spec[2]. Link: https://drive.google.com/file/d/1_Yt60HGAf1r1hx7JnsIptw0sqkBd9BQ8/view [1] Link: https://github.com/riscv/riscv-v-spec/commits/e2ccd0548d6c [2] Signed-off-by: Clément Léger <cleger@rivosinc.com> Reviewed-by: Evan Green <evan@rivosinc.com> Link: https://lore.kernel.org/r/20231114141256.126749-16-cleger@rivosinc.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
2023-12-12riscv: hwprobe: export Zhintntl ISA extensionClément Léger
Export Zihintntl extension[1] through hwprobe. Link: https://drive.google.com/file/d/13_wsN8YmRfH8YWysFyTX-DjTkCnBd9hj/view [1] Signed-off-by: Clément Léger <cleger@rivosinc.com> Reviewed-by: Evan Green <evan@rivosinc.com> Link: https://lore.kernel.org/r/20231114141256.126749-14-cleger@rivosinc.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
2023-12-12riscv: add ISA extension parsing for ZihintntlClément Léger
Add parsing for Zihintntl ISA extension[1] that was ratified in commit 0dc91f5 ("Zihintntl is ratified") of riscv-isa-manual[2]. Link: https://drive.google.com/file/d/13_wsN8YmRfH8YWysFyTX-DjTkCnBd9hj/view [1] Link: https://github.com/riscv/riscv-isa-manual/commit/0dc91f505e6d [2] Signed-off-by: Clément Léger <cleger@rivosinc.com> Reviewed-by: Evan Green <evan@rivosinc.com> Link: https://lore.kernel.org/r/20231114141256.126749-13-cleger@rivosinc.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
2023-12-12riscv: hwprobe: export Zfh[min] ISA extensionsClément Léger
Export Zfh[min] ISA extensions[1] through hwprobe only if FPU support is available. Link: https://drive.google.com/file/d/1z3tQQLm5ALsAD77PM0l0CHnapxWCeVzP/view [1] Signed-off-by: Clément Léger <cleger@rivosinc.com> Reviewed-by: Evan Green <evan@rivosinc.com> Link: https://lore.kernel.org/r/20231114141256.126749-11-cleger@rivosinc.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
2023-12-12riscv: add ISA extension parsing for Zfh/Zfh[min]Clément Léger
Add parsing for Zfh[min] ISA extensions[1]. Link: https://drive.google.com/file/d/1z3tQQLm5ALsAD77PM0l0CHnapxWCeVzP/view [1] Signed-off-by: Clément Léger <cleger@rivosinc.com> Reviewed-by: Evan Green <evan@rivosinc.com> Link: https://lore.kernel.org/r/20231114141256.126749-10-cleger@rivosinc.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
2023-12-12riscv: hwprobe: export vector crypto ISA extensionsClément Léger
Export Zv* vector crypto ISA extensions that were added in "RISC-V Cryptography Extensions Volume II" specification[1] through hwprobe. This adds support for the following instructions: - Zvbb: Vector Basic Bit-manipulation - Zvbc: Vector Carryless Multiplication - Zvkb: Vector Cryptography Bit-manipulation - Zvkg: Vector GCM/GMAC. - Zvkned: NIST Suite: Vector AES Block Cipher - Zvknh[ab]: NIST Suite: Vector SHA-2 Secure Hash - Zvksed: ShangMi Suite: SM4 Block Cipher - Zvksh: ShangMi Suite: SM3 Secure Hash - Zvknc: NIST Algorithm Suite with carryless multiply - Zvkng: NIST Algorithm Suite with GCM. - Zvksc: ShangMi Algorithm Suite with carryless multiplication - Zvksg: ShangMi Algorithm Suite with GCM. - Zvkt: Vector Data-Independent Execution Latency. Zvkn and Zvks are ommited since they are a superset of other extensions. Link: https://drive.google.com/file/d/1gb9OLH-DhbCgWp7VwpPOVrrY6f3oSJLL/view [1] Signed-off-by: Clément Léger <cleger@rivosinc.com> Reviewed-by: Evan Green <evan@rivosinc.com> Link: https://lore.kernel.org/r/20231114141256.126749-8-cleger@rivosinc.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
2023-12-12riscv: add ISA extension parsing for vector cryptoClément Léger
Add parsing of some Zv* vector crypto ISA extensions that are mentioned in "RISC-V Cryptography Extensions Volume II" [1]. These ISA extensions are the following: - Zvbb: Vector Basic Bit-manipulation - Zvbc: Vector Carryless Multiplication - Zvkb: Vector Cryptography Bit-manipulation - Zvkg: Vector GCM/GMAC. - Zvkned: NIST Suite: Vector AES Block Cipher - Zvknh[ab]: NIST Suite: Vector SHA-2 Secure Hash - Zvksed: ShangMi Suite: SM4 Block Cipher - Zvksh: ShangMi Suite: SM3 Secure Hash - Zvkn: NIST Algorithm Suite - Zvknc: NIST Algorithm Suite with carryless multiply - Zvkng: NIST Algorithm Suite with GCM. - Zvks: ShangMi Algorithm Suite - Zvksc: ShangMi Algorithm Suite with carryless multiplication - Zvksg: ShangMi Algorithm Suite with GCM. - Zvkt: Vector Data-Independent Execution Latency. Link: https://drive.google.com/file/d/1gb9OLH-DhbCgWp7VwpPOVrrY6f3oSJLL/view [1] Signed-off-by: Clément Léger <cleger@rivosinc.com> Link: https://lore.kernel.org/r/20231114141256.126749-7-cleger@rivosinc.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
2023-12-12riscv: hwprobe: add support for scalar crypto ISA extensionsClément Léger
Export the following scalar crypto extensions through hwprobe: - Zbkb - Zbkc - Zbkx - Zknd - Zkne - Zknh - Zksed - Zksh - Zkt Signed-off-by: Clément Léger <cleger@rivosinc.com> Link: https://lore.kernel.org/r/20231114141256.126749-5-cleger@rivosinc.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
2023-12-12riscv: add ISA extension parsing for scalar cryptoEvan Green
The Scalar Crypto specification defines Zk as a shorthand for the Zkn, Zkr and Zkt extensions. The same follows for both Zkn, Zks and Zbk, which are all shorthands for various other extensions. The detailed breakdown can be found in their dt-binding entries. Since Zkn also implies the Zbkb, Zbkc and Zbkx extensions, simply passing "zk" through a DT should enable all of Zbkb, Zbkc, Zbkx, Zkn, Zkr and Zkt. For example, setting the "riscv,isa" DT property to "rv64imafdc_zk" should generate the following cpuinfo output: "rv64imafdc_zicntr_zicsr_zifencei_zihpm_zbkb_zbkc_zbkx_zknd_zkne_zknh_zkr_zkt" riscv_isa_ext_data grows a pair of new members, to permit setting the relevant bits for "bundled" extensions, both while parsing the ISA string and the new dedicated extension properties. Co-developed-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Evan Green <evan@rivosinc.com> Signed-off-by: Clément Léger <cleger@rivosinc.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20231114141256.126749-4-cleger@rivosinc.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
2023-12-12riscv: hwprobe: export missing Zbc ISA extensionClément Léger
While Zba and Zbb were exported through hwprobe, Zbc was not. Export it. Signed-off-by: Clément Léger <cleger@rivosinc.com> Link: https://lore.kernel.org/r/20231114141256.126749-3-cleger@rivosinc.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
2023-12-12riscv: add ISA extension parsing for ZbcClément Léger
Zbc was documented in the dt-bindings but actually not supported in ISA string parsing. Add it. Signed-off-by: Clément Léger <cleger@rivosinc.com> Link: https://lore.kernel.org/r/20231114141256.126749-2-cleger@rivosinc.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
2023-12-12arm64: dts: rockchip: Add Anbernic RG351VChris Morgan
Add support for the Anbernic RG351V, which is a handheld gaming console from Anbernic with an RK3326 SoC, a 640x480 LCD display, a single analog joystick with several face buttons, two USB C ports, and internal WiFi over USB. All hardware has been tested as working except for the battery, which will require further modification to the mainline rk817 battery driver before it can be used (the device was built without a shunt resistor, and as such the battery cannot measure current; only voltage). Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Link: https://lore.kernel.org/r/20231120230131.57705-4-macroalpha82@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-12arm64: dts: rockchip: Split RG351M from Odroid Go AdvanceChris Morgan
Split the RG351M into its own DTSI file. The RG351M, unlike the Odroid Go Advance, has no ADC joysticks, no GPIO buttons (except for volume on the RG351V), a PWM vibrator that interferes with an Odroid regulator, and different LEDs. Split the RG351M into a DTSI file that can then be imported into the DTS files for the RG351M and a new RG351V. Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Link: https://lore.kernel.org/r/20231120230131.57705-3-macroalpha82@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-12arm64: dts: rockchip: Add ethernet0 alias to the dts for RK3588(S) boardsDragan Simic
Add ethernet0 alias to the board dts files for a few supported RK3588 and RK3588S boards that had it missing. Signed-off-by: Dragan Simic <dsimic@manjaro.org> Link: https://lore.kernel.org/r/9af2026bf8a5538aff627381289cb06f2fab4263.1702368023.git.dsimic@manjaro.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-12arm64: dts: rockchip: Add ethernet0 alias to the dts for RK3566 boardsDragan Simic
Add ethernet0 alias to the board dts files for a few supported RK3566 boards that had it missing. Also, remove the ethernet0 alias from one RK3566 SoM dtsi file, which doesn't enable the GMAC, and add the ethernet0 alias back to the dependent board dts files, which actually enable the GMAC. Signed-off-by: Dragan Simic <dsimic@manjaro.org> Link: https://lore.kernel.org/r/d2a272e0ae0fff0adfab8bb0238243b11d348799.1702368023.git.dsimic@manjaro.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-12arm64: dts: rockchip: Remove ethernet0 alias from the SoC dtsi for PX30Dragan Simic
Not all supported boards actually use the PX30's built-in (G)MAC, while the SoC TRM and the datasheet don't define some standard numbering in this case. Thus, remove the ethernet0 alias from the PX30 SoC dtsi file, and add the same alias back to the appropriate board dts(i) files. This is quite similar to the already performed migration of the mmcX aliases from the Rockchip SoC dtsi files to the board dts(i) files. Signed-off-by: Dragan Simic <dsimic@manjaro.org> Link: https://lore.kernel.org/r/0d9da8959b4f567622676c34b5feb74c49489554.1702366958.git.dsimic@manjaro.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-12arm64: dts: rockchip: Remove ethernetX aliases from the SoC dtsi for RK3328Dragan Simic
Not all supported boards actually use the RK3328's built-in GMACs, while the SoC TRM and the datasheet don't define some standard numbering in this case. Thus, remove the ethernet0 and ethernet1 aliases from the RK3328 SoC dtsi file, and add the same alias back to the appropriate board dts(i) files. These changes also touch one RK3318-based board dts, because it actually depends on the RK3328 SoC dtsi and enables one of the GMACs. This is quite similar to the already performed migration of the mmcX aliases from the Rockchip SoC dtsi files to the board dts(i) files. Signed-off-by: Dragan Simic <dsimic@manjaro.org> Link: https://lore.kernel.org/r/0c14f2e354d32f5d45c718ce16643553ca72f6a5.1702366958.git.dsimic@manjaro.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-12arm64: dts: rockchip: Remove ethernet0 alias from the SoC dtsi for RK3368Dragan Simic
Not all supported boards actually use the RK3368's built-in GMAC, while the SoC TRM and the datasheet don't define some standard numbering in this case. Thus, remove the ethernet0 alias from the RK3368 SoC dtsi file, and add the same alias back to the appropriate board dts(i) files. This is quite similar to the already performed migration of the mmcX aliases from the Rockchip SoC dtsi files to the board dts(i) files. Signed-off-by: Dragan Simic <dsimic@manjaro.org> Link: https://lore.kernel.org/r/77115184d633190c917d868f883070e100d93dbc.1702366958.git.dsimic@manjaro.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-12arm64: dts: rockchip: Remove ethernet0 alias from the SoC dtsi for RK3399Dragan Simic
Not all supported boards actually use the RK3399's built-in GMAC, while the SoC TRM and the datasheet don't define some standard numbering in this case. Thus, remove the ethernet0 alias from the RK3399 SoC dtsi file, and add the same alias back to the appropriate board dts(i) files. This is quite similar to the already performed migration of the mmcX aliases from the Rockchip SoC dtsi files to the board dts(i) files. Signed-off-by: Dragan Simic <dsimic@manjaro.org> Link: https://lore.kernel.org/r/20879826c01fb9ead71c339866846ea794669802.1702366958.git.dsimic@manjaro.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-12arm64: dts: rockchip: make dts use gpio-fan matrix instead of arrayDavid Heidelberg
No functional changes. Adjust to comply with dt-schema requirements and make possible to validate values. Acked-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: David Heidelberg <david@ixit.cz> Link: https://lore.kernel.org/r/20231209171653.85468-2-david@ixit.cz Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-12arm64: dts: rockchip: add gpio alias for gpio dt nodesJohan Jonker
Rockchip SoC TRM, SoC datasheet and board schematics always refer to the same gpio numbers - even if not all are used for a specific board. In order to not have to re-define them for every board add the aliases to SoC dtsi files. Co-developed-by: Jianqun Xu <jay.xu@rock-chips.com> Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com> Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Dragan Simic <dsimic@manjaro.org> Link: https://lore.kernel.org/r/56daeead-1d35-44bb-00c0-614b84a986de@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-12arm64: dts: rockchip: Add dynamic-power-coefficient to rk3399 GPULukasz Luba
Add dynamic-power-coefficient to the GPU node. That will create Energy Model for the GPU based on the coefficient and OPP table information. It will enable mechanism such as DTMP or IPA to work with the GPU DVFS. In similar way the Energy Model for CPUs in rk3399 is created, so both are aligned in power scale. The maximum power used from this coefficient is 1.5W at 600MHz. Signed-off-by: Lukasz Luba <lukasz.luba@arm.com> Link: https://lore.kernel.org/r/20231127081511.1911706-1-lukasz.luba@arm.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-12arm64: dts: rockchip: add rk3588 spi aliases to soc dtsiHeiko Stuebner
The spi controllers on rk3588 are named spi0 - spi4. Board schematics also use these exact numbers and we want those names to also reflect in the OS devices because everything else would just cause confusion. Userspace spi access is a thing afterall. To prevent each board repeating their list of spi aliases, define them in the soc dtsi, as previous Rockchip soc like the rk356x do already. Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de> Reviewed-by: Dragan Simic <dsimic@manjaro.org> Link: https://lore.kernel.org/r/20231205164842.556684-5-heiko@sntech.de
2023-12-12arm64: dts: rockchip: add rk3588 gpio aliases to soc dtsiHeiko Stuebner
The gpio controllers on rk3588 are named gpio0 - gpio4. Board schematics also use these exact numbers and we want those names to also reflect in the OS devices because everything else would just cause confusion. Userspace gpio access is a thing afterall. To prevent each board repeating their list of gpio aliases, define them in the soc dtsi, as previous Rockchip soc like the rk356x do already. Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de> Reviewed-by: Dragan Simic <dsimic@manjaro.org> Link: https://lore.kernel.org/r/20231205164842.556684-4-heiko@sntech.de
2023-12-12arm64: dts: rockchip: add rk3588 i2c aliases to soc dtsiHeiko Stuebner
The i2c controllers on rk3588 are named i2c0 - i2c8. Board schematics also use these exact numbers and we want those names to also reflect in the OS devices because everything else would just cause confusion. Userspace i2c access is a thing afterall. To prevent each board repeating their list of i2c aliases, define them in the soc dtsi, as all previous Rockchip soc do already. Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de> Reviewed-by: Dragan Simic <dsimic@manjaro.org> Link: https://lore.kernel.org/r/20231205164842.556684-3-heiko@sntech.de
2023-12-12arm64: dts: rockchip: move rk3588 serial aliases to soc dtsiHeiko Stuebner
The serial ports on rk3588 are named uart0 - uart9. Board schematics also use these exact numbers and we want those names to also reflect in the OS devices because everything else would just cause confusion. To prevent each board repeating their list of serial aliases, move them to the soc dtsi, as all previous Rockchip soc do already. Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de> Reviewed-by: Dragan Simic <dsimic@manjaro.org> Link: https://lore.kernel.org/r/20231205164842.556684-2-heiko@sntech.de
2023-12-12arm64: dts: rockchip: add Theobroma Jaguar SBCHeiko Stuebner
Add a board dts for the Jaguar SBC from Theobroma-Systems JAGUAR is a Single-Board Computer (SBC) based around the rk3588 SoC and is targeting Autonomous Mobile Robots (AMR). It features: * LPDDR4X (up to 16GB) * 1Gbps Ethernet on RJ45 connector (KSZ9031 or KSZ9131) * PCIe 3.0 4-lane on M.2 M-key connector * PCIe 2.1 1-lane on M.2 E-key * USB 2.0 on M.2 E-key * 2x USB3 OTG type-c ports with DP Alt-Mode * USB2 host port * HDMI output * 2x camera connectors, each exposing: * 2-lane MIPI-CSI * 1v2, 1v8, 2v8 power rails * I2C bus * GPIOs * PPS input * CAN * RS485 UART * FAN connector * SD card slot * eMMC (up to 256GB) * RTC backup battery * Companion microcontroller * ISL1208 RTC emulation * AMC6821 PWM emulation * On/off buzzer control * Secure Element * 80-pin Mezzanine connector for daughterboards: * GPIOs * 1Gbps Ethernet * PCIe 2.1 1-lane * 2x 2-lane MIPI-CSI * ADC channel * I2C bus * PWM * UART * SPI * SDIO * CAN * I2S * 1v8, 3v3, 5v0, dc-in (12-24V) power rails Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de> Link: https://lore.kernel.org/r/20231201191103.343097-3-heiko@sntech.de
2023-12-12arm64: dts: rockchip: Add Powkiddy X55Chris Morgan
Add support for the Powkiddy X55. The Powkiddy X55 is a handheld gaming device with a 720p 5.5 inch screen powered by the Rockchip RK3566 SoC. It includes a Realtek 8821cs WiFi/BT module, 2 ADC joysticks powered by 4 dedicated ADC channels, and several GPIO face buttons. There are 2 SDMMC slots (sdmmc1 and sdmmc3), and an 8GB internal eMMC. Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Link: https://lore.kernel.org/r/20231204185719.569021-11-macroalpha82@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-12arm64: dts: rockchip: add USB3 host to rock-5aSebastian Reichel
Enable USB3 host controller for the Radxa ROCK 5 Model A. This adds USB3 for the lower USB3 port (the one closer to the PCB). The upper USB3 port uses the RK3588 USB TypeC host controller, which use a different PHY without upstream support. Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20231106155934.80838-2-sebastian.reichel@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-12arm64: dts: rockchip: add USB3 host to rock-5bSebastian Reichel
Enable USB3 host controller for the Radxa ROCK 5 Model B. This adds USB3 for the upper USB3 port (the one further away from the PCB). The lower USB3 and the USB-C ports use the RK3588 USB TypeC host controller, which use a different PHY without upstream support. Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20231106155934.80838-1-sebastian.reichel@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-12arm64: dts: rockchip: add missing tx/rx-fifo-depth for rk3328 gmacshironeko
Without fifo depths attempting to change the MTU will fail. These values are from the RK3328 Technical Reference Manual, gmac2io interface tested with Rock64. Signed-off-by: shironeko <shironeko@tesaguri.club> Link: https://lore.kernel.org/r/20231116214042.11134-2-shironeko@tesaguri.club Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-12arm64: dts: rockchip: add gpio-line-names to rk3308-rock-pi-sTrevor Woerner
Add names to the pins of the general-purpose expansion header as given in the Radxa GPIO page[1] following the conventions in the kernel documentation[2] to make it easier for users to correlate the pins with functions when using utilities such as gpioinfo. [1] https://wiki.radxa.com/RockpiS/hardware/gpio [2] Documentation/devicetree/bindings/gpio/gpio.txt Signed-off-by: Trevor Woerner <twoerner@gmail.com> Link: https://lore.kernel.org/r/20231120162232.27653-1-twoerner@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-12ARM: dts: rockchip: add hdmi-connector node to rk3036-kylinJohan Jonker
Add hdmi-connector node to comply with the inno_hdmi binding. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/f5bc182b-f9b6-26a8-8649-19ce33e3c0e1@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-12ARM: dts: rockchip: fix rk3036 hdmi ports nodeJohan Jonker
Fix hdmi ports node so that it matches the rockchip,inno-hdmi.yaml binding. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/9a2afac1-ed5c-382d-02b0-b2f5f1af3abb@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-12riscv: dts: thead: Enable LicheePi 4A eMMC and microSDDrew Fustini
Add emmc node properties for the eMMC device and add sdio0 node properties for the microSD slot. Set the frequency for the sdhci reference clock. Signed-off-by: Drew Fustini <dfustini@baylibre.com> Reviewed-by: Guo Ren <guoren@kernel.org> Reviewed-by: Jisheng Zhang <jszhang@kernel.org> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2023-12-12riscv: dts: thead: Enable BeagleV Ahead eMMC and microSDDrew Fustini
Add emmc node properties for the eMMC device and add sdio0 node properties for the microSD slot. Set the frequency for the sdhci reference clock. Signed-off-by: Drew Fustini <dfustini@baylibre.com> Reviewed-by: Guo Ren <guoren@kernel.org> Reviewed-by: Jisheng Zhang <jszhang@kernel.org> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
generated by cgit (git 2.34.1) at 2025-09-22 17:52:06 +0000