summaryrefslogtreecommitdiff
path: root/arch
AgeCommit message (Collapse)Author
2021-01-30powerpc/mce: Include prototypesCédric Le Goater
It fixes these W=1 compile errors : ../arch/powerpc/kernel/mce.c:591:14: error: no previous prototype for ‘machine_check_early’ [-Werror=missing-prototypes] 591 | long notrace machine_check_early(struct pt_regs *regs) | ^~~~~~~~~~~~~~~~~~~ ../arch/powerpc/kernel/mce.c:725:6: error: no previous prototype for ‘hmi_exception_realmode’ [-Werror=missing-prototypes] 725 | long hmi_exception_realmode(struct pt_regs *regs) | ^~~~~~~~~~~~~~~~~~~~~~ Signed-off-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20210104143206.695198-8-clg@kaod.org
2021-01-30powerpc/setup_64: Make some routines staticCédric Le Goater
The following routines are only called by local services and do not need to be external symbols. It fixes these W=1 errors : ../arch/powerpc/kernel/setup_64.c:261:13: error: no previous prototype for ‘record_spr_defaults’ [-Werror=missing-prototypes] 261 | void __init record_spr_defaults(void) | ^~~~~~~~~~~~~~~~~~~ ../arch/powerpc/kernel/setup_64.c:1011:6: error: no previous prototype for ‘entry_flush_enable’ [-Werror=missing-prototypes] 1011 | void entry_flush_enable(bool enable) | ^~~~~~~~~~~~~~~~~~ ../arch/powerpc/kernel/setup_64.c:1023:6: error: no previous prototype for ‘uaccess_flush_enable’ [-Werror=missing-prototypes] 1023 | void uaccess_flush_enable(bool enable) | ^~~~~~~~~~~~~~~~~~~~ Signed-off-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20210104143206.695198-7-clg@kaod.org
2021-01-30powerpc/pmem: Include pmem prototypesCédric Le Goater
It fixes this W=1 compile error : ../arch/powerpc/lib/pmem.c:51:6: error: no previous prototype for ‘arch_wb_cache_pmem’ [-Werror=missing-prototypes] 51 | void arch_wb_cache_pmem(void *addr, size_t size) | ^~~~~~~~~~~~~~~~~~ ../arch/powerpc/lib/pmem.c:58:6: error: no previous prototype for ‘arch_invalidate_pmem’ [-Werror=missing-prototypes] 58 | void arch_invalidate_pmem(void *addr, size_t size) | ^~~~~~~~~~~~~~~~~~~~ Fixes: 32ce3862af3c ("powerpc/lib: Implement PMEM API") Signed-off-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20210104143206.695198-6-clg@kaod.org
2021-01-30powerpc/pseries/ras: Make init_ras_hotplug_IRQ() staticCédric Le Goater
init_ras_hotplug_IRQ() is a local routine used by a machine init call and it doesn't need to be external. It fixes this W=1 compile error: ../arch/powerpc/platforms/pseries/ras.c:125:12: error: no previous prototype for ‘init_ras_hotplug_IRQ’ [-Werror=missing-prototypes] 125 | int __init init_ras_hotplug_IRQ(void) | ^~~~~~~~~~~~~~~~~~~~ Fixes: c9dccf1d074a ("powerpc/pseries: Enable RAS hotplug events later") Signed-off-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20210104143206.695198-5-clg@kaod.org
2021-01-30powerpc/pseries/eeh: Make pseries_pcibios_bus_add_device() staticCédric Le Goater
pseries_pcibios_bus_add_device() is a local routine defining the pcibios_bus_add_device() handler of the pseries machine in eeh_pseries_init(). It doesn't need to be external. It fixes this W=1 compile error: ../arch/powerpc/platforms/pseries/eeh_pseries.c:46:6: error: no previous prototype for ‘pseries_pcibios_bus_add_device’ [-Werror=missing-prototypes] 46 | void pseries_pcibios_bus_add_device(struct pci_dev *pdev) | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Fixes: dae7253f9f78 ("powerpc/pseries: Add pseries SR-IOV Machine dependent calls") Signed-off-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20210104143206.695198-4-clg@kaod.org
2021-01-30powerpc/pseries/ras: Remove unused variable 'status'Cédric Le Goater
The last use of 'status' was removed in 2012. Remove the variable to fix this W=1 compile error. ../arch/powerpc/platforms/pseries/ras.c: In function ‘ras_epow_interrupt’: ../arch/powerpc/platforms/pseries/ras.c:318:6: error: variable ‘status’ set but not used [-Werror=unused-but-set-variable] 318 | int status; | ^~~~~~ Fixes: 55fc0c561742 ("powerpc/pseries: Parse and handle EPOW interrupts") Signed-off-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20210104143206.695198-3-clg@kaod.org
2021-01-30powerpc/mm: Include __find_linux_pte() prototypeCédric Le Goater
It fixes this W=1 compile error : ../arch/powerpc/mm/pgtable.c:337:8: error: no previous prototype for ‘__find_linux_pte’ [-Werror=missing-prototypes] 337 | pte_t *__find_linux_pte(pgd_t *pgdir, unsigned long ea, | ^~~~~~~~~~~~~~~~ Signed-off-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20210104143206.695198-2-clg@kaod.org
2021-01-30powerpc/perf/hv-24x7: Dont create sysfs event files for dummy eventsKajol Jain
The hv_24x7 performance monitoring unit creates a list of supported events from the event catalog obtained via HCALL. The hv_24x7 catalog could also contain invalid or dummy events with names like RESERVED*. These events do not have any hardware counters backing them. Add a check to string compare the event names to filter such events out. Result on power9 machine: Before this patch: ..... hv_24x7/PM_XLINK2_OUT_ODD_CYC,chip=?/ [Kernel PMU event] hv_24x7/PM_XLINK2_OUT_ODD_DATA_COUNT,chip=?/ [Kernel PMU event] hv_24x7/PM_XLINK2_OUT_ODD_TOTAL_UTIL,chip=?/ [Kernel PMU event] hv_24x7/PM_XTS_ATR_DEMAND_CHECKOUT,chip=?/ [Kernel PMU event] hv_24x7/PM_XTS_ATR_DEMAND_CHECKOUT_MISS,chip=?/ [Kernel PMU event] hv_24x7/PM_XTS_ATSD_SENT,chip=?/ [Kernel PMU event] hv_24x7/PM_XTS_ATSD_TLBI_RCV,chip=?/ [Kernel PMU event] hv_24x7/RESERVED_NEST1,chip=?/ [Kernel PMU event] hv_24x7/RESERVED_NEST10,chip=?/ [Kernel PMU event] hv_24x7/RESERVED_NEST11,chip=?/ [Kernel PMU event] hv_24x7/RESERVED_NEST12,chip=?/ [Kernel PMU event] hv_24x7/RESERVED_NEST13,chip=?/ [Kernel PMU event] ...... dmesg: [ 0.000362] printk: console [hvc0] enabled [ 0.815452] hv-24x7: read 1530 catalog entries, created 537 event attrs (0 failures), 275 descs After this patch: ...... hv_24x7/PM_XLINK2_OUT_ODD_AVLBL_CYC,chip=?/ [Kernel PMU event] hv_24x7/PM_XLINK2_OUT_ODD_CYC,chip=?/ [Kernel PMU event] hv_24x7/PM_XLINK2_OUT_ODD_DATA_COUNT,chip=?/ [Kernel PMU event] hv_24x7/PM_XLINK2_OUT_ODD_TOTAL_UTIL,chip=?/ [Kernel PMU event] hv_24x7/PM_XTS_ATR_DEMAND_CHECKOUT,chip=?/ [Kernel PMU event] hv_24x7/PM_XTS_ATR_DEMAND_CHECKOUT_MISS,chip=?/ [Kernel PMU event] hv_24x7/PM_XTS_ATSD_SENT,chip=?/ [Kernel PMU event] hv_24x7/PM_XTS_ATSD_TLBI_RCV,chip=?/ [Kernel PMU event] hv_24x7/TOD,chip=?/ [Kernel PMU event] ...... dmesg: [ 0.000357] printk: console [hvc0] enabled [ 0.808592] hv-24x7: read 1530 catalog entries, created 509 event attrs (0 failures), 275 descs Signed-off-by: Kajol Jain <kjain@linux.ibm.com> [mpe: Simplify ignore_event(), minor change log formatting] Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20201228085204.18026-1-kjain@linux.ibm.com
2021-01-30powerpc/64s/kuap: Use mmu_has_feature()Michael Ellerman
In commit 8150a153c013 ("powerpc/64s: Use early_mmu_has_feature() in set_kuap()") we switched the KUAP code to use early_mmu_has_feature(), to avoid a bug where we called set_kuap() before feature patching had been done, leading to recursion and crashes. That path, which called probe_kernel_read() from printk(), has since been removed, see commit 2ac5a3bf7042 ("vsprintf: Do not break early boot with probing addresses"). Additionally probe_kernel_read() no longer invokes any KUAP routines, since commit fe557319aa06 ("maccess: rename probe_kernel_{read,write} to copy_{from,to}_kernel_nofault") and c33165253492 ("powerpc: use non-set_fs based maccess routines"). So it should now be safe to use mmu_has_feature() in the KUAP routines, because we shouldn't invoke them prior to feature patching. This is essentially a revert of commit 8150a153c013 ("powerpc/64s: Use early_mmu_has_feature() in set_kuap()"), but we've since added a second usage of early_mmu_has_feature() in get_kuap(), so we convert that to use mmu_has_feature() as well. Reported-by: Christophe Leroy <christophe.leroy@csgroup.eu> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Depends-on: c33165253492 ("powerpc: use non-set_fs based maccess routines"). Link: https://lore.kernel.org/r/20201217005306.895685-1-mpe@ellerman.id.au
2021-01-29Merge tag 'arm64-fixes' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux Pull arm64 fixes from Catalin Marinas: - Fix the virt_addr_valid() returning true for < PAGE_OFFSET addresses. - Do not blindly trust the DMA masks from ACPI/IORT. * tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: ACPI/IORT: Do not blindly trust DMA masks from firmware arm64: Fix kernel address detection of __is_lm_address()
2021-01-29x86/ldt: Use tlb_gather_mmu_fullmm() when freeing LDT page-tablesWill Deacon
free_ldt_pgtables() uses the MMU gather API for batching TLB flushes over the call to free_pgd_range(). However, tlb_gather_mmu() expects to operate on user addresses and so passing LDT_{BASE,END}_ADDR will confuse the range setting logic in __tlb_adjust_range(), causing the gather to identify a range starting at TASK_SIZE. Such a large range will be converted into a 'fullmm' flush by the low-level invalidation code, so change the caller to invoke tlb_gather_mmu_fullmm() directly. Signed-off-by: Will Deacon <will@kernel.org> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Reviewed-by: Yu Zhao <yuzhao@google.com> Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org> Acked-by: Linus Torvalds <torvalds@linux-foundation.org> Link: https://lkml.kernel.org/r/20210127235347.1402-7-will@kernel.org
2021-01-29tlb: arch: Remove empty __tlb_remove_tlb_entry() stubsWill Deacon
If __tlb_remove_tlb_entry() is not defined by the architecture then we provide an empty definition in asm-generic/tlb.h. Remove the redundant empty definitions for sparc64 and x86. Suggested-by: Peter Zijlstra <peterz@infradead.org> Signed-off-by: Will Deacon <will@kernel.org> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Reviewed-by: Yu Zhao <yuzhao@google.com> Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org> Acked-by: Linus Torvalds <torvalds@linux-foundation.org> Link: https://lkml.kernel.org/r/20210127235347.1402-6-will@kernel.org
2021-01-29tlb: mmu_gather: Remove start/end arguments from tlb_gather_mmu()Will Deacon
The 'start' and 'end' arguments to tlb_gather_mmu() are no longer needed now that there is a separate function for 'fullmm' flushing. Remove the unused arguments and update all callers. Suggested-by: Linus Torvalds <torvalds@linux-foundation.org> Signed-off-by: Will Deacon <will@kernel.org> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Reviewed-by: Yu Zhao <yuzhao@google.com> Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org> Acked-by: Linus Torvalds <torvalds@linux-foundation.org> Link: https://lore.kernel.org/r/CAHk-=wjQWa14_4UpfDf=fiineNP+RH74kZeDMo_f1D35xNzq9w@mail.gmail.com
2021-01-29tlb: mmu_gather: Remove unused start/end arguments from tlb_finish_mmu()Will Deacon
Since commit 7a30df49f63a ("mm: mmu_gather: remove __tlb_reset_range() for force flush"), the 'start' and 'end' arguments to tlb_finish_mmu() are no longer used, since we flush the whole mm in case of a nested invalidation. Remove the unused arguments and update all callers. Signed-off-by: Will Deacon <will@kernel.org> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Reviewed-by: Yu Zhao <yuzhao@google.com> Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org> Acked-by: Linus Torvalds <torvalds@linux-foundation.org> Link: https://lkml.kernel.org/r/20210127235347.1402-3-will@kernel.org
2021-01-29x86/build: Disable CET instrumentation in the kernelJosh Poimboeuf
With retpolines disabled, some configurations of GCC, and specifically the GCC versions 9 and 10 in Ubuntu will add Intel CET instrumentation to the kernel by default. That breaks certain tracing scenarios by adding a superfluous ENDBR64 instruction before the fentry call, for functions which can be called indirectly. CET instrumentation isn't currently necessary in the kernel, as CET is only supported in user space. Disable it unconditionally and move it into the x86's Makefile as CET/CFI... enablement should be a per-arch decision anyway. [ bp: Massage and extend commit message. ] Fixes: 29be86d7f9cb ("kbuild: add -fcf-protection=none when using retpoline flags") Reported-by: Nikolay Borisov <nborisov@suse.com> Signed-off-by: Josh Poimboeuf <jpoimboe@redhat.com> Signed-off-by: Borislav Petkov <bp@suse.de> Reviewed-by: Nikolay Borisov <nborisov@suse.com> Tested-by: Nikolay Borisov <nborisov@suse.com> Cc: <stable@vger.kernel.org> Cc: Seth Forshee <seth.forshee@canonical.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Link: https://lkml.kernel.org/r/20210128215219.6kct3h2eiustncws@treble
2021-01-29arm64: tegra: Audio graph sound card for Jetson AGX XavierSameer Pujar
Enable support for audio-graph based sound card on Jetson AGX Xavier. Following I/O interfaces are enabled. * I2S1, I2S2, I2S4 and I2S6 * DMIC3 Signed-off-by: Sameer Pujar <spujar@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-01-29arm64: tegra: Audio graph sound card for Jetson TX2Sameer Pujar
Enable support for audio-graph based sound card on Jetson TX2. Based on the board design following I/O modules are enabled. * All I2S instances (I2S1 ... I2S6) * All DSPK instances (DSPK1, DSPK2) * DMIC1, DMIC2 and DMIC3 Signed-off-by: Sameer Pujar <spujar@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-01-29Revert "arm64: tegra: Disable the ACONNECT for Jetson TX2"Sameer Pujar
This reverts commit fb319496935b ("arm64: tegra: Disable the ACONNECT for Jetson TX2"). Signed-off-by: Sameer Pujar <spujar@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-01-29arm64: tegra: Add RT5658 device entrySameer Pujar
Jetson AGX Xavier has an on-board audio codec whicn is connected to Tegra I2S1 interface. Hence add corresponding device node for the audio codec. Signed-off-by: Sameer Pujar <spujar@nvidia.com> Reviewed-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-01-29Fix "ordering" comment typosBjorn Helgaas
Fix comment typos in "ordering". Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Kalle Valo <kvalo@codeaurora.org> Acked-by: Vasily Gorbik <gor@linux.ibm.com> # s390
2021-01-29arm64: dts: mediatek: mt8183-evb: add PWM supportFabien Parent
Enable the pwm driver and set the pinctrl for PWM A line. Signed-off-by: Fabien Parent <fparent@baylibre.com> Link: https://lore.kernel.org/r/20201209120322.137610-2-fparent@baylibre.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-01-29arm64: dts: mediatek: mt8183: add pwm nodeFabien Parent
MT8183 SoC has 4 PWMs. Add the pwm node in order to support them. Signed-off-by: Fabien Parent <fparent@baylibre.com> Link: https://lore.kernel.org/r/20201209120322.137610-1-fparent@baylibre.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-01-29ARM: tegra: ouya: Fix eMMC on specific bootloadersPeter Geis
Ouya fails to detect the eMMC module when booted via certain bootloaders. Fastboot and hard-kexec bootloaders fail while u-boot does not. It was discovered that the issue manifests if the sdmmc4 alternate configuration clock pin is input disabled. Ouya uses sdmmc4 in the primary pin configuration. It is unknown why this occurs, though it is likely related to other eMMC limitations experienced on Ouya. For now, fix it by enabling input on cam_mclk_pcc0. Fixes: d7195ac5c9c5 ("ARM: tegra: Add device-tree for Ouya") Reported-by: Matt Merhar <mattmerhar@protonmail.com> Tested-by: Matt Merhar <mattmerhar@protonmail.com> Signed-off-by: Peter Geis <pgwipeout@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-01-29arm64: dts: armada: add pwm offsets for ap/cp gpiosBaruch Siach
The 'marvell,pwm-offset' property of both GPIO blocks (per CP component) point to the same counter registers offset. The driver will decide how to use counters A/B. This is different from the convention of pwm on earlier Armada series (370/38x). On those systems the assignment of A/B counters to GPIO blocks is coded in both DT and the driver. The actual behaviour of the current driver on Armada 8K/7K is the same as earlier systems. Add also clock properties for base pwm frequency reference. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2021-01-29arm64: dts: marvell: armada-37xx: Add SATA comphy into main armada-37xx.dtsi ↵Pali Rohár
file SATA on A3720 SOC can use only comphy2, so move this definition from board specific DTS file armada-3720-espressobin.dtsi into main A3720 SOC file armada-37xx.dtsi. Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2021-01-29arm64: dts: cn913x-db: enable MMC HS400Marcin Wojtas
This patch adds necessary flags in the device tree which enable HS400 mode on AP807 MMC controller on the CN913x-DB board. Signed-off-by: Marcin Wojtas <mw@semihalf.com> Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2021-01-29arm64: dts: change AP807 SDHCI compatibility stringKonstantin Porotchkin
This patch adds new compatible string to AP807 DTSI to avoid its SDHCI controller to run in "slow mode" with disabled UHS. Signed-off-by: Marcin Wojtas <mw@semihalf.com> Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2021-01-29arm64: dts: armada-3720-turris-mox: rename u-boot mtd partition to a53-firmwareMarek Behún
The partition called "u-boot" in reality contains TF-A and U-Boot, and TF-A is before U-Boot. Rename this parition to "a53-firmware" to avoid confusion for users, since they cannot simply build U-Boot from U-Boot repository and flash the resulting image there. Instead they have to build the firmware with the sources from the mox-boot-builder repository [1] and flash the a53-firmware.bin binary there. [1] https://gitlab.nic.cz/turris/mox-boot-builder Signed-off-by: Marek Behún <kabel@kernel.org> Fixes: 7109d817db2e ("arm64: dts: marvell: add DTS for Turris Mox") Cc: Gregory CLEMENT <gregory.clement@bootlin.com> Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2021-01-29Merge tag 'omap-for-v5.12/soc-signed' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/soc SoC changes for omaps for v5.12 merge window Update email address for Roger and fix a typo * tag 'omap-for-v5.12/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: OMAP2+: fix spellint typo MAINTAINERS: Update address for OMAP GPMC driver Link: https://lore.kernel.org/r/pull-1611845066-809577@atomide.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-01-29Merge tag 'omap-for-v5.12/dt-signed' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt Devicetree changes for omaps for v5.12 merge window This includes the following earlier patches that were considered too late for v5.11 as discussed between Arnd and me on freenode #armlinux in December: - More updates to use cpsw switchdev driver - Enable gta04 PMIC power management - Updates for dra7 for ECC support, 1.8GHz speed and keep the ldo0 regulator always on as specified in the data manual And then we have the new devicetree changes: - Configure the original Amazon Echo to for audio - Configure missing thermal interrupt for omap4430 - Configure mapphone devices for passive thermal cooling, and add 1.2GHz mode. - Correct omap4430 sgx clock rate to use the runtime Android kernel value, the earlier value was for a lower power operating point - Drop turbo mode for 1GHz omap3 variants as we now have passive cooling configured - Update email address for Javier - Add new MYIR Tech Limited board support * tag 'omap-for-v5.12/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: dts: am335x-myirtech-*: Add DT for AM335X MYIR Tech Limited board ARM: dts: omap3-igep: Change email address in copyright notice ARM: dts: omap36xx: Remove turbo mode for 1GHz variants ARM: dts: omap443x: Correct sgx clock to 307.2MHz as used on motorola vendor kernel ARM: dts: motorola-mapphone: Add 1.2GHz OPP ARM: dts: motorola-mapphone: Configure lower temperature passive cooling ARM: dts: Configure missing thermal interrupt for 4430 ARM: dts: omap3-echo: Add speaker sound card support ARM: dts: dra71-evm: mark ldo0 regulator as always on ARM: dts: dra76x: add support for OPP_PLUS ARM: dts: am574x-idk: add support for EMIF1 ECC ARM: dts: omap3-gta04: fix twl4030-power settings ARM: dts: am335x-evm/evmsk/icev2: switch to new cpsw switch drv ARM: dts: am33xx-l4: add dt node for new cpsw switchdev driver Link: https://lore.kernel.org/r/pull-1611845066-809577@atomide.com-2 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-01-29Merge tag 'stm32-dt-for-v5.12-1' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/dt STM32 DT updates for v5.12, round 1 Highlights: ---------- MCU part: -Rename mmc nodes to match with yaml validation. MPU part: -Rename mmc nodes to match with yaml validation. -Move vdda1v1 & vdda1v8 (used by usbphyc) from boards files to SoC dtsi file. -LXA: -Fix leds schema for yaml validation. -DH: -Enable SDMMC1 internal pull-ups and disable CKIN feedabck clock on DHCOM. -Add SDMMC1 init state inorder to use some gpios during probing phase. -Disable KS8851 and FMC on PicoITX board. * tag 'stm32-dt-for-v5.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: ARM: dts: stm32: add #clock-cells property to usbphyc node on stm32mp151 ARM: dts: stm32: remove usbphyc ports vdda1v1 & vdda1v8 on stm32mp15 boards ARM: dts: stm32: add usbphyc vdda1v1 and vdda1v8 supplies on stm32mp151 ARM: dts: stm32: Add STM32MP1 I2C6 SDA/SCL pinmux ARM: dts: stm32: Rename mmc controller nodes to mmc@ ARM: dts: stm32: Enable voltage translator auto-detection on DHCOM ARM: dts: stm32: Add additional init state for SDMMC1 pins ARM: dts: stm32: Disable KS8851 and FMC on PicoITX board ARM: dts: stm32: Fix schema warnings for pwm-leds on lxa-mc1 ARM: dts: stm32: Disable SDMMC1 CKIN feedback clock on DHCOM ARM: dts: stm32: Enable internal pull-ups for SDMMC1 on DHCOM SoM ARM: dts: stm32: Fix GPIO hog flags on DHCOM DRC02 ARM: dts: stm32: Fix GPIO hog flags on DHCOM PicoITX ARM: dts: stm32: Fix GPIO hog names on DHCOM ARM: dts: stm32: Disable optional TSC2004 on DRC02 board ARM: dts: stm32: Disable WP on DHCOM uSD slot ARM: dts: stm32: Connect card-detect signal on DHCOM ARM: dts: stm32: Fix polarity of the DH DRC02 uSD card detect Link: https://lore.kernel.org/r/5e8897a0-8f68-5e41-bfa0-ccdf1e23a3c1@foss.st.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-01-29ARM: multi_v7_defconfig: add STM32 CEC supportYannick Fertre
Enable CEC support for STMicroelectronics as loadable module. Signed-off-by: Yannick Fertre <yannick.fertre@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> Link: https://lore.kernel.org/r/20210129084842.29123-1-alexandre.torgue@foss.st.com' Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-01-29ARM: dts: armada388-helios4: assign pinctrl to each fanRosen Penev
Split up the pins for each fan. This is needed in order to control them Fixes: ced8025b569e ("ARM: dts: armada388-helios4") Signed-off-by: Rosen Penev <rosenp@gmail.com> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2021-01-29ARM: dts: armada388-helios4: assign pinctrl to LEDsRosen Penev
Split up the pins to match earlier definitions. Allows LEDs to flash properly. Fixes: ced8025b569e ("ARM: dts: armada388-helios4") Signed-off-by: Rosen Penev <rosenp@gmail.com> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2021-01-29ARM: dts: armada-385-linksys: fix usage with newer devicesRosen Penev
Newer Linksys boards might come with a Winbond W29N02GV which can be configured in different ways. Make sure we configure it the same way as the older chips so everything keeps working. Signed-off-by: Imre Kaloz <kaloz@openwrt.org> Signed-off-by: Rosen Penev <rosenp@gmail.com> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2021-01-29arm64: dts: fsl-ls1012a-frdm: add spi-uart devicePawel Dembicki
This patch adds spi-uart controller to LS1012A-FRDM board dts. Device is equipped in SC16IS740 from NXP. Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-29arm64: dts: fsl-ls1012a-rdb: add i2c devicesPawel Dembicki
LS1012A-RDB equipped in some i2c devices: - 3x GPIO Expander: PCAL9555A (NXP) - Gyro: FXAS21002 (NXP) - Accelerometer: FXOS8700 (NXP) - Current & Power Monitor: INA220 (TI) This patch add listed devices to dts. Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-29Merge tag 'renesas-arm-dt-for-v5.12-tag2' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt Renesas ARM DT updates for v5.12 (take two) - Increase support (SPI, I2C, Ethernet, Serial, MMC) for the R-Car V3U SoC on the Renesas Falcon board, - Disable SD functions for plain eMMC, - A minor fix. * tag 'renesas-arm-dt-for-v5.12-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: arm64: dts: renesas: beacon: Fix EEPROM compatible value arm64: dts: renesas: falcon: Enable MMC arm64: dts: renesas: r8a779a0: Add MMC node arm64: dts: renesas: r8a779a0: Add HSCIF support arm64: dts: renesas: falcon: Complete SCIF0 nodes arm64: dts: renesas: r8a779a0: Add & update SCIF nodes arm64: dts: renesas: falcon: Add Ethernet-AVB0 support arm64: dts: renesas: r8a779a0: Add Ethernet-AVB support arm64: dts: renesas: falcon: Add I2C0,1,6 support arm64: dts: renesas: r8a779a0: Add I2C nodes arm64: dts: renesas: Disable SD functions for plain eMMC arm64: dts: renesas: r8a779a0: Add MSIOF device nodes Link: https://lore.kernel.org/r/20210129090815.2552425-2-geert+renesas@glider.be Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-01-29Merge tag 'hisi-arm64-dt-for-5.12v2' of ↵Arnd Bergmann
git://github.com/hisilicon/linux-hisi into arm/dt ARM64: DT: Hisilicon ARM64 DT updates for 5.12 - Further cleanups of the hisilicon DTS to align with the dtschema - Add or update the I2C, pinctrl and reset nodes for Hikey970 * tag 'hisi-arm64-dt-for-5.12v2' of git://github.com/hisilicon/linux-hisi: arm64: dts: hisilicon: hi3670.dtsi: add I2C settings arm64: dts: hisilicon: hikey970-pinctrl.dtsi: add missing pinctrl settings arm64: dts: hisilicon: hi3670.dtsi: add iomcu_rst arm64: dts: hisilicon: delete unused property smmu-cb-memtype arm64: dts: hisilicon: avoid irrelevant nodes being mistakenly identified as PHY nodes arm64: dts: hisilicon: normalize the node name of the localbus arm64: dts: hisilicon: normalize the node name of the module thermal arm64: dts: hisilicon: place clock-names "bus" before "core" arm64: dts: hisilicon: separate each group of data in the property "ranges" Link: https://lore.kernel.org/r/6013D1C7.90902@hisilicon.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-01-29ARM: 9043/1: tegra: Fix misplaced tegra_uart_config in decompressorDmitry Osipenko
The tegra_uart_config of the DEBUG_LL code is now placed right at the start of the .text section after commit which enabled debug output in the decompressor. Tegra devices are not booting anymore if DEBUG_LL is enabled since tegra_uart_config data is executes as a code. Fix the misplaced tegra_uart_config storage by embedding it into the code. Cc: stable@vger.kernel.org Fixes: 2596a72d3384 ("ARM: 9009/1: uncompress: Enable debug in head.S") Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2021-01-29x86/fpu/xstate: Use sizeof() instead of a constantYejune Deng
Use sizeof() instead of a constant in fpstate_sanitize_xstate(). Remove use of the address of the 0th array element of ->st_space and ->xmm_space which is equivalent to the array address itself: No code changed: # arch/x86/kernel/fpu/xstate.o: text data bss dec hex filename 9694 899 4 10597 2965 xstate.o.before 9694 899 4 10597 2965 xstate.o.after md5: 5a43fc70bad8e2a1784f67f01b71aabb xstate.o.before.asm 5a43fc70bad8e2a1784f67f01b71aabb xstate.o.after.asm [ bp: Massage commit message. ] Signed-off-by: Yejune Deng <yejune.deng@gmail.com> Signed-off-by: Borislav Petkov <bp@suse.de> Link: https://lkml.kernel.org/r/20210122071925.41285-1-yejune.deng@gmail.com
2021-01-29ARM: footbridge: fix dc21285 PCI configuration accessorsRussell King
Building with gcc 4.9.2 reveals a latent bug in the PCI accessors for Footbridge platforms, which causes a fatal alignment fault while accessing IO memory. Fix this by making the assembly volatile. Cc: stable@vger.kernel.org Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2021-01-29x86/fpu/64: Don't FNINIT in kernel_fpu_begin()Andy Lutomirski
The remaining callers of kernel_fpu_begin() in 64-bit kernels don't use 387 instructions, so there's no need to sanitize the FPU state. Skip it to get most of the performance we lost back. Reported-by: Krzysztof Olędzki <ole@ans.pl> Signed-off-by: Andy Lutomirski <luto@kernel.org> Signed-off-by: Borislav Petkov <bp@suse.de> Link: https://lkml.kernel.org/r/57f8841ccbf9f3c25a23196c888f5f6ec5887577.1611205691.git.luto@kernel.org
2021-01-29x86/fpu: Make the EFI FPU calling convention explicitAndy Lutomirski
EFI uses kernel_fpu_begin() to conform to the UEFI calling convention. This specifically requires initializing FCW (FPU Control Word), whereas no sane 64-bit kernel code should use legacy 387 operations that reference FCW. This should allow to safely change the default semantics of kernel_fpu_begin() to stop initializing FCW on 64-bit kernels. [ bp: Massage commit message a little. ] Signed-off-by: Andy Lutomirski <luto@kernel.org> Signed-off-by: Borislav Petkov <bp@suse.de> Link: https://lkml.kernel.org/r/25d392fff64680e0f4bb8cf0b1003314dc29eafe.1611205691.git.luto@kernel.org
2021-01-29arm64: dts: imx8mn-beacon-som: Enable QSPI on SOMAdam Ford
There is a QSPI chip connected to the FlexSPI bus. Enable it. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-29arm64: dts: imx8mn: Add fspi nodeAdam Ford
The i.MX8M Nano has the same Flexspi controller used in the i.MX8M Mini. Add the node and disable it by default. Signed-off-by: Adam Ford <aford173@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-29ARM: imx: Remove unused IMX_GPIO_NR() macroFabio Estevam
The IMX_GPIO_NR() macro was only used by non-DT i.MX platforms. As i.MX transitioned to a DT-only platform, get rid of this unused macro. Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-29arm64: dts: hisilicon: hi3670.dtsi: add I2C settingsMauro Carvalho Chehab
The I2C buses are not declared at the device tree. As this will be needed by further patches, add them, keeping all in disabled state. Per-board settings can override it. Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2021-01-29arm64: dts: hisilicon: hikey970-pinctrl.dtsi: add missing pinctrl settingsMauro Carvalho Chehab
There are several pinctrl settings that are missing at this DT file. Also, the entries are out of order. Add the missing bits, as they'll be required by the DRM driver - and probably by other drivers not upstreamed yet. Reorder the entres, adding the missing bits. Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2021-01-29arm64: dts: hisilicon: hi3670.dtsi: add iomcu_rstMauro Carvalho Chehab
This is required in order to support USB. Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
generated by cgit (git 2.34.1) at 2025-09-21 16:45:35 +0000