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Configuration was correct enough to work with the pre-configuration done by
uboot. While at it, also document the location.
Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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When the kernel is configured to use the Thumb-2 instruction set
"suspend-to-memory" fails to resume. Observed on a Colibri iMX6ULL
(i.MX 6ULL) and Apalis iMX6 (i.MX 6Q).
It looks like the CPU resumes unconditionally in ARM instruction mode
and then chokes on the presented Thumb-2 code it should execute.
Fix this by using the arm instruction set for all code in
suspend-imx6.S.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Fixes: df595746fa69 ("ARM: imx: add suspend in ocram support for i.mx6q")
Acked-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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RTC pcf2127 device driver has changed default behaviour of the watchdog
feature in v5.11-rc1. Now you need to explicitly enable it with a
device tree property, "reset-source", when used in the board design.
Fixes: 71ac13457d9d ("rtc: pcf2127: only use watchdog when explicitly available")
Signed-off-by: Bruno Thomsen <bruno.thomsen@gmail.com>
Cc: Bruno Thomsen <bth@kamstrup.com>
Cc: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Cc: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Now that we have a proper driver for the FlexSPI interface use it. This
will fix SCK frequency switching on Layerscape SoCs.
This was tested on the Kontron sl28 board.
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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VICTGO is the Kverneland TGO IsoBus universal terminal for agricultural
applications on tractors
Co-Developed-by: David Jander <david@protonic.nl>
Signed-off-by: David Jander <david@protonic.nl>
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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VICUT1(Q,P) is the Kverneland UT1(Q,P) IsoBus universal terminal for agricultural
applications on tractors.
Co-Developed-by: David Jander <david@protonic.nl>
Signed-off-by: David Jander <david@protonic.nl>
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Fix build error in x86/xen/ when PARAVIRT_SPINLOCKS is not enabled.
Fixes this build error:
../arch/x86/xen/smp_hvm.c: In function ‘xen_hvm_smp_init’:
../arch/x86/xen/smp_hvm.c:77:3: error: ‘nopvspin’ undeclared (first use in this function)
nopvspin = true;
Fixes: 3d7746bea925 ("x86/xen: Fix xen_hvm_smp_init() when vector callback not available")
Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Reviewed-by: Juergen Gross <jgross@suse.com>
Cc: David Woodhouse <dwmw@amazon.co.uk>
Cc: Juergen Gross <jgross@suse.com>
Link: https://lore.kernel.org/r/20210115191123.27572-1-rdunlap@infradead.org
Signed-off-by: Juergen Gross <jgross@suse.com>
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This adds a device-tree definition for the CSI0 MCLK pin,
which can be used for feeding MIPI CSI-2 sensors.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
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The H6 SoC contains an undocumented but fully functional RSB controller.
Add support for it. The MMIO register address matches other SoCs of the
same generation, and the IRQ matches a hole in the documented IRQ list.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Maxime Ripard <mripard@kernel.org>
[wens@csie.org: Use raw numbers instead of macros for clock/reset index]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
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eCSPI ports have DMA capability. Describe the eCSPI DMA properties.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Enable support for the QuadPHY on the Kontron K-Box A-230-LS. Enable
the driver as a module.
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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With a newer bootloader SATA might be used in a mPCI slot using a mSATA
card. Enable the SATA controller on the Kontron K-Box LS-230-A which
comes with such a slot.
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The RTC interrupt is incorrect and prevents the RTC driver
initialising. In any case, the PCF2127 driver wants an active low
interrupt, which neither the GIC nor the GPIO blocks support.
There is an ISPPT block in the LX2160A, but this is not supported
in mainline kernels. So, just delete the interrupt.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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On the i.MX8MN Beacon SOM, there is an RTC chip which is fed power
from the baseboard during power off. The SNVS RTC integrated into
the SoC is not fed power. Depending on the order the modules are
loaded, this can be a problem if the external RTC isn't rtc0.
Make the alias for rtc0 point to the external RTC all the time and
rtc1 point to the SVNS in order to correctly hold date/time over
a power-cycle.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The WiFi chip is capable of communication at SDR104 speeds.
Enable 100Mhz and 200MHz pinmux to support this.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Add support for the power button.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Add support for the OV5640 parallel camera module.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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There are two KSZ8081 on the imx6ul-14x14-evk: one has the reset line
controlled by the Q1 output of the 74LV595PW expander, and the other
by the Q2 output.
The KSZ8081 datasheet states that the tsr parameter (Stable supply
voltage (VDDIO, VDDA_3.3) to reset high) to be 10ms minimum and
"After the de-assertion of reset, wait a minimum of 100 µs before
starting programming on the MIIM (MDC/MDIO) interface."
Describe these parameters in the devicetree.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Currently the 74LV595PW GPIO expander is not functional because its OE
pin is not driven low.
Make it funcional by passing the 'enable-gpios' property inside the
GPIO expander node.
After putting the OE pin in low state, the outputs of the 74LV595PW all
go low.
The two KSZ8081 Ethernet PHYs reset lines are driven from the
the GPIO expander and as they remain low, this causes the Ethernet
PHYs not to be detected.
There is one solution to this problem as suggested by Andrew Lunn:
"Some devices will respond to MDIO while held in reset, some don't.
If your PHYs don't you need to add a compatible of the form
ethernet-phy-id[a-f0-9]{4}\\.[a-f0-9]{4}$ with the PHY ID. The PHY
will then be probed, independent of if it can be found on the bus or
not, and that probing will enable the GPIO."
So pass the "ethernet-phy-id0022.1560" for the KSZ8081 PHYs so that they
both can be functional after 74LV595PW is activated.
Suggested-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The GPIO expander SPI chipselect is active low. Mark it as such to avoid
the following warning:
[ 6.839213] gpio@0 enforce active low on chipselect handle
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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There is no firmware to initialize the arch timer register on all iMX7
systems, add arm,cpu-registers-not-fw-configured to let Linux do it.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP Linux Team <linux-imx@nxp.com>
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux
Pull powerpc fixes from Michael Ellerman:
"One fix for a lack of alignment in our linker script, that can lead to
crashes depending on configuration etc.
One fix for the 32-bit VDSO after the C VDSO conversion.
Thanks to Andreas Schwab, Ariel Marcovitch, and Christophe Leroy"
* tag 'powerpc-5.11-4' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux:
powerpc/vdso: Fix clock_gettime_fallback for vdso32
powerpc: Fix alignment bug within the init sections
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With commit 4df4cb9e99f8, the Hyper-V direct-mode STIMER is actually
initialized before LAPIC is initialized: see
apic_intr_mode_init()
x86_platform.apic_post_init()
hyperv_init()
hv_stimer_alloc()
apic_bsp_setup()
setup_local_APIC()
setup_local_APIC() temporarily disables LAPIC, initializes it and
re-eanble it. The direct-mode STIMER depends on LAPIC, and when it's
registered, it can be programmed immediately and the timer can fire
very soon:
hv_stimer_init
clockevents_config_and_register
clockevents_register_device
tick_check_new_device
tick_setup_device
tick_setup_periodic(), tick_setup_oneshot()
clockevents_program_event
When the timer fires in the hypervisor, if the LAPIC is in the
disabled state, new versions of Hyper-V ignore the event and don't inject
the timer interrupt into the VM, and hence the VM hangs when it boots.
Note: when the VM starts/reboots, the LAPIC is pre-enabled by the
firmware, so the window of LAPIC being temporarily disabled is pretty
small, and the issue can only happen once out of 100~200 reboots for
a 40-vCPU VM on one dev host, and on another host the issue doesn't
reproduce after 2000 reboots.
The issue is more noticeable for kdump/kexec, because the LAPIC is
disabled by the first kernel, and stays disabled until the kdump/kexec
kernel enables it. This is especially an issue to a Generation-2 VM
(for which Hyper-V doesn't emulate the PIT timer) when CONFIG_HZ=1000
(rather than CONFIG_HZ=250) is used.
Fix the issue by moving hv_stimer_alloc() to a later place where the
LAPIC timer is initialized.
Fixes: 4df4cb9e99f8 ("x86/hyperv: Initialize clockevents earlier in CPU onlining")
Signed-off-by: Dexuan Cui <decui@microsoft.com>
Reviewed-by: Michael Kelley <mikelley@microsoft.com>
Link: https://lore.kernel.org/r/20210116223136.13892-1-decui@microsoft.com
Signed-off-by: Wei Liu <wei.liu@kernel.org>
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The change of ia64's default memory model to SPARSEMEM causes defconfig
build to fail:
CC kernel/async.o
In file included from include/linux/numa.h:25,
from include/linux/async.h:13,
from kernel/async.c:47:
arch/ia64/include/asm/sparsemem.h:14:40: warning: "PAGE_SHIFT" is not defined, evaluates to 0 [-Wundef]
14 | #if ((CONFIG_FORCE_MAX_ZONEORDER - 1 + PAGE_SHIFT) > SECTION_SIZE_BITS)
| ^~~~~~~~~~
In file included from include/linux/gfp.h:6,
from include/linux/xarray.h:14,
from include/linux/radix-tree.h:19,
from include/linux/idr.h:15,
from include/linux/kernfs.h:13,
from include/linux/sysfs.h:16,
from include/linux/kobject.h:20,
from include/linux/energy_model.h:7,
from include/linux/device.h:16,
from include/linux/async.h:14,
from kernel/async.c:47:
include/linux/mmzone.h:1156:2: error: #error Allocator MAX_ORDER exceeds SECTION_SIZE
1156 | #error Allocator MAX_ORDER exceeds SECTION_SIZE
| ^~~~~
The error cause is the missing definition of PAGE_SHIFT in the calculation
of SECTION_SIZE_BITS.
Add include of <asm/page.h> to arch/ia64/include/asm/sparsemem.h to solve
the problem.
Fixes: 214496cb1870 ("ia64: make SPARSEMEM default and disable DISCONTIGMEM")
Reported-by: Guenter Roeck <linux@roeck-us.net>
Tested-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Mike Rapoport <rppt@linux.ibm.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux
Pull RISC-V fixes from Palmer Dabbelt:
"There are a few more fixes than a normal rc4, largely due to the
bubble introduced by the holiday break:
- return -ENOSYS for syscall number -1, which previously returned an
uninitialized value.
- ensure of_clk_init() has been called in time_init(), without which
clock drivers may not be initialized.
- fix sifive,uart0 driver to properly display the baud rate. A fix to
initialize MPIE that allows interrupts to be processed during
system calls.
- avoid erronously begin tracing IRQs when interrupts are disabled,
which at least triggers suprious lockdep failures.
- workaround for a warning related to calling smp_processor_id()
while preemptible. The warning itself is suprious on currently
availiable systems.
- properly include the generic time VDSO calls. A fix to our kasan
address mapping. A fix to the HiFive Unleashed device tree, which
allows the Ethernet PHY to be properly initialized by Linux (as
opposed to relying on the bootloader).
- defconfig update to include SiFive's GPIO driver, which is present
on the HiFive Unleashed and necessary to initialize the PHY.
- avoid allocating memory while initializing reserved memory.
- avoid allocating the last 4K of memory, as pointers there alias
with syscall errors.
There are also two cleanups that should have no functional effect but
do fix build warnings:
- drop a duplicated definition of PAGE_KERNEL_EXEC.
- properly declare the asm register SP shim.
- cleanup the rv32 memory size Kconfig entry, to reflect the actual
size of memory availiable"
* tag 'riscv-for-linus-5.11-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux:
RISC-V: Fix maximum allowed phsyical memory for RV32
RISC-V: Set current memblock limit
RISC-V: Do not allocate memblock while iterating reserved memblocks
riscv: stacktrace: Move register keyword to beginning of declaration
riscv: defconfig: enable gpio support for HiFive Unleashed
dts: phy: add GPIO number and active state used for phy reset
dts: phy: fix missing mdio device and probe failure of vsc8541-01 device
riscv: Fix KASAN memory mapping.
riscv: Fixup CONFIG_GENERIC_TIME_VSYSCALL
riscv: cacheinfo: Fix using smp_processor_id() in preemptible
riscv: Trace irq on only interrupt is enabled
riscv: Drop a duplicated PAGE_KERNEL_EXEC
riscv: Enable interrupts during syscalls with M-Mode
riscv: Fix sifive serial driver
riscv: Fix kernel time_init()
riscv: return -ENOSYS for syscall -1
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Move swr0 device node to keep alphabetical sorting order of device tree
nodes.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20210116002346.422479-1-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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Linux kernel can only map 1GB of address space for RV32 as the page offset
is set to 0xC0000000. The current description in the Kconfig is confusing
as it indicates that RV32 can support 2GB of physical memory. That is
simply not true for current kernel. In future, a 2GB split support can be
added to allow 2GB physical address space.
Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
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Currently, linux kernel can not use last 4k bytes of addressable space
because IS_ERR_VALUE macro treats those as an error. This will be an issue
for RV32 as any memblock allocator potentially allocate chunk of memory
from the end of DRAM (2GB) leading bad address error even though the
address was technically valid.
Fix this issue by limiting the memblock if available memory spans the
entire address space.
Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
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Currently, resource tree allocates memory blocks while iterating on the
list. It leads to following kernel warning because memblock allocation
also invokes memory block reservation API.
[ 0.000000] ------------[ cut here ]------------
[ 0.000000] WARNING: CPU: 0 PID: 0 at kernel/resource.c:795
__insert_resource+0x8e/0xd0
[ 0.000000] Modules linked in:
[ 0.000000] CPU: 0 PID: 0 Comm: swapper Not tainted
5.10.0-00022-ge20097fb37e2-dirty #549
[ 0.000000] epc: c00125c2 ra : c001262c sp : c1c01f50
[ 0.000000] gp : c1d456e0 tp : c1c0a980 t0 : ffffcf20
[ 0.000000] t1 : 00000000 t2 : 00000000 s0 : c1c01f60
[ 0.000000] s1 : ffffcf00 a0 : ffffff00 a1 : c1c0c0c4
[ 0.000000] a2 : 80c12b15 a3 : 80402000 a4 : 80402000
[ 0.000000] a5 : c1c0c0c4 a6 : 80c12b15 a7 : f5faf600
[ 0.000000] s2 : c1c0c0c4 s3 : c1c0e000 s4 : c1009a80
[ 0.000000] s5 : c1c0c000 s6 : c1d48000 s7 : c1613b4c
[ 0.000000] s8 : 00000fff s9 : 80000200 s10: c1613b40
[ 0.000000] s11: 00000000 t3 : c1d4a000 t4 : ffffffff
This is also unnecessary as we can pre-compute the total memblocks required
for each memory region and allocate it before the loop. It save precious
boot time not going through memblock allocation code every time.
Fixes: 00ab027a3b82 ("RISC-V: Add kernel image sections to the resource tree")
Reviewed-by: Anup Patel <anup@brainfault.org>
Tested-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
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Daniel Borkmann says:
====================
pull-request: bpf-next 2021-01-16
1) Extend atomic operations to the BPF instruction set along with x86-64 JIT support,
that is, atomic{,64}_{xchg,cmpxchg,fetch_{add,and,or,xor}}, from Brendan Jackman.
2) Add support for using kernel module global variables (__ksym externs in BPF
programs) retrieved via module's BTF, from Andrii Nakryiko.
3) Generalize BPF stackmap's buildid retrieval and add support to have buildid
stored in mmap2 event for perf, from Jiri Olsa.
4) Various fixes for cross-building BPF sefltests out-of-tree which then will
unblock wider automated testing on ARM hardware, from Jean-Philippe Brucker.
5) Allow to retrieve SOL_SOCKET opts from sock_addr progs, from Daniel Borkmann.
6) Clean up driver's XDP buffer init and split into two helpers to init per-
descriptor and non-changing fields during processing, from Lorenzo Bianconi.
7) Minor misc improvements to libbpf & bpftool, from Ian Rogers.
* https://git.kernel.org/pub/scm/linux/kernel/git/bpf/bpf-next: (41 commits)
perf: Add build id data in mmap2 event
bpf: Add size arg to build_id_parse function
bpf: Move stack_map_get_build_id into lib
bpf: Document new atomic instructions
bpf: Add tests for new BPF atomic operations
bpf: Add bitwise atomic instructions
bpf: Pull out a macro for interpreting atomic ALU operations
bpf: Add instructions for atomic_[cmp]xchg
bpf: Add BPF_FETCH field / create atomic_fetch_add instruction
bpf: Move BPF_STX reserved field check into BPF_STX verifier code
bpf: Rename BPF_XADD and prepare to encode other atomics in .imm
bpf: x86: Factor out a lookup table for some ALU opcodes
bpf: x86: Factor out emission of REX byte
bpf: x86: Factor out emission of ModR/M for *(reg + off)
tools/bpftool: Add -Wall when building BPF programs
bpf, libbpf: Avoid unused function warning on bpf_tail_call_static
selftests/bpf: Install btf_dump test cases
selftests/bpf: Fix installation of urandom_read
selftests/bpf: Move generated test files to $(TEST_GEN_FILES)
selftests/bpf: Fix out-of-tree build
...
====================
Link: https://lore.kernel.org/r/20210116012922.17823-1-daniel@iogearbox.net
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux
Pull arm64 fixes from Catalin Marinas:
- Set the minimum GCC version to 5.1 for arm64 due to earlier compiler
bugs.
- Make atomic helpers __always_inline to avoid a section mismatch when
compiling with clang.
- Fix the CMA and crashkernel reservations to use ZONE_DMA (remove the
arm64_dma32_phys_limit variable, no longer needed with a dynamic
ZONE_DMA sizing in 5.11).
- Remove redundant IRQ flag tracing that was leaving lockdep
inconsistent with the hardware state.
- Revert perf events based hard lockup detector that was causing
smp_processor_id() to be called in preemptible context.
- Some trivial cleanups - spelling fix, renaming S_FRAME_SIZE to
PT_REGS_SIZE, function prototypes added.
* tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
arm64: selftests: Fix spelling of 'Mismatch'
arm64: syscall: include prototype for EL0 SVC functions
compiler.h: Raise minimum version of GCC to 5.1 for arm64
arm64: make atomic helpers __always_inline
arm64: rename S_FRAME_SIZE to PT_REGS_SIZE
Revert "arm64: Enable perf events based hard lockup detector"
arm64: entry: remove redundant IRQ flag tracing
arm64: Remove arm64_dma32_phys_limit and its uses
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git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux
Pull MIPS fixes from Thomas Bogendoerfer:
- fix coredumps on 64bit kernels
- fix for alignment bugs preventing booting
- fix checking for failed irq_alloc_desc calls
* tag 'mips_fixes_5.11.1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux:
MIPS: OCTEON: fix unreachable code in octeon_irq_init_ciu
MIPS: relocatable: fix possible boot hangup with KASLR enabled
MIPS: Fix malformed NT_FILE and NT_SIGINFO in 32bit coredumps
MIPS: boot: Fix unaligned access with CONFIG_MIPS_RAW_APPENDED_DTB
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git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip
Pull xen fixes from Juergen Gross:
- A series to fix a regression when running as a fully virtualized
guest on an old Xen hypervisor not supporting PV interrupt callbacks
for HVM guests.
- A patch to add support to query Xen resource sizes (setting was
possible already) from user mode.
* tag 'for-linus-5.11-rc4-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip:
x86/xen: Fix xen_hvm_smp_init() when vector callback not available
x86/xen: Don't register Xen IPIs when they aren't going to be used
x86/xen: Add xen_no_vector_callback option to test PCI INTX delivery
xen: Set platform PCI device INTX affinity to CPU0
xen: Fix event channel callback via INTX/GSI
xen/privcmd: allow fetching resource sizes
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Look up the LED from a GPIO machine descriptor table. The Geode LEDs
should be on the CS5535 companion chip.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Borislav Petkov <bp@suse.de>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lkml.kernel.org/r/20201124085339.6181-3-linus.walleij@linaro.org
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Look up the LED from a GPIO machine descriptor table. The Geode LEDs
should be on the CS5535 companion chip.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Borislav Petkov <bp@suse.de>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lkml.kernel.org/r/20201124085339.6181-2-linus.walleij@linaro.org
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Look up the LED from a GPIO machine descriptor table. The Geode LEDs
should be on the CS5535 companion chip.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Borislav Petkov <bp@suse.de>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lkml.kernel.org/r/20201124085339.6181-1-linus.walleij@linaro.org
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The Ux500 platforms have some memory carveouts set aside for
communicating with the modem and for the initial secure software
(ISSW). These areas are protected by the memory controller
and will result in an external abort if accessed like common
read/write memory.
On the legacy boot loaders, these were set aside by using
cmdline arguments such as this:
mem=96M@0 mem_mtrace=15M@96M mem_mshared=1M@111M
mem_modem=16M@112M mali.mali_mem=32M@128M mem=96M@160M
hwmem=127M@256M mem_issw=1M@383M mem_ram_console=1M@384M
mem=638M@385M
Reserve the relevant areas in the device tree instead. The
"mali", "hwmem", "mem_ram_console" and the trailing 1MB at the
end of the memory reservations in the list are not relevant for
the upstream kernel as these are nowadays replaced with
upstream technologies such as CMA. The modem and ISSW
reservations are necessary.
This was manifested in a bug that surfaced in response to
commit 7fef431be9c9 ("mm/page_alloc: place pages to tail in __free_pages_core()")
which changes the behaviour of memory allocations
in such a way that the platform will sooner run into these
dangerous areas, with "Unhandled fault: imprecise external
abort (0xc06) at 0xb6fd83dc" or similar: the real reason
turns out to be that the PTE is pointing right into one of
the reserved memory areas. We were just lucky until now.
We need to augment the DB8500 and DB8520 SoCs similarly
and also create a new include for the DB9500 used in the
Snowball since this does not have a modem and thus does
not need the modem memory reservation, albeit it needs
the ISSW reservation.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Cc: stable@vger.kernel.org
Cc: David Hildenbrand <david@redhat.com>
Link: https://lore.kernel.org/r/20201213225517.3838501-1-linus.walleij@linaro.org'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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With [1] integrated and all users of the config symbols removed, we
can safely remove the options from defconfig.
[1] https://patchwork.kernel.org/project/linux-arm-kernel/patch/20201026170624.24241-1-nm@ti.com/
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20210107132228.6577-1-nm@ti.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes
i.MX fixes for 5.11:
- Fix backlight pwm on imx6qdl-kontron-samx6i which is lost from
#pwm-cells conversion.
- Fix duplicated bus node name for i.MX8MN SoC.
- Fix reset register offset on LS1028A SoC.
- Rename MMC node aliases for imx6q-tbs2910 to keep the MMC device
index consistent with previous kernel version.
- Selecting ARM_GIC_V3 on non-CP15 processors to fix one build failure
with i.MX8M SoC driver.
- Fix typos with status property on imx6qdl-kontron-samx6i board.
- Fix duplicated regulator-name on imx6qdl-gw52xx board.
* tag 'imx-fixes-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: dts: imx6qdl-gw52xx: fix duplicate regulator naming
ARM: dts: imx6qdl-kontron-samx6i: fix i2c_lcd/cam default status
ARM: imx: fix imx8m dependencies
ARM: dts: tbs2910: rename MMC node aliases
arm64: dts: ls1028a: fix the offset of the reset register
arm64: dts: imx8mn: Fix duplicate node name
ARM: dts: imx6qdl-kontron-samx6i: fix pwms for lcd-backlight
Link: https://lore.kernel.org/r/20210112131224.GI28365@dragon
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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I didn't touch this code since it served as a platform to introduce
ARMv7-M support to Linux. The only known machine that runs Linux has only
4 MiB of RAM (that originally only exists to hold the display's framebuffer).
There are no known users and no further use foreseeable, so drop the
code.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Link: https://lore.kernel.org/r/20210115155130.185010-2-u.kleine-koenig@pengutronix.de'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Enable ASoC platform driver and condec drivers for Qualcomm SM8250
platform and devices based on it.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20210115151522.399359-1-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt
Renesas ARM DT updates for v5.12
- Timer (CMT/TMU) support for R-Car Gen3 SoCs,
- Watchdog (RWDT), pincontrol (PFC), GPIO, and DMA (SYS-DMAC) support
for the R-Car V3U SoC,
- USB2 clock selector and SPI Multi I/O Bus Controller (RPC-IF)
support for RZ/G2 SoCs,
- Support for the Beacon EmbeddedWorks RZ/G2H and RZ/G2N kits,
- Various fixes and improvements.
* tag 'renesas-arm-dt-for-v5.12-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (24 commits)
arm64: dts: renesas: r8a779a0: Add SYS-DMAC nodes
arm64: dts: renesas: r8a779a0: Add GPIO nodes
arm64: dts: renesas: r8a779a0: Add pinctrl device node
arm64: dts: renesas: rzg2: Add RPC-IF Support
arm64: dts: renesas: rzg2: Add usb2_clksel to RZ/G2 M/N/H
arm64: dts: renesas: r8a774e1: Introduce beacon-rzg2h-kit
arm64: dts: renesas: r8a774b1: Introduce beacon-rzg2n-kit
arm64: dts: renesas: beacon-rzg2m-kit: Rearrange SoC unique functions
arm64: dts: renesas: beacon: Better describe keys
arm64: dts: renesas: beacon: Configure Audio CODEC clocks
arm64: dts: renesas: beacon kit: Fix Audio Clock sources
arm64: dts: renesas: beacon: Configure programmable clocks
arm64: dts: renesas: falcon: Enable watchdog timer
arm64: dts: renesas: r8a779a0: Add RWDT node
arm64: dts: renesas: beacon: Correct I2C bus speeds
arm64: dts: renesas: beacon: Enable SPI
arm64: dts: renesas: beacon: Don't make vccq_sdhi0 always on
arm64: dts: renesas: beacon: Fix RGB Display PWM Backlight
arm64: dts: renesas: beacon: Fix LVDS PWM Backlight
arm64: dts: renesas: beacon: Fix audio-1.8V pin enable
...
Link: https://lore.kernel.org/r/20210115094610.2334058-2-geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Enable lt9611uxc driver for Lontium DSI to HDMI bridge found on Qualcomm
RB5 Robotics platform. Enable this driver to get display working on this
platform.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20201228151827.4019213-1-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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Enable the driver for the display clock controller on Qualcomm SM8250,
needed in order to get the display working. This driver provides
power-domains and as such should not be compiled as a module.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20201228151225.4018477-1-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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Lower drive strength for microSD data and CMD pins from 16 to 10. This
fixes spurious card removal issues observed on some boards. Also this
change allows us to re-enable 1.8V support, which seems to work with
lowered drive strength.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Cc: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>
Fixes: 53a8ccf1c7e5 ("arm64: dts: qcom: rb5: Add support for uSD card")
Link: https://lore.kernel.org/r/20201217183341.3186402-1-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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From version 2.35, binutils can be configured with
--enable-mips-fix-loongson3-llsc=yes, which means it defaults to
-mfix-loongson3-llsc. This breaks labels which might then point at the
wrong instruction.
The workaround to explicitly pass -mno-fix-loongson3-llsc has been
added in Linux version 5.1, but is only enabled when building a Loongson
64 kernel. As vendors might use a common toolchain for building Loongson
and non-Loongson kernels, just move that workaround to
arch/mips/Makefile. At the same time update the comments to reflect the
current status.
Cc: stable@vger.kernel.org # 5.1+
Cc: YunQiang Su <syq@debian.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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When building with clang when CONFIG_CPU_LOONGSON3_WORKAROUNDS is
enabled:
In file included from lib/errseq.c:4:
In file included from ./include/linux/atomic.h:7:
./arch/mips/include/asm/atomic.h:52:1: warning: converting the result of
'<<' to a boolean always evaluates to true
[-Wtautological-constant-compare]
ATOMIC_OPS(atomic64, s64)
^
./arch/mips/include/asm/atomic.h:40:9: note: expanded from macro
'ATOMIC_OPS'
return cmpxchg(&v->counter, o, n);
^
./arch/mips/include/asm/cmpxchg.h:194:7: note: expanded from macro
'cmpxchg'
if (!__SYNC_loongson3_war)
^
./arch/mips/include/asm/sync.h:147:34: note: expanded from macro
'__SYNC_loongson3_war'
# define __SYNC_loongson3_war (1 << 31)
^
While it is not wrong that the result of this shift is always true in a
boolean context, it is not a problem here. Regardless, the warning is
really noisy so rather than making the shift a boolean implicitly, use
it in an equality comparison so the shift is used as an integer value.
Fixes: 4d1dbfe6cbec ("MIPS: atomic: Emit Loongson3 sync workarounds within asm")
Fixes: a91f2a1dba44 ("MIPS: cmpxchg: Omit redundant barriers for Loongson3")
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Nathan Chancellor <natechancellor@gmail.com>
Acked-by: Nick Desaulniers <ndesaulniers@google.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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Add labels to the cpuN-thermal nodes to allow board files to use
a phandle instead replicating the node hierarchy when adjusting
certain properties.
Due to the 'sustainable-power' property CPU thermal zones are
more likely to need property updates than other SC7180 zones,
hence only labels for CPU zones are added for now.
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Link: https://lore.kernel.org/r/20210108141648.1.Ia8019b8b303ca31a06752ed6ceb5c3ac50bd1d48@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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Solves the following repetitive warning when building with -Wshadow:
In file included from ./include/linux/pgtable.h:6,
from ./include/linux/mm.h:33,
from ./include/linux/dax.h:6,
from ./include/linux/mempolicy.h:11,
from kernel/fork.c:34:
./arch/mips/include/asm/mmu_context.h: In function ‘switch_mm’:
./arch/mips/include/asm/pgtable.h:97:16: warning: declaration of ‘flags’ shadows a previous local [-Wshadow]
97 | unsigned long flags; \
| ^~~~~
./arch/mips/include/asm/mmu_context.h:162:2: note: in expansion of macro ‘htw_stop’
162 | htw_stop();
| ^~~~~~~~
In file included from kernel/fork.c:102:
./arch/mips/include/asm/mmu_context.h:159:16: note: shadowed declaration is here
159 | unsigned long flags;
| ^~~~~
Signed-off-by: Alexander Lobakin <alobakin@pm.me>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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Power and performance measurements were made using my freqbench [1]
benchmark coordinator, which isolates, offlines, and disables the timer
tick on test CPUs to maximize accuracy. It uses EEMBC CoreMark [2] as
the workload and measures power usage using the PM8150B PMIC's fuel
gauge.
The energy model dynamic-power-coefficient values were calculated with
DPC = µW / MHz / V^2
for each OPP, and averaged across all OPPs within each cluster for the
final coefficient. Voltages were obtained from the qcom-cpufreq-hw
driver that reads voltages from the OSM LUT programmed into the SoC.
Normalized DMIPS/MHz capacity scale values for each CPU were calculated
from CoreMarks/MHz (CoreMark iterations per second per MHz), which
serves the same purpose. For each CPU, the final capacity-dmips-mhz
value is the C/MHz value of its maximum frequency normalized to
SCHED_CAPACITY_SCALE (1024) for the fastest CPU in the system.
A Xiaomi Redmi K30S Ultra device running a downstream Qualcomm 4.19
kernel was used for benchmarking to ensure proper frequency scaling and
other low-level controls.
Raw benchmark results can be found in the freqbench repository [3].
Below is a human-readable summary:
Frequency domains: cpu1 cpu4 cpu7
Offline CPUs: cpu1 cpu2 cpu3 cpu4 cpu5 cpu6 cpu7
Baseline power usage: 1223 mW
===== CPU 1 =====
Frequencies: 300 403 518 614 691 787 883 979 1075 1171 1248 1344 1420 1516 1612 1708 1804
300: 1114 3.7 C/MHz 29 mW 6.4 J 39.0 I/mJ 224.5 s
403: 1497 3.7 C/MHz 33 mW 5.5 J 45.2 I/mJ 167.0 s
518: 1925 3.7 C/MHz 48 mW 6.3 J 39.7 I/mJ 129.9 s
614: 2281 3.7 C/MHz 73 mW 8.0 J 31.1 I/mJ 109.6 s
691: 2566 3.7 C/MHz 46 mW 4.5 J 55.2 I/mJ 97.4 s
787: 2923 3.7 C/MHz 86 mW 7.4 J 33.8 I/mJ 85.5 s
883: 3279 3.7 C/MHz 77 mW 5.9 J 42.5 I/mJ 76.2 s
979: 3635 3.7 C/MHz 65 mW 4.4 J 56.2 I/mJ 68.8 s
1075: 3992 3.7 C/MHz 71 mW 4.4 J 56.2 I/mJ 62.6 s
1171: 4348 3.7 C/MHz 121 mW 6.9 J 36.0 I/mJ 57.5 s
1248: 4633 3.7 C/MHz 79 mW 4.2 J 58.9 I/mJ 54.0 s
1344: 4990 3.7 C/MHz 81 mW 4.0 J 61.7 I/mJ 50.1 s
1420: 5275 3.7 C/MHz 85 mW 4.0 J 61.8 I/mJ 47.4 s
1516: 5632 3.7 C/MHz 88 mW 3.9 J 64.3 I/mJ 44.4 s
1612: 5988 3.7 C/MHz 92 mW 3.8 J 65.4 I/mJ 41.7 s
1708: 6346 3.7 C/MHz 96 mW 3.8 J 66.3 I/mJ 39.4 s
1804: 6701 3.7 C/MHz 105 mW 3.9 J 63.5 I/mJ 37.3 s
===== CPU 4 =====
Frequencies: 710 825 940 1056 1171 1286 1382 1478 1574 1670 1766 1862 1958 2054 2150 2246 2342 2419
710: 6022 8.5 C/MHz 123 mW 5.1 J 49.1 I/mJ 41.5 s
825: 7001 8.5 C/MHz 142 mW 5.1 J 49.4 I/mJ 35.7 s
940: 7987 8.5 C/MHz 164 mW 5.1 J 48.7 I/mJ 31.3 s
1056: 8954 8.5 C/MHz 185 mW 5.2 J 48.3 I/mJ 27.9 s
1171: 9944 8.5 C/MHz 212 mW 5.3 J 46.9 I/mJ 25.2 s
1286: 10926 8.5 C/MHz 235 mW 5.4 J 46.4 I/mJ 22.9 s
1382: 11735 8.5 C/MHz 253 mW 5.4 J 46.4 I/mJ 21.3 s
1478: 12531 8.5 C/MHz 277 mW 5.5 J 45.2 I/mJ 20.0 s
1574: 13335 8.5 C/MHz 306 mW 5.7 J 43.6 I/mJ 18.8 s
1670: 14169 8.5 C/MHz 335 mW 5.9 J 42.2 I/mJ 17.7 s
1766: 14969 8.5 C/MHz 353 mW 5.9 J 42.3 I/mJ 16.7 s
1862: 15800 8.5 C/MHz 444 mW 7.0 J 35.6 I/mJ 15.8 s
1958: 16630 8.5 C/MHz 463 mW 7.0 J 35.9 I/mJ 15.0 s
2054: 17428 8.5 C/MHz 480 mW 6.9 J 36.3 I/mJ 14.4 s
2150: 18238 8.5 C/MHz 496 mW 6.8 J 36.8 I/mJ 13.7 s
2246: 19053 8.5 C/MHz 578 mW 7.6 J 32.9 I/mJ 13.1 s
2342: 19873 8.5 C/MHz 625 mW 7.9 J 31.8 I/mJ 12.6 s
2419: 20522 8.5 C/MHz 675 mW 8.2 J 30.4 I/mJ 12.2 s
===== CPU 7 =====
Frequencies: 844 960 1075 1190 1305 1401 1516 1632 1747 1862 1977 2073 2169 2265 2361 2457 2553 2649 2745 2841
844: 7172 8.5 C/MHz 155 mW 5.4 J 46.4 I/mJ 34.9 s
960: 8148 8.5 C/MHz 172 mW 5.3 J 47.4 I/mJ 30.7 s
1075: 9116 8.5 C/MHz 197 mW 5.4 J 46.2 I/mJ 27.4 s
1190: 10105 8.5 C/MHz 220 mW 5.4 J 46.0 I/mJ 24.8 s
1305: 11084 8.5 C/MHz 242 mW 5.5 J 45.8 I/mJ 22.6 s
1401: 11888 8.5 C/MHz 262 mW 5.5 J 45.4 I/mJ 21.0 s
1516: 12859 8.5 C/MHz 297 mW 5.8 J 43.2 I/mJ 19.5 s
1632: 13840 8.5 C/MHz 335 mW 6.1 J 41.3 I/mJ 18.1 s
1747: 14827 8.5 C/MHz 369 mW 6.2 J 40.1 I/mJ 16.9 s
1862: 15800 8.5 C/MHz 395 mW 6.3 J 40.0 I/mJ 15.8 s
1977: 16786 8.5 C/MHz 443 mW 6.6 J 37.9 I/mJ 14.9 s
2073: 17566 8.5 C/MHz 488 mW 6.9 J 36.0 I/mJ 14.2 s
2169: 18395 8.5 C/MHz 620 mW 8.4 J 29.7 I/mJ 13.6 s
2265: 19223 8.5 C/MHz 621 mW 8.1 J 30.9 I/mJ 13.0 s
2361: 20040 8.5 C/MHz 672 mW 8.4 J 29.8 I/mJ 12.5 s
2457: 20852 8.5 C/MHz 696 mW 8.3 J 29.9 I/mJ 12.0 s
2553: 21684 8.5 C/MHz 738 mW 8.5 J 29.3 I/mJ 11.5 s
2649: 22458 8.5 C/MHz 793 mW 8.8 J 28.3 I/mJ 11.1 s
2745: 23314 8.5 C/MHz 875 mW 9.4 J 26.6 I/mJ 10.7 s
2841: 24103 8.5 C/MHz 928 mW 9.6 J 26.0 I/mJ 10.4 s
[1] https://github.com/kdrag0n/freqbench
[2] https://www.eembc.org/coremark/
[3] https://github.com/kdrag0n/freqbench/tree/master/results/sm8250/k30s
Signed-off-by: Danny Lin <danny@kdrag0n.dev>
Link: https://lore.kernel.org/r/20210112013255.415253-2-danny@kdrag0n.dev
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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