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2010-02-25AM3517 EVM: Enable I2C supportSriram
There are multiple devices connected to I2C bus on AM3517EVM (for instance audio codec, IO expander etc). Enable I2C support in the default kernel configuration for AM3517 EVM. Signed-off-by: Sriramakrishnan <srk@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-02-25AM35x: Enable OMAP_MUX in defconfigAjay Kumar Gupta
Enabling OMAP_MUX in defconfig as it is required for EHCI to work. Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-02-25AM35x: Add missing GPIO mux config for EHCI portAjay Kumar Gupta
Adding GPIO mux config used for PHY reset of EHCI port on base board. We get below failure message without this patch, "hub 1-0:1.0: unable to enumerate USB device on port 1" Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-02-25Zoom3: Defconfig updatemanjugk manjugk
Some of the features are not enabled by default in zoom3 defconfig. This patch enables: - MMC Resume - TWL4030 RTC driver - Debug File system Build and boot tested on Zoom3 board. Signed-off-by: Manjunatha GK <manjugk@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-02-25omap: i2c: Fix muxing for command line enabled busJarkko Nikula
The commit b63128e81214cc2db2995d690438055c26d213a5 broke the pin muxing for I2C busses that are enabled from the kernel command line. Fix this by defining the board registration function omap_register_i2c_bus in common platform code as it was before but keep the muxing in architecture dependent files. Signed-off-by: Jarkko Nikula <jhnikula@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-02-25x86, pci: Exclude Moorestown PCI code if CONFIG_X86_MRST=nYinghai Lu
If we don't have any Moorestown CPU support compiled in, we don't need the Moorestown PCI support either. Signed-off-by: Yinghai Lu <yinghai@kernel.org> LKML-Reference: <4B858E89.7040807@kernel.org> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2010-02-25Merge branches 'clks' and 'pnx' into develRussell King
2010-02-25Merge branch 'misc2' into develRussell King
2010-02-25Merge branch 'perf' into develRussell King
Conflicts: arch/arm/Kconfig
2010-02-25Merge branch 'tmpreg' into develRussell King
Conflicts: arch/arm/Kconfig arch/arm/mach-ux500/include/mach/debug-macro.S
2010-02-25Merge branches 'at91', 'cache', 'cup', 'ep93xx', 'ixp4xx', 'nuc', ↵Russell King
'pending-dma-streaming', 'u300' and 'umc' into devel
2010-02-25Merge branch 'for-rmk' of git://git.marvell.com/orion into devel-stableRussell King
2010-02-25ARM: Eliminate decompressor -Dstatic= PIC hackRussell King
We used to build decompressors with -Dstatic= to avoid any local data being generated. The problem is that local data generates GOTOFF relocations, which means we can't relocate the data relative to the text segment. Global data, on the other hand, goes through the GOT, and can be relocated anywhere. Unfortunately, with the new decompressors, this presents a problem since they declare static data within functions, and this leads to stack overflow. Fix this by separating out the decompressor code into a separate file, and removing 'static' from BSS data in misc.c. Also, discard the .data section - this means that should we end up with read/write initialized data, the decompressor will fail to link and the problem will be obvious. Acked-by: Nicolas Pitre <nico@fluxnic.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-02-25x86, numaq: Make CONFIG_X86_NUMAQ depend on CONFIG_PCIPan, Jacob jun
The NUMAQ initialization sets x86_init.pci.init to pci_numaq_init, which obviously isn't defined if CONFIG_PCI isn't defined. This dependency was implicit in the past, because pci_numaq_init was invoked from arch/x86/pci/legacy.c, which itself was conditioned on CONFIG_PCI. I suspect that no NUMA-Q machines without PCI were ever built, so instead of complicating the code by adding #ifdefs or stub functions, just disable this bit of the configuration space. [ hpa: rewrote the checkin comment ] Signed-off-by: Jacob Pan <jacob.jun.pan@intel.com> LKML-Reference: <43F901BD926A4E43B106BF17856F0755A321EE1F@orsmsx508.amr.corp.intel.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2010-02-25kprobes/x86: Support kprobes jump optimization on x86Masami Hiramatsu
Introduce x86 arch-specific optimization code, which supports both of x86-32 and x86-64. This code also supports safety checking, which decodes whole of a function in which probe is inserted, and checks following conditions before optimization: - The optimized instructions which will be replaced by a jump instruction don't straddle the function boundary. - There is no indirect jump instruction, because it will jumps into the address range which is replaced by jump operand. - There is no jump/loop instruction which jumps into the address range which is replaced by jump operand. - Don't optimize kprobes if it is in functions into which fixup code will jumps. This uses text_poke_multibyte() which doesn't support modifying code on NMI/MCE handler. However, since kprobes itself doesn't support NMI/MCE code probing, it's not a problem. Changes in v9: - Use *_text_reserved() for checking the probe can be optimized. - Verify jump address range is in 2G range when preparing slot. - Backup original code when switching optimized buffer, instead of preparing buffer, because there can be int3 of other probes in preparing phase. - Check kprobe is disabled in arch_check_optimized_kprobe(). - Strictly check indirect jump opcodes (ff /4, ff /5). Changes in v6: - Split stop_machine-based jump patching code. - Update comments and coding style. Changes in v5: - Introduce stop_machine-based jump replacing. Signed-off-by: Masami Hiramatsu <mhiramat@redhat.com> Cc: systemtap <systemtap@sources.redhat.com> Cc: DLE <dle-develop@lists.sourceforge.net> Cc: Ananth N Mavinakayanahalli <ananth@in.ibm.com> Cc: Jim Keniston <jkenisto@us.ibm.com> Cc: Srikar Dronamraju <srikar@linux.vnet.ibm.com> Cc: Christoph Hellwig <hch@infradead.org> Cc: Steven Rostedt <rostedt@goodmis.org> Cc: Frederic Weisbecker <fweisbec@gmail.com> Cc: Anders Kaseorg <andersk@ksplice.com> Cc: Tim Abbott <tabbott@ksplice.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: Jason Baron <jbaron@redhat.com> Cc: Mathieu Desnoyers <compudj@krystal.dyndns.org> Cc: Frederic Weisbecker <fweisbec@gmail.com> Cc: Ananth N Mavinakayanahalli <ananth@in.ibm.com> LKML-Reference: <20100225133446.6725.78994.stgit@localhost6.localdomain6> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2010-02-25x86: Add text_poke_smp for SMP cross modifying codeMasami Hiramatsu
Add generic text_poke_smp for SMP which uses stop_machine() to synchronize modifying code. This stop_machine() method is officially described at "7.1.3 Handling Self- and Cross-Modifying Code" on the intel's software developer's manual 3A. Since stop_machine() can't protect code against NMI/MCE, this function can not modify those handlers. And also, this function is basically for modifying multibyte-single-instruction. For modifying multibyte-multi-instructions, we need another special trap & detour code. This code originaly comes from immediate values with stop_machine() version. Thanks Jason and Mathieu! Signed-off-by: Masami Hiramatsu <mhiramat@redhat.com> Cc: systemtap <systemtap@sources.redhat.com> Cc: DLE <dle-develop@lists.sourceforge.net> Cc: Mathieu Desnoyers <compudj@krystal.dyndns.org> Cc: Ananth N Mavinakayanahalli <ananth@in.ibm.com> Cc: Jim Keniston <jkenisto@us.ibm.com> Cc: Srikar Dronamraju <srikar@linux.vnet.ibm.com> Cc: Christoph Hellwig <hch@infradead.org> Cc: Steven Rostedt <rostedt@goodmis.org> Cc: Frederic Weisbecker <fweisbec@gmail.com> Cc: Anders Kaseorg <andersk@ksplice.com> Cc: Tim Abbott <tabbott@ksplice.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: Jason Baron <jbaron@redhat.com> Cc: Frederic Weisbecker <fweisbec@gmail.com> Cc: Ananth N Mavinakayanahalli <ananth@in.ibm.com> LKML-Reference: <20100225133438.6725.80273.stgit@localhost6.localdomain6> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2010-02-25kprobes/x86: Cleanup save/restore registersMasami Hiramatsu
Introduce SAVE/RESOTRE_REGS_STRING for cleanup kretprobe-trampoline asm code. These macros will be used for emulating interruption. Signed-off-by: Masami Hiramatsu <mhiramat@redhat.com> Cc: systemtap <systemtap@sources.redhat.com> Cc: DLE <dle-develop@lists.sourceforge.net> Cc: Ananth N Mavinakayanahalli <ananth@in.ibm.com> Cc: Jim Keniston <jkenisto@us.ibm.com> Cc: Srikar Dronamraju <srikar@linux.vnet.ibm.com> Cc: Christoph Hellwig <hch@infradead.org> Cc: Steven Rostedt <rostedt@goodmis.org> Cc: Frederic Weisbecker <fweisbec@gmail.com> Cc: Anders Kaseorg <andersk@ksplice.com> Cc: Tim Abbott <tabbott@ksplice.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: Jason Baron <jbaron@redhat.com> Cc: Mathieu Desnoyers <compudj@krystal.dyndns.org> Cc: Frederic Weisbecker <fweisbec@gmail.com> Cc: Ananth N Mavinakayanahalli <ananth@in.ibm.com> LKML-Reference: <20100225133430.6725.83342.stgit@localhost6.localdomain6> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2010-02-25kprobes/x86: Boost probes when reenteringMasami Hiramatsu
Integrate prepare_singlestep() into setup_singlestep() to boost up reenter probes, if possible. Signed-off-by: Masami Hiramatsu <mhiramat@redhat.com> Cc: systemtap <systemtap@sources.redhat.com> Cc: DLE <dle-develop@lists.sourceforge.net> Cc: Ananth N Mavinakayanahalli <ananth@in.ibm.com> Cc: Jim Keniston <jkenisto@us.ibm.com> Cc: Srikar Dronamraju <srikar@linux.vnet.ibm.com> Cc: Christoph Hellwig <hch@infradead.org> Cc: Steven Rostedt <rostedt@goodmis.org> Cc: Frederic Weisbecker <fweisbec@gmail.com> Cc: Anders Kaseorg <andersk@ksplice.com> Cc: Tim Abbott <tabbott@ksplice.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: Jason Baron <jbaron@redhat.com> Cc: Mathieu Desnoyers <compudj@krystal.dyndns.org> Cc: Frederic Weisbecker <fweisbec@gmail.com> Cc: Ananth N Mavinakayanahalli <ananth@in.ibm.com> LKML-Reference: <20100225133423.6725.12071.stgit@localhost6.localdomain6> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2010-02-25kprobes: Introduce kprobes jump optimizationMasami Hiramatsu
Introduce kprobes jump optimization arch-independent parts. Kprobes uses breakpoint instruction for interrupting execution flow, on some architectures, it can be replaced by a jump instruction and interruption emulation code. This gains kprobs' performance drastically. To enable this feature, set CONFIG_OPTPROBES=y (default y if the arch supports OPTPROBE). Changes in v9: - Fix a bug to optimize probe when enabling. - Check nearby probes can be optimize/unoptimize when disarming/arming kprobes, instead of registering/unregistering. This will help kprobe-tracer because most of probes on it are usually disabled. Changes in v6: - Cleanup coding style for readability. - Add comments around get/put_online_cpus(). Changes in v5: - Use get_online_cpus()/put_online_cpus() for avoiding text_mutex deadlock. Signed-off-by: Masami Hiramatsu <mhiramat@redhat.com> Cc: systemtap <systemtap@sources.redhat.com> Cc: DLE <dle-develop@lists.sourceforge.net> Cc: Ananth N Mavinakayanahalli <ananth@in.ibm.com> Cc: Jim Keniston <jkenisto@us.ibm.com> Cc: Srikar Dronamraju <srikar@linux.vnet.ibm.com> Cc: Christoph Hellwig <hch@infradead.org> Cc: Steven Rostedt <rostedt@goodmis.org> Cc: Frederic Weisbecker <fweisbec@gmail.com> Cc: Anders Kaseorg <andersk@ksplice.com> Cc: Tim Abbott <tabbott@ksplice.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: Jason Baron <jbaron@redhat.com> Cc: Mathieu Desnoyers <compudj@krystal.dyndns.org> Cc: Frederic Weisbecker <fweisbec@gmail.com> Cc: Ananth N Mavinakayanahalli <ananth@in.ibm.com> LKML-Reference: <20100225133407.6725.81992.stgit@localhost6.localdomain6> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2010-02-25kprobes/x86: Cleanup RELATIVEJUMP_INSTRUCTION to RELATIVEJUMP_OPCODEMasami Hiramatsu
Change RELATIVEJUMP_INSTRUCTION macro to RELATIVEJUMP_OPCODE since it represents just the opcode byte. Signed-off-by: Masami Hiramatsu <mhiramat@redhat.com> Acked-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com> Cc: systemtap <systemtap@sources.redhat.com> Cc: DLE <dle-develop@lists.sourceforge.net> Cc: Ananth N Mavinakayanahalli <ananth@in.ibm.com> Cc: Jim Keniston <jkenisto@us.ibm.com> Cc: Srikar Dronamraju <srikar@linux.vnet.ibm.com> Cc: Christoph Hellwig <hch@infradead.org> Cc: Steven Rostedt <rostedt@goodmis.org> Cc: Frederic Weisbecker <fweisbec@gmail.com> Cc: Anders Kaseorg <andersk@ksplice.com> Cc: Tim Abbott <tabbott@ksplice.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: Jason Baron <jbaron@redhat.com> Cc: Mathieu Desnoyers <compudj@krystal.dyndns.org> Cc: Frederic Weisbecker <fweisbec@gmail.com> Cc: Ananth N Mavinakayanahalli <ananth@in.ibm.com> LKML-Reference: <20100225133349.6725.99302.stgit@localhost6.localdomain6> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2010-02-25x86/PCI: Prevent mmconfig memory corruptionThomas Gleixner
commit ff097ddd4 (x86/PCI: MMCONFIG: manage pci_mmcfg_region as a list, not a table) introduced a nasty memory corruption when pci_mmcfg_list is empty. pci_mmcfg_check_end_bus_number() dereferences pci_mmcfg_list.prev even when the list is empty. The following write hits some variable near to pci_mmcfg_list. Further down a similar problem exists, where cfg->list.next is dereferenced unconditionally and a comparison with some variable near to pci_mmcfg_list happens. Add a check for the last element into the for_each_entry() loop and remove all the other crappy logic which is just a leftover of the old array based code which was replaced by the list conversion. Reported-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Bjorn Helgaas <bjorn.helgaas@hp.com> Cc: Yinghai Lu <yinghai@kernel.org> Cc: stable@kernel.org Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2010-02-25OMAP: DSS2: DSI: add dsi_vc_dcs_read_2() helperTomi Valkeinen
Add dsi_vc_dcs_read_2() helper function to read two bytes from the DSI peripheral. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@nokia.com>
2010-02-25ftrace: Remove memory barriers from NMI code when not neededSteven Rostedt
The code in stop_machine that modifies the kernel text has a bit of logic to handle the case of NMIs. stop_machine does not prevent NMIs from executing, and if an NMI were to trigger on another CPU as the modifying CPU is changing the NMI text, a GPF could result. To prevent the GPF, the NMI calls ftrace_nmi_enter() which may modify the code first, then any other NMIs will just change the text to the same content which will do no harm. The code that stop_machine called must wait for NMIs to finish while it changes each location in the kernel. That code may also change the text to what the NMI changed it to. The key is that the text will never change content while another CPU is executing it. To make the above work, the call to ftrace_nmi_enter() must also do a smp_mb() as well as atomic_inc(). But for applications like perf that require a high number of NMIs for profiling, this can have a dramatic effect on the system. Not only is it doing a full memory barrier on both nmi_enter() as well as nmi_exit() it is also modifying a global variable with an atomic operation. This kills performance on large SMP machines. Since the memory barriers are only needed when ftrace is in the process of modifying the text (which is seldom), this patch adds a "modifying_code" variable that gets set before stop machine is executed and cleared afterwards. The NMIs will check this variable and store it in a per CPU "save_modifying_code" variable that it will use to check if it needs to do the memory barriers and atomic dec on NMI exit. Acked-by: Peter Zijlstra <peterz@infradead.org> Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
2010-02-25Merge branch 'mxc-master' of git://git.pengutronix.de/git/imx/linux-2.6 into ↵Uwe Kleine-König
imx/master Removed selection of COMMON_CLKDEV by CONFIG_ARCH_MX5. This is handled in 03e09cd8902717b66f940357257d8ad76114d9f2. arch/arm/plat-mxc/iomux-mx1-mx2.c was moved to arch/arm/plat-mxc/iomux-v1.c in 5e2e95f520538e095d10456acd28d9107317aa32 and got bug fixed in 5c17ef878fa25e04b1e8f1d8f5fa8b267753472c. The bug in arch/arm/plat-mxc/iomux-v1.c isn't present any more since bac3fcfad565c9bbceeed8b607f140c29df97355, so arch/arm/plat-mxc/iomux-mx1-mx2.c is simply deleted. Conflicts: arch/arm/plat-mxc/Kconfig arch/arm/plat-mxc/Makefile arch/arm/plat-mxc/iomux-mx1-mx2.c Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2010-02-25x86, mm: Allow highmem user page tables to be disabled at boot timeIan Campbell
Distros generally (I looked at Debian, RHEL5 and SLES11) seem to enable CONFIG_HIGHPTE for any x86 configuration which has highmem enabled. This means that the overhead applies even to machines which have a fairly modest amount of high memory and which therefore do not really benefit from allocating PTEs in high memory but still pay the price of the additional mapping operations. Running kernbench on a 4G box I found that with CONFIG_HIGHPTE=y but no actual highptes being allocated there was a reduction in system time used from 59.737s to 55.9s. With CONFIG_HIGHPTE=y and highmem PTEs being allocated: Average Optimal load -j 4 Run (std deviation): Elapsed Time 175.396 (0.238914) User Time 515.983 (5.85019) System Time 59.737 (1.26727) Percent CPU 263.8 (71.6796) Context Switches 39989.7 (4672.64) Sleeps 42617.7 (246.307) With CONFIG_HIGHPTE=y but with no highmem PTEs being allocated: Average Optimal load -j 4 Run (std deviation): Elapsed Time 174.278 (0.831968) User Time 515.659 (6.07012) System Time 55.9 (1.07799) Percent CPU 263.8 (71.266) Context Switches 39929.6 (4485.13) Sleeps 42583.7 (373.039) This patch allows the user to control the allocation of PTEs in highmem from the command line ("userpte=nohigh") but retains the status-quo as the default. It is possible that some simple heuristic could be developed which allows auto-tuning of this option however I don't have a sufficiently large machine available to me to perform any particularly meaningful experiments. We could probably handwave up an argument for a threshold at 16G of total RAM. Assuming 768M of lowmem we have 196608 potential lowmem PTE pages. Each page can map 2M of RAM in a PAE-enabled configuration, meaning a maximum of 384G of RAM could potentially be mapped using lowmem PTEs. Even allowing generous factor of 10 to account for other required lowmem allocations, generous slop to account for page sharing (which reduces the total amount of RAM mappable by a given number of PT pages) and other innacuracies in the estimations it would seem that even a 32G machine would not have a particularly pressing need for highmem PTEs. I think 32G could be considered to be at the upper bound of what might be sensible on a 32 bit machine (although I think in practice 64G is still supported). It's seems questionable if HIGHPTE is even a win for any amount of RAM you would sensibly run a 32 bit kernel on rather than going 64 bit. Signed-off-by: Ian Campbell <ian.campbell@citrix.com> LKML-Reference: <1266403090-20162-1-git-send-email-ian.campbell@citrix.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2010-02-25x86: Do not reserve brk for DMI if it's not going to be usedThadeu Lima de Souza Cascardo
This will save 64K bytes from memory when loading linux if DMI is disabled, which is good for embedded systems. Signed-off-by: Thadeu Lima de Souza Cascardo <cascardo@holoscopio.com> LKML-Reference: <1265758732-19320-1-git-send-email-cascardo@holoscopio.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2010-02-25ARM: mach-shmobile: ap4evb: Add KEYSC supportKuninori Morimoto
Because AP4 board has capacitor for KEYSC, we need much time for waiting. Signed-off-by: Kuninori Morimoto <morimoto.kuninori@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-02-25sh: ms7724: modify scan_timing for KEYSCKuninori Morimoto
KEYSC::SCN register of SH7724 is 3bit. Thus, scan_timing should be 0 - 7 here. Signed-off-by: Kuninori Morimoto <morimoto.kuninori@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-02-25sh: ms7724: Add sh_sir supportKuninori Morimoto
Signed-off-by: Kuninori Morimoto <morimoto.kuninori@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-02-25sh: mach-ecovec24: Add sh_sir supportKuninori Morimoto
Signed-off-by: Kuninori Morimoto <morimoto.kuninori@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-02-24Merge branch 'for_2.6.34_b' of git://git.pwsan.com/linux-2.6 into omap-for-linusTony Lindgren
2010-02-24OMAP4: clock: Remove clock hacks from timer-gp.cSantosh Shilimkar
Now the omap4 clock framework is in mainline and clk_get_rate() is functional. Hence reomve the hardcoded clock hacks. This patch also fixes Division by zero in kernel. Backtrace: [<c0025fb8>] (dump_backtrace+0x0/0x110) from [<c017febc>] (dump_stack+0x18/0x1c) r7:60000093 r6:c0641050 r5:c0223e78 r4:c02126b4 [<c017fea4>] (dump_stack+0x0/0x1c) from [<c00260fc>] (__div0+0x18/0x20) [<c00260e4>] (__div0+0x0/0x20) from [<c01431fc>] (Ldiv0+0x8/0x10) [<c00318d4>] (omap_dm_timer_stop+0x0/0xb0) from [<c002c148>] (omap2_gp_timer_set_mode+0x1c/0x68) r5:c0223e78 r4:00000000 [<c002c12c>] (omap2_gp_timer_set_mode+0x0/0x68) from [<c0063270>] (clockevents_set_mode+0x30/0x64) r5:c020cae0 r4:00000000 [<c0063240>] (clockevents_set_mode+0x0/0x64) from [<c00632fc>] (clockevents_exchange_device+0x30/0x9c) r5:c020cae0 r4:c02146e0 [<c00632cc>] (clockevents_exchange_device+0x0/0x9c) from [<c00636e0>] (tick_notify+0x17c/0x404) r7:00000000 r6:c0641050 r5:00000000 r4:c020cae0 [<c0063564>] (tick_notify+0x0/0x404) from [<c005d5fc>] (notifier_call_chain+0x34/0x78) [<c005d5c8>] (notifier_call_chain+0x0/0x78) from [<c005d684>] (__raw_notifier_call_chain+0x1c/0x24) [<c005d668>] (__raw_notifier_call_chain+0x0/0x24) from [<c005d6ac>] (raw_notifier_call_chain+0x20/0x28) [<c005d68c>] (raw_notifier_call_chain+0x0/0x28) from [<c0062e78>] (clockevents_do_notify+0x1c/0x24) [<c0062e5c>] (clockevents_do_notify+0x0/0x24) from [<c0062f18>] (clockevents_register_device+0x98/0xd0) [<c0062e80>] (clockevents_register_device+0x0/0xd0) from [<c001a194>] (percpu_timer_setup+0x80/0x9c) r7:00000000 r6:00000002 r5:00000002 r4:00000003 [<c001a114>] (percpu_timer_setup+0x0/0x9c) from [<c000e9f0>] (smp_prepare_cpus+0xb0/0xe8) [<c000e940>] (smp_prepare_cpus+0x0/0xe8) from [<c00084e8>] (kernel_init+0x5c/0x1fc) r7:00000000 r6:00000000 r5:00000000 r4:c001b8a4 [<c000848c>] (kernel_init+0x0/0x1fc) from [<c0046c50>] (do_exit+0x0/0x604) r7:00000000 r6:00000000 r5:00000000 r4:00000000 Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
2010-02-24OMAP4: clock: Add dummy clock nodes for interface clocksSantosh Shilimkar
On OMAP4 platform the iclk control is completly under hardware control and no software control is available. This difference w.r.t previous OMAP's needs all the common driver accross OMAP's , cpu_is_xxxx() checks. To avoid poulluting the drivers dummy clock nodes are created (The autogeneration script has been updated accordingly). Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com> [paul@pwsan.com: made OMAP1 dummy_ck common and edited patch to reuse that] Signed-off-by: Paul Walmsley <paul@pwsan.com>
2010-02-24OMAP4: clock: Rename leaf clock nodes to end with a _ick or _fckRajendra Nayak
All leaf clock nodes are renamed for OMAP4 to have a clk name which end with a _ick or a _fck. This is done so that the naming convention is same as that followed on older OMAPs. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
2010-02-24OMAP2+ clock: revise omap2_clk_{disable,enable}()Paul Walmsley
Simplify the code in the omap2_clk_disable() and omap2_clk_enable() functions, reducing levels of indentation. This makes the code easier to read. Add some additional debugging pr_debug()s here also to help others understand what is going on. Revise the omap2_clk_disable() logic so that it now attempts to disable the clock's clockdomain before recursing up the clock tree. Simultaneously, ensure that omap2_clk_enable() is called on parent clocks first, before enabling the clockdomain. This ensures that a parent clock's clockdomain is enabled before the child clock's clockdomain. These sequences should be the inverse of each other. Revise the omap2_clk_enable() logic so that it now cleans up after itself upon encountering an error. Previously, an error enabling a parent clock could have resulted in inconsistent usecounts on the enclosing clockdomain. Remove the trivial _omap2_clk_disable() and _omap2_clk_enable() static functions, and replace it with the clkops calls that they were executing. For all this to work, the clockdomain omap2_clkdm_clk_enable() and omap2_clkdm_clk_disable() code must not return an error on clockdomains without CLKSTCTRL registers; so modify those functions to simply return 0 in that case. While here, add some basic kerneldoc documentation on both functions, and get rid of some old non-CodingStyle-compliant comments that have existed since the dawn of time (at least, the OMAP clock framework's time). Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Richard Woodruff <r-woodruff2@ti.com> Cc: Rajendra Nayak <rnayak@ti.com>
2010-02-24OMAP2/3 clock: combine OMAP2 & 3 boot-time MPU rate change codePaul Walmsley
The OMAP2 and OMAP3 boot-time MPU rate change code is almost identical. Merge them into mach-omap2/clock.c, and add kerneldoc documentation. Signed-off-by: Paul Walmsley <paul@pwsan.com>
2010-02-24OMAP clockdomain: if no autodeps exist, don't try to add or remove themPaul Walmsley
_clkdm_add_autodeps() and _clkdm_del_autodeps() will attempt to dereference a NULL pointer if no autodeps were supplied to clkdm_init(). Based on a patch from Roel Kluin <roel.kluin@gmail.com> - thanks Roel. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Roel Kluin <roel.kluin@gmail.com>
2010-02-24OMAP hwmod: add hwmod class supportPaul Walmsley
Add support for categorizing and iterating over hardware IP blocks by the "class" of the IP block. The class is the type of the IP block: e.g., "timer", "timer1ms", etc. Move the OCP_SYSCONFIG/SYSSTATUS data from the struct omap_hwmod into the struct omap_hwmod_class, since it's expected to stay consistent for each class. While here, fix some comments. The hwmod_class structures in this patch were designed and proposed by Benoît Cousson <b-cousson@ti.com> and were refined in a discussion between Thara Gopinath <thara@ti.com>, Kevin Hilman <khilman@deeprootsystems.com>, and myself. This patch uses WARN() lines that are longer than 80 characters, as Kevin noted a broader lkml consensus to increase greppability by keeping the messages all on one line. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Benoît Cousson <b-cousson@ti.com> Cc: Thara Gopinath <thara@ti.com> Cc: Kevin Hilman <khilman@deeprootsystems.com>
2010-02-24ARM: S3C64XX: Add initial support for board specific IRQsMark Brown
Follow the scheme used for IRQs. By default 16 GPIOs are allocated for board use. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2010-02-24ARM: S5PV210: Add S5PC110 configuration fileKukjin Kim
This patch adds S5PC110 default configuration file. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2010-02-24ARM: S5PV210: Add S5PV210 configuration fileKukjin Kim
This patch adds S5PV210 default configuration file. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2010-02-24ARM: S5PV210: Add SMDKC110 board support fileKukjin Kim
This patch adds SMDKC110 board support file. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2010-02-24ARM: S5PV210: Add SMDKV210 board support fileKukjin Kim
This patch adds SMDKV210 board support file. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2010-02-24ARM: S5PV210: Update Kconfig and MakefilesKukjin Kim
Updates arch/arm Kconfig and Makefile for building the S5PV210 support. Also modifies the plat-s5p Kconfig file to include the support for plat-s5p for S5PV210. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2010-02-24ARM: S5PV210: Add IRQ supportKukjin Kim
This patch adds IRQ support for S5PV210. This patch adds interrupt register definitions, IRQ definitions for various interrupt sources and new VIC base for VIC2 and VIC3 in plat-s5p common irq code. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2010-02-24ARM: S5PV210: Add clock support for S5PV210Kukjin Kim
This patch adds clock support for S5PV210. This patch adds the clock register definitions and the various system clocks in S5PV210. Clocks that are common to other S5P SoC'c are added in the common S5P clock support. Signed-off-by: Thomas Abraham <thomas.ab@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2010-02-24ARM: S5PV210: Add Samsung S5PV210 CPU supportKukjin Kim
This patch adds support for Samsung S5PV210 CPU. This patch also adds an entry for S5PV210 cpu in plat-s5p cpu table. Signed-off-by: Thomas Abraham <thomas.ab@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2010-02-24ARM: 5958/1: ARM: U300: fix inverted clk round rateLinus Walleij
The clk_round_rate() functions in the U300 clocking will always select the lowest clocking frequency due to inverted rounding comparisons. Fix this. Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-02-24ARM: 5956/1: misplaced parenthesesRoel Kluin
The parentheses appear misplaced. Signed-off-by: Roel Kluin <roel.kluin@gmail.com> Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-02-24ARM: 5955/1: ep93xx: move timer defines into core.c and documentHartley Sweeten
The timer defines are only used in core.c. Move them so they will not be globaly exposed. While here, add additional defines to document the magic numbers used in the registers. Also, add some comments for clarification. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: Ryan Mallon <ryan@bluewatersys.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>