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2010-05-14ARM: S3C6410: Declare IISv4 audio-bus clockJassi Brar
Declare 'audio-bus' clock for IISv4 controller of S3C6410. Even though the name is same as that for IISv3, the id is set to -1(just one instance of the controller is available) which helps always fetch the correct clock. Signed-off-by: Jassi Brar <jassi.brar@samsung.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2010-05-14ARM: S3C6410: Declare possible sources of audio-bus2Jassi Brar
Declare possible sources of CLKAUDIO[2]/audio-bus for IISv4 controller. Signed-off-by: Jassi Brar <jassi.brar@samsung.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2010-05-14ARM: S3C6410: Declare IISCDCLK_V4 ClockJassi Brar
Declare the source of clock provided at Xi2sCDCLK2 pin for IISv4 controller. Signed-off-by: Jassi Brar <jassi.brar@samsung.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2010-05-14ARM: S3C6410: Define clk_src2 registerJassi Brar
Define S3C6410 specific register - CLK_SRC2 Signed-off-by: Jassi Brar <jassi.brar@samsung.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2010-05-14mtd: kirkwood: allow machines to register RnB callbackBen Dooks
Add a kirkwood_nand_init_rnb() call to allow boards which have RnB line detection to register this instead of a static delay. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2010-05-14mtd: orion/kirkwood: add RnB line support to orion mtd driverBen Dooks
Add support for a board to register a callback to get the state of the RnB line if it has it attached. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2010-05-13x86, amd: Check X86_FEATURE_OSVW bit before accessing OSVW MSRsAndreas Herrmann
If host CPU is exposed to a guest the OSVW MSRs are not guaranteed to be present and a GP fault occurs. Thus checking the feature flag is essential. Cc: <stable@kernel.org> # .32.x .33.x Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com> LKML-Reference: <20100427101348.GC4489@alberich.amd.com> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2010-05-13msm: 7x30 Kconfig and makefile changesDaniel Walker
Enables basic boot support for the MSM7x30 SURF development board. Signed-off-by: Daniel Walker <dwalker@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org> Signed-off-by: Gregory Bean <gbean@codeaurora.org> Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
2010-05-13msm: clock support for the MSM7x30 CPU.Gregory Bean
Signed-off-by: Gregory Bean <gbean@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org> Signed-off-by: Daniel Walker <dwalker@codeaurora.org> Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
2010-05-13msm: physical offset for MSM7X30Daniel Walker
The MSM7x30 does not have a separate bank of memory for shared memory communication with the radio CPU. Set the kernel base address 2MB in, to use this first 2MB for this purpose. Signed-off-by: Daniel Walker <dwalker@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org> Signed-off-by: Gregory Bean <gbean@codeaurora.org> Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
2010-05-13msm: io: add io support for 7x30Daniel Walker
Signed-off-by: Daniel Walker <dwalker@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org> Signed-off-by: Gregory Bean <gbean@codeaurora.org> Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
2010-05-13msm: Add extern for 7x30 clock list.Daniel Walker
Signed-off-by: Daniel Walker <dwalker@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org> Signed-off-by: Gregory Bean <gbean@codeaurora.org> Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
2010-05-13msm: dma: add 7x30 security domain abstractionDaniel Walker
The MSM SOC's DMA controller contains several security domains. On the MSM7x00, only security domain 3 is accessible to our CPU. The 7x30, however, uses security domain 2. Fix up the register definition macros to select this appropriately, based on configured target. Signed-off-by: Daniel Walker <dwalker@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org> Signed-off-by: Gregory Bean <gbean@codeaurora.org> Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
2010-05-13msm: update basic board layout for MSM7x30Daniel Walker
Signed-off-by: Daniel Walker <dwalker@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org> Signed-off-by: Gregory Bean <gbean@codeaurora.org> Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
2010-05-13msm: add devices-msm7x30.cDaniel Walker
This adds a clock list, and common resource structures for MSM7x30. Signed-off-by: Daniel Walker <dwalker@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org> Signed-off-by: Gregory Bean <gbean@codeaurora.org> Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
2010-05-13msm: add msm_iomap-7x30.h for MSM7x30 supportDaniel Walker
Add a header describing the io regions for MSM7x30. Signed-off-by: Daniel Walker <dwalker@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org> Signed-off-by: Gregory Bean <gbean@codeaurora.org> Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
2010-05-13msm: irqs: add irqs-7x30.h for MSM7x30 supportDaniel Walker
Signed-off-by: Daniel Walker <dwalker@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org> Signed-off-by: Gregory Bean <gbean@codeaurora.org> Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
2010-05-13msm: 8x50 Kconfig changesDaniel Walker
Enable CONFIG_ARCH_QSD8X50. This is the first SOC with the Scorpion processor. Signed-off-by: Daniel Walker <dwalker@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org> Signed-off-by: Gregory Bean <gbean@codeaurora.org> Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
2010-05-13msm: physical offset for QSD8x50Daniel Walker
Support different RAM base addresses used by Qualcomm SOCs, with QSD8x50 as the first addtional one. Signed-off-by: Daniel Walker <dwalker@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org> Signed-off-by: Gregory Bean <gbean@codeaurora.org> Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
2010-05-13msm: io: add io support for 8x50Daniel Walker
Signed-off-by: Daniel Walker <dwalker@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org> Signed-off-by: Gregory Bean <gbean@codeaurora.org> Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
2010-05-13msm: add extern for 8x50 clock list.Daniel Walker
Signed-off-by: Daniel Walker <dwalker@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org> Signed-off-by: Gregory Bean <gbean@codeaurora.org> Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
2010-05-13msm: add devices-qsd8x50.cDaniel Walker
This adds a clock list, and common resource structures for QSD8x50. Signed-off-by: Daniel Walker <dwalker@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org> Signed-off-by: Gregory Bean <gbean@codeaurora.org> Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
2010-05-13msm: update basic board layout for QSD8x50Daniel Walker
Signed-off-by: Daniel Walker <dwalker@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org> Signed-off-by: Gregory Bean <gbean@codeaurora.org> Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
2010-05-13msm: add msm_iomap-8x50.h for QSD8x50 supportDaniel Walker
Add a header describing the io regions for QSD8x50. Signed-off-by: Daniel Walker <dwalker@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org> Signed-off-by: Gregory Bean <gbean@codeaurora.org> Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
2010-05-13msm: irqs: add irqs-8x50.h for QSD8x50 supportDaniel Walker
Signed-off-by: Daniel Walker <dwalker@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org> Signed-off-by: Gregory Bean <gbean@codeaurora.org> Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
2010-05-13msm: timer: allow MSM_DGT_BASE to be overridenDaniel Walker
Some SoC need to redefine MSM_DGT_BASE from it's default. This allows it to be defined in a header to override the default value. Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
2010-05-13msm: add Qualcomm 7x30 interrupt controller driver.Gregory Bean
Signed-off-by: Gregory Bean <gbean@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org> Signed-off-by: Daniel Walker <dwalker@codeaurora.org> Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
2010-05-13msm: add tlmm support for gpio.Gregory Bean
GPIO support for Qualcomm SOCs requires interaction with the radio (baseband processor). This API allows the different boards to enable GPIO through the radio processor in a generic way. Signed-off-by: Gregory Bean <gbean@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org> Signed-off-by: Daniel Walker <dwalker@codeaurora.org> Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
2010-05-13msm: generalize clock support.Daniel Walker
The 'PCOM' method of clock control (commands issued to the radio CPU) is shared across several (but not all) Qualcomm SOCs. Generalize this clock mechanism so these other SOCs can be added. Signed-off-by: Gregory Bean <gbean@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org> Signed-off-by: Daniel Walker <dwalker@codeaurora.org> Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
2010-05-13msm: add sirc interrupt controller driver.Gregory Bean
Scorpion-based SOCs from Qualcomm use a different interrupt controller 'sirc'. Signed-off-by: Gregory Bean <gbean@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org> Signed-off-by: Daniel Walker <dwalker@codeaurora.org> Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
2010-05-13msm: generialize iomap to support multiple SOCs.Gregory Bean
msm_iomap.h is specific to the MSM7x00 series devices. Generalize this in preparation to support more devices. Signed-off-by: Gregory Bean <gbean@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org> Signed-off-by: Daniel Walker <dwalker@codeaurora.org> Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
2010-05-13msm: generialize IRQ to support multiple SOCs.Gregory Bean
irqs.h is specific to the MSM7x00 series devices. Generalize this in preparation to support more devices. Signed-off-by: Gregory Bean <gbean@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org> Signed-off-by: Daniel Walker <dwalker@codeaurora.org> Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
2010-05-13msm: generalization to support multiple SOCs.Gregory Bean
devices.c is specific to the MSM7x00 series of SOCs. Rename appropriately in preparation to support more devices. Signed-off-by: Gregory Bean <gbean@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org> Signed-off-by: Daniel Walker <dwalker@codeaurora.org> Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
2010-05-13DM365: Added more PINMUX configurations for AEMIFThomas Koeller
More complete AEMIF support for boards. Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2010-05-13DM365: Make CLKOUTx availableThomas Koeller
Added PINMUX configurations for the CLKOUT0 .. CLKOUT2 functions, for boards that want to use these clocks. Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2010-05-13DM365: Added PINMUX definitions for GPIO30..32Thomas Koeller
Board code may want to use them. Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2010-05-13Davinci: iotable based ioremap() interceptionCyril Chemparathy
This patch allows for a more flexible ioremap() interception based on iotable contents. With this patch, the ioremap() interception code can properly translate addresses only after davinci_soc_info has been initialized. Consequently, in soc-specific init functions, davinci_common_init() has to happen before any ioremap() attempts. The da8xx init sequence has been suitably modified to meet this restriction. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2010-05-13Davinci: pinmux - use ioremap()Cyril Chemparathy
This patch modifies the pinmux implementation so as to ioremap() the pinmux register area on first use. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2010-05-13Davinci: aintc/cpintc - use ioremap()Cyril Chemparathy
This patch implements the following: - interrupt initialization uses ioremap() instead of passing a virtual address via davinci_soc_info. - machine definitions directly point to cp_intc_init() or davinci_irq_init() - davinci_intc_type and davinci_intc_base now get initialized in controller specific init functions instead of davinci_common_init() - minor fix in davinci_irq_init() to use intc_irq_num instead of DAVINCI_N_AINTC_IRQ Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2010-05-13Davinci: psc - use ioremap()Cyril Chemparathy
This patch modifies the psc and clock control code to use ioremap()ed registers. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2010-05-13Davinci: timer - use ioremap()Cyril Chemparathy
This patch eliminates IO_ADDRESS() usage for Davinci timer definitions. The timer code has correspondingly been modified to ioremap() MMRs instead. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2010-05-13Davinci: jtag_id - use ioremap()Cyril Chemparathy
This patch replaces the jtag id base info in davinci_soc_info with a physical address which is then ioremap()ed within common code. This patch (in combination with a similar change for PSC) will allow us to eliminate the SYSCFG nastiness in DA8xx code. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2010-05-13Davinci: da8xx: rtc - use ioremapCyril Chemparathy
This patch modifies the RTC unlock code to use ioremap() maps instead of IO_ADDRESS() translation. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2010-05-13Davinci: gpio - use ioremap()Cyril Chemparathy
This patch modifies the gpio_base definition in davinci_soc_info to be a physical address, which is then ioremap()ed by the gpio initialization function. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2010-05-13davinci: edma: fix coding style issue related to breaking linesSekhar Nori
In the edma driver, most of the long lines in 'if condition' are broken after the logical operator '&&' except two instances. This patch fixes that to bring consistency across the file. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2010-05-13davinci: edma: use BIT() wherever possibleSekhar Nori
This patch replaces occurences of (1 << x) with BIT(x) as it makes for much better reading. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2010-05-13ARM: 6107/1: plat-nomadik: use the MTU clocksrc for sched_clockLinus Walleij
This provides some serious scheduling for the Nomadik family by introducing a sched_clock() using the MTU clock source in the same manner as e.g. OMAP or U300. This type of solutions has been discussed at no end in the past, however we need this resolution for making measurements and using HRTimers. Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-05-13ARM: 6124/1: ep93xx: SPI driver platform support codeMika Westerberg
This patch adds platform side support code for the EP93xx SPI driver. This includes clock, resources and muxing. There is a new function: ep93xx_register_spi() which can be used by board support code to register new SPI devices for the board. This patch depends on patch 5998/1 ep93xx: added chip revision reading function Cc: Ryan Mallon <ryan@bluewatersys.com> Cc: David Brownell <dbrownell@users.sourceforge.net> Cc: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Mika Westerberg <mika.westerberg@iki.fi> Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: Martin Guy <martinwguy@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-05-13microblaze: export assembly functions used by modulesMichal Simek
Export __strncpy_user, memory_size, ioremap_bot for modules. Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-05-13microblaze: Remove powerpc code from Microblaze portMichal Simek
Remove eeh_add_device_tree_late which is powerpc specific code. Signed-off-by: Michal Simek <monstr@monstr.eu>
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