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2019-01-22mips: math-emu: no need to check return value of debugfs_create functionsGreg Kroah-Hartman
When calling debugfs functions, there is no need to ever check the return value. The function can work or not, but the code logic should never do something different based on this. Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Paul Burton <paul.burton@mips.com> Cc: James Hogan <jhogan@kernel.org> Cc: Yangtao Li <tiny.windzz@gmail.com> Cc: linux-mips@vger.kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Paul Burton <paul.burton@mips.com>
2019-01-22mips: mm: no need to check return value of debugfs_create functionsGreg Kroah-Hartman
When calling debugfs functions, there is no need to ever check the return value. The function can work or not, but the code logic should never do something different based on this. Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Paul Burton <paul.burton@mips.com> Cc: James Hogan <jhogan@kernel.org> Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Cc: linux-mips@vger.kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Paul Burton <paul.burton@mips.com>
2019-01-22mips: ralink: no need to check return value of debugfs_create functionsGreg Kroah-Hartman
When calling debugfs functions, there is no need to ever check the return value. The function can work or not, but the code logic should never do something different based on this. Cc: John Crispin <john@phrozen.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Paul Burton <paul.burton@mips.com> Cc: James Hogan <jhogan@kernel.org> Cc: linux-mips@vger.kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Paul Burton <paul.burton@mips.com>
2019-01-22mips: cavium: no need to check return value of debugfs_create functionsGreg Kroah-Hartman
When calling debugfs functions, there is no need to ever check the return value. The function can work or not, but the code logic should never do something different based on this. Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Paul Burton <paul.burton@mips.com> Cc: James Hogan <jhogan@kernel.org> Cc: linux-mips@vger.kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> [paul.burton@mips.com: Remove return 0 from init_debugfs() as pointed out by Aaro Koskinen.] Signed-off-by: Paul Burton <paul.burton@mips.com>
2019-01-22x86/Kconfig: Select PCI_LOCKLESS_CONFIG if PCI is enabledSinan Kaya
After commit 5d32a66541c4 ("PCI/ACPI: Allow ACPI to be built without CONFIG_PCI set") dependencies on CONFIG_PCI that previously were satisfied implicitly through dependencies on CONFIG_ACPI have to be specified directly. PCI_LOCKLESS_CONFIG depends on PCI but this dependency has not been mentioned in the Kconfig so add an explicit dependency here and fix WARNING: unmet direct dependencies detected for PCI_LOCKLESS_CONFIG Depends on [n]: PCI [=n] Selected by [y]: - X86 [=y] Fixes: 5d32a66541c46 ("PCI/ACPI: Allow ACPI to be built without CONFIG_PCI set") Signed-off-by: Sinan Kaya <okaya@kernel.org> Signed-off-by: Borislav Petkov <bp@suse.de> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-acpi@vger.kernel.org Cc: x86-ml <x86@kernel.org> Link: https://lkml.kernel.org/r/20190121231958.28255-2-okaya@kernel.org
2019-01-22arm64: dts: renesas: r8a774c0: Add VIN and CSI-2 device nodesFabrizio Castro
Add device nodes for VIN4, VIN5 and CSI40 to RZ/G2E (a.k.a. R8A774C0) SoC specific device tree. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-01-22arm64: dts: renesas: r8a774c0: Add PCIe device nodeFabrizio Castro
This patch adds PCI express channel 0 device tree node to the RZ/G2E (a.k.a. R8A774C0) SoC dtsi. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-01-22arm64: dts: renesas: r8a774c0: Connect RZ/G2E Audio-DMAC to IPMMUFabrizio Castro
Hook up the RZ/G2E Audio-DMAC device to IPMMU-MP as stated by the RZ/G2 User's manual. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-01-22arm64: dts: renesas: r8a774c0: Connect RZ/G2E AVB to IPMMUFabrizio Castro
Hook up the RZ/G2E AVB device to IPMMU-DS0 as stated by the RZ/G2 User's manual. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-01-22arm64: dts: renesas: r8a774c0: Connect RZ/G2E SYS-DMAC to IPMMUFabrizio Castro
Hook up SYS-DMAC0, SYS-DMAC1, and SYS-DMAC2 to IPMMU-DS0 and IPMMU-DS1, according to what reported by the RZ/G2 User's manual. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-01-22arm64: dts: renesas: r8a774c0: Add USB3.0 device nodesFabrizio Castro
Add usb3.0 host and function device nodes to the RZ/G2E SoC dtsi. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-01-22arm64: dts: renesas: r8a774c0: Add USB-DMAC and HSUSB device nodesFabrizio Castro
Add usb dmac and hsusb device nodes on RZ/G2E SoC dtsi. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-01-22arm64: dts: renesas: r8a774c0: Add USB2.0 phy and host device nodesFabrizio Castro
Add USB2.0 phy and host (EHCI/OHCI) device tree nodes to the RZ/G2E SoC dtsi. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-01-22arm64: dts: renesas: r8a774c0: Add display output supportFabrizio Castro
The RZ/G2E (a.k.a. R8A774C0) has one RGB output and two LVDS outputs connected to DU. This patch add support for DU, LVDS encoders, VSP and FCP. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-01-22arm64: dts: renesas: r8a774c0: Add PWM supportFabrizio Castro
Add PWM support to the RZ/G2E (a.k.a. R8A774C0) SoC specific device tree. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-01-22arm64: dts: renesas: r8a774c0: Add audio supportFabrizio Castro
Add sound support for the RZ/G2E SoC (a.k.a. R8A774C0). This work is based on similar work done on the R8A77990 SoC by Yoshihiro Kaneko <ykaneko0929@gmail.com>. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-01-22arm64: dts: renesas: r8a774c0: Add MSIOF nodesFabrizio Castro
Add the device nodes for all MSIOF SPI controllers on RZ/G2E SoC. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-01-22arm64: dts: renesas: r8a774c0: Add thermal supportFabrizio Castro
This patch adds the thermal device node and the thermal-zones node to the SoC specific dtsi for the RZ/G2E. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-01-22arm64: dts: renesas: r8a774c0: Add CAN nodesFabrizio Castro
Add the device nodes for both RZ/G2E CAN channels. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-01-22arm64: dts: renesas: r8a774c0: Add IPMMU device nodesFabrizio Castro
Add r8a774c0 IPMMU nodes. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-01-22arm64: dts: renesas: r8a774c0: Add I2C and IIC-DVFS supportFabrizio Castro
Add the I2C[0-7] and IIC Bus Interface for DVFS (IIC for DVFS) devices nodes to the r8a774c0 device tree. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-01-22arm64: dts: renesas: r8a774c0: Add SDHI nodesFabrizio Castro
Add SDHI nodes to the DT of the r8a774c0 SoC. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-01-22arm64: dts: renesas: r8a774c0: Add secondary CA53 CPU coreFabrizio Castro
Add a device node for the second Cortex-A53 CPU core on the Renesas RZ/G2E (a.k.a r8a774c0) SoC, and adjust the interrupt delivery masks for the ARM Generic Interrupt Controller and Architectured Timer. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-01-22arm64: dts: renesas: r8a774c0: Add watchdog supportFabrizio Castro
Add watchdog support to the RZ/G2E (a.k.a. R8A774C0) SoC specific device tree. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-01-22arm64: dts: renesas: r8a774c0: Add Ethernet AVB nodeFabrizio Castro
This patch adds the SoC specific part of the Ethernet AVB device tree node. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-01-22arm64: dts: renesas: r8a774c0: Add GPIO device nodesFabrizio Castro
Add GPIO device nodes to the DT of the r8a774c0 SoC. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-01-22arm64: dts: renesas: r8a774c0: Add PFC supportFabrizio Castro
Add PFC support to the RZ/G2E (a.k.a. r8a774c0) SoC specific device tree. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-01-22arm64: dts: renesas: r8a774c0: Add INTC-EX device nodeFabrizio Castro
Add support for the Interrupt Controller for External Devices (INTC-EX) on RZ/G2E. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-01-22arm64: dts: renesas: r8a774c0: Add SCIF and HSCIF nodesFabrizio Castro
Add the device nodes for all RZ/G2E SCIF and HSCIF serial ports, including clocks, power domains and DMAs. According to the HW user manual, SCIF[015] and HSCIF[012] are connected to both SYS-DMAC1 and SYS-DMAC2, while SCIF[34] and HSCIF[34] are connected to SYS-DMAC0. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-01-22arm64: dts: renesas: r8a774c0: Add SYS-DMAC controller nodesFabrizio Castro
Add sys-dmac[012] device nodes for the RZ/G2E SoC (a.k.a. r8a774c0). Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-01-22arm64: dts: renesas: Initial device tree for r8a774c0Fabrizio Castro
Basic support for the RZ/G2E SoC (a.k.a. r8a774c0). Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-01-22arm64: dts: renesas: r8a77990: ebisu: Fix EthernetAVB phy mode to rgmiiKazuya Mizuguchi
According to the R-Car Gen3 Hardware Manual Errata for Rev 1.00 of August 24, 2018, the TX clock internal delay mode doesn't support on R-Car E3. This patch fixes EthernetAVB phy mode to rgmii. This is achieved by simply dropping the phy-mode property from r8a77990-ebisu.dts as the default property for this for r8a77990, as set in r8a77990.dtsi, is "rgmii". Signed-off-by: Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com> Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Ulrich Hecht <uli+renesas@fpond.eu>
2019-01-22ARM: dts: vexpress: use list instead of tuple for mmci interruptsSudeep Holla
Vexpress motherboard MMCI requires dedicated interrupts for CMD and PIO, which obviously should be expressed as a list. Current form uses tuple and it works fine since interrupt-cells equal to 1. Reported-by: Vladimir Murzin <vladimir.murzin@arm.com> Reviewed-by: Vladimir Murzin <vladimir.murzin@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2019-01-22ARM: shmobile: defconfig: Refresh for v5.0-rc1Geert Uytterhoeven
- Move SoC config options (moved in commit 062887bf5ef73313 ("ARM: shmobile: Move SoC Kconfig symbols to drivers/soc/renesas/")), - Move PCI config options (moved in commit eb01d42a77785ff9 ("PCI: consolidate PCI config entry in drivers/pci")), - Drop CONFIG_I2C_MUX=y (auto-enabled since commit ea6b13e9fed0fda9 ("drm/bridge/sii902x: Add missing dependency on I2C_MUX")), - Drop CONFIG_SH_DMAE=y (no longer selectable since commit a19788612f51b787 ("dmaengine: sh: Remove R-Mobile APE6 support")), - Drop CONFIG_ARM_UNWIND (auto-enabled since commit f9b58e8c7d031b0d ("ARM: 8800/1: use choice for kernel unwinders")). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-01-22pseries: ibmebus.c: convert to use BUS_ATTR_WOGreg Kroah-Hartman
We are trying to get rid of BUS_ATTR() and the usage of that in ibmebus.c can be trivially converted to use BUS_ATTR_WO(), so use that instead. Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Cc: Tyrel Datwyler <tyreld@linux.vnet.ibm.com> Acked-by: Michael Ellerman <mpe@ellerman.id.au> (powerpc) Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-01-22x86/fpu: Get rid of CONFIG_AS_FXSAVEQBorislav Petkov
This was a "workaround" to probe for binutils which could generate FXSAVEQ, apparently gas with min version 2.16. In the meantime, minimal required gas version is 2.20 so all those workarounds for older binutils can be dropped. Signed-off-by: Borislav Petkov <bp@suse.de> Acked-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@redhat.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Andy Lutomirski <luto@kernel.org> Link: https://lkml.kernel.org/r/20190117232408.GH5023@zn.tnic
2019-01-22x86/traps: Have read_cr0() only once in the #NM handlerBorislav Petkov
... instead of twice in the code. In any case, CR0 ends up being read once anyway: 1. The CONFIG_MATH_EMULATION case does so and exits. 2. The normal case does it once too. However, read it on function entry instead to make the code even simpler to follow. No functional changes. Signed-off-by: Borislav Petkov <bp@suse.de> Reviewed-by: Andy Lutomirski <luto@kernel.org> Acked-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Cc: x86@kernel.org Link: https://lkml.kernel.org/r/20190117120728.3811-1-bp@alien8.de
2019-01-22iomap: introduce io{read|write}64_{lo_hi|hi_lo}Logan Gunthorpe
In order to provide non-atomic functions for io{read|write}64 that will use readq and writeq when appropriate. We define a number of variants of these functions in the generic iomap that will do non-atomic operations on pio but atomic operations on mmio. These functions are only defined if readq and writeq are defined. If they are not, then the wrappers that always use non-atomic operations from include/linux/io-64-nonatomic*.h will be used. Signed-off-by: Logan Gunthorpe <logang@deltatee.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Cc: Michael Ellerman <mpe@ellerman.id.au> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Suresh Warrier <warrier@linux.vnet.ibm.com> Cc: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-01-22parisc: iomap: introduce io{read|write}64Logan Gunthorpe
Add support for io{read|write}64() functions in parisc architecture. These are pretty straightforward copies of similar functions which make use of readq and writeq. Also, indicate that the lo_hi and hi_lo variants of these functions are not provided by this architecture. Signed-off-by: Logan Gunthorpe <logang@deltatee.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Acked-by: Helge Deller <deller@gmx.de> Cc: "James E.J. Bottomley" <jejb@parisc-linux.org> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Philippe Ombredanne <pombredanne@nexb.com> Cc: Kate Stewart <kstewart@linuxfoundation.org> Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-01-22arm64: dts: sdm845: Add interconnect provider DT nodesDavid Dai
Add RSC (Resource State Coordinator) provider dictating network-on-chip interconnect bus performance found on SDM845-based platforms. Signed-off-by: David Dai <daidavid1@codeaurora.org> Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-01-22ARM: dts: mps2: use list instead of tuple for uart interruptsVladimir Murzin
MPS2 UART requires dedicated interrupts for RX, TX and overflow, which obviously should be expressed as a list. Current form uses tuple and it has worked so far because NVIC has interrupt-cells equal to 1. Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2019-01-22powerpc: Adopt nvram module for PPC64Finn Thain
Adopt nvram module to reduce code duplication. This means CONFIG_NVRAM becomes available to PPC64 builds. Previously it was only available to PPC32 builds because it depended on CONFIG_GENERIC_NVRAM. The IOC_NVRAM_GET_OFFSET ioctl as implemented on PPC64 validates the offset returned by pmac_get_partition(). Do the same in the nvram module. Note that the old PPC32 generic_nvram module lacked this test. So when CONFIG_PPC32 && CONFIG_PPC_PMAC, the IOC_NVRAM_GET_OFFSET ioctl would have returned 0 (always). But when CONFIG_PPC64 && CONFIG_PPC_PMAC, the IOC_NVRAM_GET_OFFSET ioctl would have returned -1 (which is -EPERM) when the requested partition was not found. With this patch, the result is now -EINVAL on both PPC32 and PPC64 when the requested PowerMac NVRAM partition is not found. This is a userspace- visible change, in the non-existent partition case, which would be in an error path for an IOC_NVRAM_GET_OFFSET ioctl syscall. Tested-by: Stan Johnson <userm57@yahoo.com> Signed-off-by: Finn Thain <fthain@telegraphics.com.au> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-01-22powerpc: Enable HAVE_ARCH_NVRAM_OPS and disable GENERIC_NVRAMFinn Thain
Switch PPC32 kernels from the generic_nvram module to the nvram module. Also fix a theoretical bug where CHRP omits the chrp_nvram_init() call when CONFIG_NVRAM_MODULE=m. Tested-by: Stan Johnson <userm57@yahoo.com> Signed-off-by: Finn Thain <fthain@telegraphics.com.au> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-01-22powerpc: Define missing ppc_md.nvram_size for CHRP and PowerMacFinn Thain
Add the nvram_size() function to those PowerPC platforms that don't already have one: CHRP and PowerMac. This means that the ppc_md.nvram_size() function can be called by nvram_get_size(). Since we are addressing CHRP inconsistencies here, rename chrp_nvram_read and chrp_nvram_write, which break the naming convention used across powerpc platforms for NVRAM accessor functions. Tested-by: Stan Johnson <userm57@yahoo.com> Signed-off-by: Finn Thain <fthain@telegraphics.com.au> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-01-22m68k: Dispatch nvram_ops calls to Atari or Mac functionsFinn Thain
A multi-platform kernel binary has to decide at run-time how to dispatch the arch_nvram_ops calls. Add a platform-independent arch_nvram_ops struct for this, to replace the atari-specific one. Enable CONFIG_HAVE_ARCH_NVRAM_OPS for Macs. Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> Tested-by: Stan Johnson <userm57@yahoo.com> Signed-off-by: Finn Thain <fthain@telegraphics.com.au> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-01-22m68k/mac: Fix PRAM accessorsFinn Thain
PMU-based m68k Macs pre-date PowerMac-style NVRAM. Use the appropriate PMU commands. Also implement the missing XPRAM accessors for VIA-based Macs. Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> Tested-by: Stan Johnson <userm57@yahoo.com> Signed-off-by: Finn Thain <fthain@telegraphics.com.au> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-01-22m68k/mac: Use macros for RTC accesses not magic numbersFinn Thain
This is intended to improve code style and not affect code behaviour. Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> Tested-by: Stan Johnson <userm57@yahoo.com> Signed-off-by: Finn Thain <fthain@telegraphics.com.au> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-01-22m68k/mac: Adopt naming and calling conventions for PRAM routinesFinn Thain
Adopt the existing *_read_byte and *_write_byte naming convention. Rename via_pram_readbyte and via_pram_writebyte to avoid confusion. Adjust calling conventions of mac_pram_* functions to match the struct nvram_ops methods. Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> Tested-by: Stan Johnson <userm57@yahoo.com> Signed-off-by: Finn Thain <fthain@telegraphics.com.au> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-01-22m68k/atari: Implement arch_nvram_ops methods and enable ↵Finn Thain
CONFIG_HAVE_ARCH_NVRAM_OPS Atari RTC NVRAM uses a checksum so implement the remaining arch_nvram_ops methods for the set_checksum and initialize ioctls. Enable CONFIG_HAVE_ARCH_NVRAM_OPS. Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Finn Thain <fthain@telegraphics.com.au> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-01-22powerpc: Replace nvram_* extern declarations with standard headerFinn Thain
Remove the nvram_read_byte() and nvram_write_byte() declarations in powerpc/include/asm/nvram.h and use the cross-platform static functions in linux/nvram.h instead. Tested-by: Stan Johnson <userm57@yahoo.com> Signed-off-by: Finn Thain <fthain@telegraphics.com.au> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>