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2010-02-26perf_events, x86: Remove superflous MSR writesPeter Zijlstra
We re-program the event control register every time we reset the count, this appears to be superflous, hence remove it. Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Arjan van de Ven <arjan@linux.intel.com> LKML-Reference: <new-submission> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2010-02-26perf_events: Simplify code by removing cpu argument to hw_perf_group_sched_in()Peter Zijlstra
Since the cpu argument to hw_perf_group_sched_in() is always smp_processor_id(), simplify the code a little by removing this argument and using the current cpu where needed. Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: David Miller <davem@davemloft.net> Cc: Paul Mackerras <paulus@samba.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Frederic Weisbecker <fweisbec@gmail.com> LKML-Reference: <1265890918.5396.3.camel@laptop> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2010-02-26perf_events, x86: AMD event schedulingStephane Eranian
This patch adds correct AMD NorthBridge event scheduling. NB events are events measuring L3 cache, Hypertransport traffic. They are identified by an event code >= 0xe0. They measure events on the Northbride which is shared by all cores on a package. NB events are counted on a shared set of counters. When a NB event is programmed in a counter, the data actually comes from a shared counter. Thus, access to those counters needs to be synchronized. We implement the synchronization such that no two cores can be measuring NB events using the same counters. Thus, we maintain a per-NB allocation table. The available slot is propagated using the event_constraint structure. Signed-off-by: Stephane Eranian <eranian@google.com> Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> LKML-Reference: <4b703957.0702d00a.6bf2.7b7d@mx.google.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2010-02-26perf_events: Add new start/stop PMU callbacksStephane Eranian
In certain situations, the kernel may need to stop and start the same event rapidly. The current PMU callbacks do not distinguish between stop and release (i.e., stop + free the resource). Thus, a counter may be released, then it will be immediately re-acquired. Event scheduling will again take place with no guarantee to assign the same counter. On some processors, this may event yield to failure to assign the event back due to competion between cores. This patch is adding a new pair of callback to stop and restart a counter without actually release the underlying counter resource. On stop, the counter is stopped, its values saved and that's it. On start, the value is reloaded and counter is restarted (on x86, actual restart is delayed until perf_enable()). Signed-off-by: Stephane Eranian <eranian@google.com> [ added fallback to ->enable/->disable for all other PMUs fixed x86_pmu_start() to call x86_pmu.enable() merged __x86_pmu_disable into x86_pmu_stop() ] Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> LKML-Reference: <4b703875.0a04d00a.7896.ffffb824@mx.google.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2010-02-26Merge branch 'tip/tracing/core' of ↵Ingo Molnar
git://git.kernel.org/pub/scm/linux/kernel/git/rostedt/linux-2.6-trace into tracing/core
2010-02-26powerpc: Fix lwsync feature fixup vs. modules on 64-bitBenjamin Herrenschmidt
Anton's commit enabling the use of the lwsync fixup mechanism on 64-bit breaks modules. The lwsync fixup section uses .long instead of the FTR_ENTRY_OFFSET macro used by other fixups sections, and thus will generate 32-bit relocations that our module loader cannot resolve. This changes it to use the same type as other feature sections. Note however that we might want to consider using 32-bit for all the feature fixup offsets and add support for R_PPC_REL32 to module_64.c instead as that would reduce the size of the kernel image. I'll leave that as an exercise for the reader for now... Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-02-26early_res: Add free_early_partial()Yinghai Lu
To free partial areas in pcpu_setup... Reported-by: Peter Zijlstra <peterz@infradead.org> Signed-off-by: Yinghai Lu <yinghai@kernel.org> Cc: Tejun Heo <tj@kernel.org> Cc: Christoph Lameter <cl@linux-foundation.org> Cc: Stephen Rothwell <sfr@canb.auug.org.au> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Jesse Barnes <jbarnes@virtuousgeek.org> Cc: Pekka Enberg <penberg@cs.helsinki.fi> LKML-Reference: <4B85E245.5030001@kernel.org> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2010-02-26sh: remove dead LED code for migo-r and ms7724seMagnus Damm
CONFIG_PM is always set on SH-Mobile these days so get rid of the unused LED setup code. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-02-26sh: ecovec build fix for CONFIG_I2C=nMagnus Damm
Allow building the ecovec board support code even though I2C support is disabled. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-02-26sh: ecovec r-standby supportMagnus Damm
This patch adds board specific r-standby resume code for ecovec. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-02-26sh: ms7724se r-standby supportMagnus Damm
This patch adds board specific r-standby resume code for ms7724se. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-02-26sh: SH-Mobile R-standby register save/restoreMagnus Damm
Add code to save/restore registers during R-standby sleep on SH-Mobile processors. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-02-26Merge commit 'origin/master' into nextBenjamin Herrenschmidt
Manual merge of: drivers/char/hvc_console.c drivers/char/hvc_console.h
2010-02-25x86, olpc: Use pci subarch init for OLPCThomas Gleixner
Replace the #ifdef'ed OLPC-specific init functions by a conditional x86_init function. If the function returns 0 we leave pci_arch_init, otherwise we continue. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Jesse Barnes <jbarnes@virtuousgeek.org> Cc: Andres Salomon <dilinger@collabora.co.uk> LKML-Reference: <43F901BD926A4E43B106BF17856F0755A318CE89@orsmsx508.amr.corp.intel.com> Signed-off-by: Jacob Pan <jacob.jun.pan@intel.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2010-02-25x86, pci: Add arch_init to x86_init abstractionThomas Gleixner
Added an abstraction function for arch specific init calls. Signed-off-by: Jacob Pan <jacob.jun.pan@intel.com> Cc: Jesse Barnes <jbarnes@virtuousgeek.org> LKML-Reference: <43F901BD926A4E43B106BF17856F0755A318CE84@orsmsx508.amr.corp.intel.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2010-02-25x86, mrst: Add Kconfig dependencies for MoorestownJacob Pan
The Moorestown platform requires IOAPIC for all interrupts from the south complex, since there is no legacy PIC. Furthermore, Moorestown I/O requires PCI. Moorestown PCI depends on PCI MMCONFIG and DIRECT method to perform device enumeration, as there is no PCI BIOS. [ hpa: rewrote commit message ] Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com> LKML-Reference: <1267120934-9505-1-git-send-email-jacob.jun.pan@linux.intel.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2010-02-25Merge branch 'next-devicetree' of git://git.secretlab.ca/git/linux-2.6Linus Torvalds
* 'next-devicetree' of git://git.secretlab.ca/git/linux-2.6: (41 commits) of: remove undefined request_OF_resource & release_OF_resource of/sparc: Remove sparc-local declaration of allnodes and devtree_lock of: move definition of of_chosen into common code. of: remove unused extern reference to devtree_lock of: put default string compare and #a/s-cell values into common header of/flattree: Don't assume HAVE_LMB of: protect linux/of.h with CONFIG_OF proc_devtree: fix THIS_MODULE without module.h of: Remove old and misplaced function declarations of/flattree: Make the kernel accept ePAPR style phandle information of/flattree: endian-convert members of boot_param_header of: assume big-endian properties, adding conversions where necessary of: use __be32 for cell value accessors of/flattree: use OF_ROOT_NODE_{SIZE,ADDR}_CELLS DEFAULT for fdt parsing of/flattree: use callback to setup initrd from /chosen proc_devtree: include linux/of.h of: make set_node_proc_entry private to proc_devtree.c of: include linux/proc_fs.h of/flattree: merge early_init_dt_scan_memory() common code of: add 'of_' prefix to machine_is_compatible() ...
2010-02-25[IA64] build arch/ia64/kernel/acpi-ext.o when CONFIG_ACPIAlex Chiang
Simplify the makefile slightly by always building acpi-ext.o when CONFIG_ACPI is turned on. Yes, this adds a little bloat to the other configs, but not much: text data bss dec hex filename 839 41 0 880 370 arch/ia64/kernel/acpi-ext.o Before: text data bss dec hex filename 10952753 1299212 1334241 13586206 cf4f1e vmlinux After: text data bss dec hex filename 10953739 1299084 1334241 13587064 cf5278 vmlinux (gdb) p 13587064 - 13586206 $2 = 858 Seems like a small price to pay for the benefit of not having to think so hard about the multitude of ia64 configs when reading code/Makefiles. Signed-off-by: Alex Chiang <achiang@hp.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
2010-02-25x86, mm: Unify kernel_physical_mapping_init() APIPekka Enberg
This patch changes the 32-bit version of kernel_physical_mapping_init() to return the last mapped address like the 64-bit one so that we can unify the call-site in init_memory_mapping(). Cc: Yinghai Lu <yinghai@kernel.org> Cc: KAMEZAWA Hiroyuki <kamezawa.hiroyu@jp.fujitsu.com> Signed-off-by: Pekka Enberg <penberg@cs.helsinki.fi> LKML-Reference: <alpine.DEB.2.00.1002241703570.1180@melkki.cs.helsinki.fi> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2010-02-25[IA64] Only build arch/ia64/kernel/acpi.o when CONFIG_ACPIAlex Chiang
The following commit broke the ia64 sim_defconfig build: 3b2b84c0b81108a9a869a88bf2beeb5a95d81dd1 ACPI: processor: driver doesn't need to evaluate _PDC This is because it added: +#include <acpi/processor.h> To arch/ia64/kernel/acpi.c. Unfortunately, the ia64_simdefconfig does not turn on CONFIG_ACPI, and we get build errors. The fix described in $subject seems to be the most sensible way to untangle the mess. The other issue is that acpi_get_sysname() is required for all configs, most of which define CONFIG_ACPI, but are not CONFIG_IA64_GENERIC. Turn it into an inline to cover the "non generic" ia64 configs; to prevent a duplicate definition build error, we need to wrap the definition in acpi.o inside an #ifdef. Finally, move the pm_idle and pm_power_off exports into process.c (which is always built), similar to other architectures, and allow the sim defconfig to link. Signed-off-by: Alex Chiang <achiang@hp.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
2010-02-25AM3517 EVM: correct typo - tca6416 mispelt as tca6516Sriram
Correct instances where tca6416 is misspelt as tca6516 in the board-am3517evm file. Signed-off-by: Sriramakrishnan <srk@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-02-25AM3517 EVM: Enable I2C supportSriram
There are multiple devices connected to I2C bus on AM3517EVM (for instance audio codec, IO expander etc). Enable I2C support in the default kernel configuration for AM3517 EVM. Signed-off-by: Sriramakrishnan <srk@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-02-25AM35x: Enable OMAP_MUX in defconfigAjay Kumar Gupta
Enabling OMAP_MUX in defconfig as it is required for EHCI to work. Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-02-25AM35x: Add missing GPIO mux config for EHCI portAjay Kumar Gupta
Adding GPIO mux config used for PHY reset of EHCI port on base board. We get below failure message without this patch, "hub 1-0:1.0: unable to enumerate USB device on port 1" Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-02-25Zoom3: Defconfig updatemanjugk manjugk
Some of the features are not enabled by default in zoom3 defconfig. This patch enables: - MMC Resume - TWL4030 RTC driver - Debug File system Build and boot tested on Zoom3 board. Signed-off-by: Manjunatha GK <manjugk@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-02-25omap: i2c: Fix muxing for command line enabled busJarkko Nikula
The commit b63128e81214cc2db2995d690438055c26d213a5 broke the pin muxing for I2C busses that are enabled from the kernel command line. Fix this by defining the board registration function omap_register_i2c_bus in common platform code as it was before but keep the muxing in architecture dependent files. Signed-off-by: Jarkko Nikula <jhnikula@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-02-25x86, pci: Exclude Moorestown PCI code if CONFIG_X86_MRST=nYinghai Lu
If we don't have any Moorestown CPU support compiled in, we don't need the Moorestown PCI support either. Signed-off-by: Yinghai Lu <yinghai@kernel.org> LKML-Reference: <4B858E89.7040807@kernel.org> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2010-02-25Merge branches 'clks' and 'pnx' into develRussell King
2010-02-25Merge branch 'misc2' into develRussell King
2010-02-25Merge branch 'perf' into develRussell King
Conflicts: arch/arm/Kconfig
2010-02-25Merge branch 'tmpreg' into develRussell King
Conflicts: arch/arm/Kconfig arch/arm/mach-ux500/include/mach/debug-macro.S
2010-02-25Merge branches 'at91', 'cache', 'cup', 'ep93xx', 'ixp4xx', 'nuc', ↵Russell King
'pending-dma-streaming', 'u300' and 'umc' into devel
2010-02-25ARM: Eliminate decompressor -Dstatic= PIC hackRussell King
We used to build decompressors with -Dstatic= to avoid any local data being generated. The problem is that local data generates GOTOFF relocations, which means we can't relocate the data relative to the text segment. Global data, on the other hand, goes through the GOT, and can be relocated anywhere. Unfortunately, with the new decompressors, this presents a problem since they declare static data within functions, and this leads to stack overflow. Fix this by separating out the decompressor code into a separate file, and removing 'static' from BSS data in misc.c. Also, discard the .data section - this means that should we end up with read/write initialized data, the decompressor will fail to link and the problem will be obvious. Acked-by: Nicolas Pitre <nico@fluxnic.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-02-25x86, numaq: Make CONFIG_X86_NUMAQ depend on CONFIG_PCIPan, Jacob jun
The NUMAQ initialization sets x86_init.pci.init to pci_numaq_init, which obviously isn't defined if CONFIG_PCI isn't defined. This dependency was implicit in the past, because pci_numaq_init was invoked from arch/x86/pci/legacy.c, which itself was conditioned on CONFIG_PCI. I suspect that no NUMA-Q machines without PCI were ever built, so instead of complicating the code by adding #ifdefs or stub functions, just disable this bit of the configuration space. [ hpa: rewrote the checkin comment ] Signed-off-by: Jacob Pan <jacob.jun.pan@intel.com> LKML-Reference: <43F901BD926A4E43B106BF17856F0755A321EE1F@orsmsx508.amr.corp.intel.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2010-02-25kprobes/x86: Support kprobes jump optimization on x86Masami Hiramatsu
Introduce x86 arch-specific optimization code, which supports both of x86-32 and x86-64. This code also supports safety checking, which decodes whole of a function in which probe is inserted, and checks following conditions before optimization: - The optimized instructions which will be replaced by a jump instruction don't straddle the function boundary. - There is no indirect jump instruction, because it will jumps into the address range which is replaced by jump operand. - There is no jump/loop instruction which jumps into the address range which is replaced by jump operand. - Don't optimize kprobes if it is in functions into which fixup code will jumps. This uses text_poke_multibyte() which doesn't support modifying code on NMI/MCE handler. However, since kprobes itself doesn't support NMI/MCE code probing, it's not a problem. Changes in v9: - Use *_text_reserved() for checking the probe can be optimized. - Verify jump address range is in 2G range when preparing slot. - Backup original code when switching optimized buffer, instead of preparing buffer, because there can be int3 of other probes in preparing phase. - Check kprobe is disabled in arch_check_optimized_kprobe(). - Strictly check indirect jump opcodes (ff /4, ff /5). Changes in v6: - Split stop_machine-based jump patching code. - Update comments and coding style. Changes in v5: - Introduce stop_machine-based jump replacing. Signed-off-by: Masami Hiramatsu <mhiramat@redhat.com> Cc: systemtap <systemtap@sources.redhat.com> Cc: DLE <dle-develop@lists.sourceforge.net> Cc: Ananth N Mavinakayanahalli <ananth@in.ibm.com> Cc: Jim Keniston <jkenisto@us.ibm.com> Cc: Srikar Dronamraju <srikar@linux.vnet.ibm.com> Cc: Christoph Hellwig <hch@infradead.org> Cc: Steven Rostedt <rostedt@goodmis.org> Cc: Frederic Weisbecker <fweisbec@gmail.com> Cc: Anders Kaseorg <andersk@ksplice.com> Cc: Tim Abbott <tabbott@ksplice.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: Jason Baron <jbaron@redhat.com> Cc: Mathieu Desnoyers <compudj@krystal.dyndns.org> Cc: Frederic Weisbecker <fweisbec@gmail.com> Cc: Ananth N Mavinakayanahalli <ananth@in.ibm.com> LKML-Reference: <20100225133446.6725.78994.stgit@localhost6.localdomain6> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2010-02-25x86: Add text_poke_smp for SMP cross modifying codeMasami Hiramatsu
Add generic text_poke_smp for SMP which uses stop_machine() to synchronize modifying code. This stop_machine() method is officially described at "7.1.3 Handling Self- and Cross-Modifying Code" on the intel's software developer's manual 3A. Since stop_machine() can't protect code against NMI/MCE, this function can not modify those handlers. And also, this function is basically for modifying multibyte-single-instruction. For modifying multibyte-multi-instructions, we need another special trap & detour code. This code originaly comes from immediate values with stop_machine() version. Thanks Jason and Mathieu! Signed-off-by: Masami Hiramatsu <mhiramat@redhat.com> Cc: systemtap <systemtap@sources.redhat.com> Cc: DLE <dle-develop@lists.sourceforge.net> Cc: Mathieu Desnoyers <compudj@krystal.dyndns.org> Cc: Ananth N Mavinakayanahalli <ananth@in.ibm.com> Cc: Jim Keniston <jkenisto@us.ibm.com> Cc: Srikar Dronamraju <srikar@linux.vnet.ibm.com> Cc: Christoph Hellwig <hch@infradead.org> Cc: Steven Rostedt <rostedt@goodmis.org> Cc: Frederic Weisbecker <fweisbec@gmail.com> Cc: Anders Kaseorg <andersk@ksplice.com> Cc: Tim Abbott <tabbott@ksplice.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: Jason Baron <jbaron@redhat.com> Cc: Frederic Weisbecker <fweisbec@gmail.com> Cc: Ananth N Mavinakayanahalli <ananth@in.ibm.com> LKML-Reference: <20100225133438.6725.80273.stgit@localhost6.localdomain6> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2010-02-25kprobes/x86: Cleanup save/restore registersMasami Hiramatsu
Introduce SAVE/RESOTRE_REGS_STRING for cleanup kretprobe-trampoline asm code. These macros will be used for emulating interruption. Signed-off-by: Masami Hiramatsu <mhiramat@redhat.com> Cc: systemtap <systemtap@sources.redhat.com> Cc: DLE <dle-develop@lists.sourceforge.net> Cc: Ananth N Mavinakayanahalli <ananth@in.ibm.com> Cc: Jim Keniston <jkenisto@us.ibm.com> Cc: Srikar Dronamraju <srikar@linux.vnet.ibm.com> Cc: Christoph Hellwig <hch@infradead.org> Cc: Steven Rostedt <rostedt@goodmis.org> Cc: Frederic Weisbecker <fweisbec@gmail.com> Cc: Anders Kaseorg <andersk@ksplice.com> Cc: Tim Abbott <tabbott@ksplice.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: Jason Baron <jbaron@redhat.com> Cc: Mathieu Desnoyers <compudj@krystal.dyndns.org> Cc: Frederic Weisbecker <fweisbec@gmail.com> Cc: Ananth N Mavinakayanahalli <ananth@in.ibm.com> LKML-Reference: <20100225133430.6725.83342.stgit@localhost6.localdomain6> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2010-02-25kprobes/x86: Boost probes when reenteringMasami Hiramatsu
Integrate prepare_singlestep() into setup_singlestep() to boost up reenter probes, if possible. Signed-off-by: Masami Hiramatsu <mhiramat@redhat.com> Cc: systemtap <systemtap@sources.redhat.com> Cc: DLE <dle-develop@lists.sourceforge.net> Cc: Ananth N Mavinakayanahalli <ananth@in.ibm.com> Cc: Jim Keniston <jkenisto@us.ibm.com> Cc: Srikar Dronamraju <srikar@linux.vnet.ibm.com> Cc: Christoph Hellwig <hch@infradead.org> Cc: Steven Rostedt <rostedt@goodmis.org> Cc: Frederic Weisbecker <fweisbec@gmail.com> Cc: Anders Kaseorg <andersk@ksplice.com> Cc: Tim Abbott <tabbott@ksplice.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: Jason Baron <jbaron@redhat.com> Cc: Mathieu Desnoyers <compudj@krystal.dyndns.org> Cc: Frederic Weisbecker <fweisbec@gmail.com> Cc: Ananth N Mavinakayanahalli <ananth@in.ibm.com> LKML-Reference: <20100225133423.6725.12071.stgit@localhost6.localdomain6> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2010-02-25kprobes: Introduce kprobes jump optimizationMasami Hiramatsu
Introduce kprobes jump optimization arch-independent parts. Kprobes uses breakpoint instruction for interrupting execution flow, on some architectures, it can be replaced by a jump instruction and interruption emulation code. This gains kprobs' performance drastically. To enable this feature, set CONFIG_OPTPROBES=y (default y if the arch supports OPTPROBE). Changes in v9: - Fix a bug to optimize probe when enabling. - Check nearby probes can be optimize/unoptimize when disarming/arming kprobes, instead of registering/unregistering. This will help kprobe-tracer because most of probes on it are usually disabled. Changes in v6: - Cleanup coding style for readability. - Add comments around get/put_online_cpus(). Changes in v5: - Use get_online_cpus()/put_online_cpus() for avoiding text_mutex deadlock. Signed-off-by: Masami Hiramatsu <mhiramat@redhat.com> Cc: systemtap <systemtap@sources.redhat.com> Cc: DLE <dle-develop@lists.sourceforge.net> Cc: Ananth N Mavinakayanahalli <ananth@in.ibm.com> Cc: Jim Keniston <jkenisto@us.ibm.com> Cc: Srikar Dronamraju <srikar@linux.vnet.ibm.com> Cc: Christoph Hellwig <hch@infradead.org> Cc: Steven Rostedt <rostedt@goodmis.org> Cc: Frederic Weisbecker <fweisbec@gmail.com> Cc: Anders Kaseorg <andersk@ksplice.com> Cc: Tim Abbott <tabbott@ksplice.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: Jason Baron <jbaron@redhat.com> Cc: Mathieu Desnoyers <compudj@krystal.dyndns.org> Cc: Frederic Weisbecker <fweisbec@gmail.com> Cc: Ananth N Mavinakayanahalli <ananth@in.ibm.com> LKML-Reference: <20100225133407.6725.81992.stgit@localhost6.localdomain6> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2010-02-25kprobes/x86: Cleanup RELATIVEJUMP_INSTRUCTION to RELATIVEJUMP_OPCODEMasami Hiramatsu
Change RELATIVEJUMP_INSTRUCTION macro to RELATIVEJUMP_OPCODE since it represents just the opcode byte. Signed-off-by: Masami Hiramatsu <mhiramat@redhat.com> Acked-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com> Cc: systemtap <systemtap@sources.redhat.com> Cc: DLE <dle-develop@lists.sourceforge.net> Cc: Ananth N Mavinakayanahalli <ananth@in.ibm.com> Cc: Jim Keniston <jkenisto@us.ibm.com> Cc: Srikar Dronamraju <srikar@linux.vnet.ibm.com> Cc: Christoph Hellwig <hch@infradead.org> Cc: Steven Rostedt <rostedt@goodmis.org> Cc: Frederic Weisbecker <fweisbec@gmail.com> Cc: Anders Kaseorg <andersk@ksplice.com> Cc: Tim Abbott <tabbott@ksplice.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: Jason Baron <jbaron@redhat.com> Cc: Mathieu Desnoyers <compudj@krystal.dyndns.org> Cc: Frederic Weisbecker <fweisbec@gmail.com> Cc: Ananth N Mavinakayanahalli <ananth@in.ibm.com> LKML-Reference: <20100225133349.6725.99302.stgit@localhost6.localdomain6> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2010-02-25x86/PCI: Prevent mmconfig memory corruptionThomas Gleixner
commit ff097ddd4 (x86/PCI: MMCONFIG: manage pci_mmcfg_region as a list, not a table) introduced a nasty memory corruption when pci_mmcfg_list is empty. pci_mmcfg_check_end_bus_number() dereferences pci_mmcfg_list.prev even when the list is empty. The following write hits some variable near to pci_mmcfg_list. Further down a similar problem exists, where cfg->list.next is dereferenced unconditionally and a comparison with some variable near to pci_mmcfg_list happens. Add a check for the last element into the for_each_entry() loop and remove all the other crappy logic which is just a leftover of the old array based code which was replaced by the list conversion. Reported-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Bjorn Helgaas <bjorn.helgaas@hp.com> Cc: Yinghai Lu <yinghai@kernel.org> Cc: stable@kernel.org Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2010-02-25OMAP: DSS2: DSI: add dsi_vc_dcs_read_2() helperTomi Valkeinen
Add dsi_vc_dcs_read_2() helper function to read two bytes from the DSI peripheral. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@nokia.com>
2010-02-25ftrace: Remove memory barriers from NMI code when not neededSteven Rostedt
The code in stop_machine that modifies the kernel text has a bit of logic to handle the case of NMIs. stop_machine does not prevent NMIs from executing, and if an NMI were to trigger on another CPU as the modifying CPU is changing the NMI text, a GPF could result. To prevent the GPF, the NMI calls ftrace_nmi_enter() which may modify the code first, then any other NMIs will just change the text to the same content which will do no harm. The code that stop_machine called must wait for NMIs to finish while it changes each location in the kernel. That code may also change the text to what the NMI changed it to. The key is that the text will never change content while another CPU is executing it. To make the above work, the call to ftrace_nmi_enter() must also do a smp_mb() as well as atomic_inc(). But for applications like perf that require a high number of NMIs for profiling, this can have a dramatic effect on the system. Not only is it doing a full memory barrier on both nmi_enter() as well as nmi_exit() it is also modifying a global variable with an atomic operation. This kills performance on large SMP machines. Since the memory barriers are only needed when ftrace is in the process of modifying the text (which is seldom), this patch adds a "modifying_code" variable that gets set before stop machine is executed and cleared afterwards. The NMIs will check this variable and store it in a per CPU "save_modifying_code" variable that it will use to check if it needs to do the memory barriers and atomic dec on NMI exit. Acked-by: Peter Zijlstra <peterz@infradead.org> Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
2010-02-25x86, mm: Allow highmem user page tables to be disabled at boot timeIan Campbell
Distros generally (I looked at Debian, RHEL5 and SLES11) seem to enable CONFIG_HIGHPTE for any x86 configuration which has highmem enabled. This means that the overhead applies even to machines which have a fairly modest amount of high memory and which therefore do not really benefit from allocating PTEs in high memory but still pay the price of the additional mapping operations. Running kernbench on a 4G box I found that with CONFIG_HIGHPTE=y but no actual highptes being allocated there was a reduction in system time used from 59.737s to 55.9s. With CONFIG_HIGHPTE=y and highmem PTEs being allocated: Average Optimal load -j 4 Run (std deviation): Elapsed Time 175.396 (0.238914) User Time 515.983 (5.85019) System Time 59.737 (1.26727) Percent CPU 263.8 (71.6796) Context Switches 39989.7 (4672.64) Sleeps 42617.7 (246.307) With CONFIG_HIGHPTE=y but with no highmem PTEs being allocated: Average Optimal load -j 4 Run (std deviation): Elapsed Time 174.278 (0.831968) User Time 515.659 (6.07012) System Time 55.9 (1.07799) Percent CPU 263.8 (71.266) Context Switches 39929.6 (4485.13) Sleeps 42583.7 (373.039) This patch allows the user to control the allocation of PTEs in highmem from the command line ("userpte=nohigh") but retains the status-quo as the default. It is possible that some simple heuristic could be developed which allows auto-tuning of this option however I don't have a sufficiently large machine available to me to perform any particularly meaningful experiments. We could probably handwave up an argument for a threshold at 16G of total RAM. Assuming 768M of lowmem we have 196608 potential lowmem PTE pages. Each page can map 2M of RAM in a PAE-enabled configuration, meaning a maximum of 384G of RAM could potentially be mapped using lowmem PTEs. Even allowing generous factor of 10 to account for other required lowmem allocations, generous slop to account for page sharing (which reduces the total amount of RAM mappable by a given number of PT pages) and other innacuracies in the estimations it would seem that even a 32G machine would not have a particularly pressing need for highmem PTEs. I think 32G could be considered to be at the upper bound of what might be sensible on a 32 bit machine (although I think in practice 64G is still supported). It's seems questionable if HIGHPTE is even a win for any amount of RAM you would sensibly run a 32 bit kernel on rather than going 64 bit. Signed-off-by: Ian Campbell <ian.campbell@citrix.com> LKML-Reference: <1266403090-20162-1-git-send-email-ian.campbell@citrix.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2010-02-25x86: Do not reserve brk for DMI if it's not going to be usedThadeu Lima de Souza Cascardo
This will save 64K bytes from memory when loading linux if DMI is disabled, which is good for embedded systems. Signed-off-by: Thadeu Lima de Souza Cascardo <cascardo@holoscopio.com> LKML-Reference: <1265758732-19320-1-git-send-email-cascardo@holoscopio.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2010-02-25sh: ms7724: modify scan_timing for KEYSCKuninori Morimoto
KEYSC::SCN register of SH7724 is 3bit. Thus, scan_timing should be 0 - 7 here. Signed-off-by: Kuninori Morimoto <morimoto.kuninori@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-02-25sh: ms7724: Add sh_sir supportKuninori Morimoto
Signed-off-by: Kuninori Morimoto <morimoto.kuninori@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-02-25sh: mach-ecovec24: Add sh_sir supportKuninori Morimoto
Signed-off-by: Kuninori Morimoto <morimoto.kuninori@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-02-24Merge branch 'for_2.6.34_b' of git://git.pwsan.com/linux-2.6 into omap-for-linusTony Lindgren
2010-02-24OMAP4: clock: Remove clock hacks from timer-gp.cSantosh Shilimkar
Now the omap4 clock framework is in mainline and clk_get_rate() is functional. Hence reomve the hardcoded clock hacks. This patch also fixes Division by zero in kernel. Backtrace: [<c0025fb8>] (dump_backtrace+0x0/0x110) from [<c017febc>] (dump_stack+0x18/0x1c) r7:60000093 r6:c0641050 r5:c0223e78 r4:c02126b4 [<c017fea4>] (dump_stack+0x0/0x1c) from [<c00260fc>] (__div0+0x18/0x20) [<c00260e4>] (__div0+0x0/0x20) from [<c01431fc>] (Ldiv0+0x8/0x10) [<c00318d4>] (omap_dm_timer_stop+0x0/0xb0) from [<c002c148>] (omap2_gp_timer_set_mode+0x1c/0x68) r5:c0223e78 r4:00000000 [<c002c12c>] (omap2_gp_timer_set_mode+0x0/0x68) from [<c0063270>] (clockevents_set_mode+0x30/0x64) r5:c020cae0 r4:00000000 [<c0063240>] (clockevents_set_mode+0x0/0x64) from [<c00632fc>] (clockevents_exchange_device+0x30/0x9c) r5:c020cae0 r4:c02146e0 [<c00632cc>] (clockevents_exchange_device+0x0/0x9c) from [<c00636e0>] (tick_notify+0x17c/0x404) r7:00000000 r6:c0641050 r5:00000000 r4:c020cae0 [<c0063564>] (tick_notify+0x0/0x404) from [<c005d5fc>] (notifier_call_chain+0x34/0x78) [<c005d5c8>] (notifier_call_chain+0x0/0x78) from [<c005d684>] (__raw_notifier_call_chain+0x1c/0x24) [<c005d668>] (__raw_notifier_call_chain+0x0/0x24) from [<c005d6ac>] (raw_notifier_call_chain+0x20/0x28) [<c005d68c>] (raw_notifier_call_chain+0x0/0x28) from [<c0062e78>] (clockevents_do_notify+0x1c/0x24) [<c0062e5c>] (clockevents_do_notify+0x0/0x24) from [<c0062f18>] (clockevents_register_device+0x98/0xd0) [<c0062e80>] (clockevents_register_device+0x0/0xd0) from [<c001a194>] (percpu_timer_setup+0x80/0x9c) r7:00000000 r6:00000002 r5:00000002 r4:00000003 [<c001a114>] (percpu_timer_setup+0x0/0x9c) from [<c000e9f0>] (smp_prepare_cpus+0xb0/0xe8) [<c000e940>] (smp_prepare_cpus+0x0/0xe8) from [<c00084e8>] (kernel_init+0x5c/0x1fc) r7:00000000 r6:00000000 r5:00000000 r4:c001b8a4 [<c000848c>] (kernel_init+0x0/0x1fc) from [<c0046c50>] (do_exit+0x0/0x604) r7:00000000 r6:00000000 r5:00000000 r4:00000000 Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>