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2017-08-15powerpc/8xx: Ensures RAM mapped with LTLB is seen as block mapped on 8xx.Christophe Leroy
On the 8xx, the RAM mapped with LTLBs must be seen as block mapped, just like areas mapped with BATs on standard PPC32. Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2017-08-15ARM: OMAP2+: Register SoC device attributes from machine .init()Laurent Pinchart
SoC device attributes are registered with a call to soc_device_register() from the machine .init_late() operation, which is called from the late initcall, after all drivers built-in drivers have been probed. This results in the impossibility for drivers to use SoC device matching in their probe function. The omap_soc_device_init() function is safe to call from the machine .init() operation, as all data it depends on is initialized from the .init_early() operation. Move SoC device attribute registration to machine .init() like on all other ARM platforms. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2017-08-15powerpc/chrp: Store the intended structureJulia Lawall
Normally the values in the resource field and the argument to ARRAY_SIZE in the num_resources are the same. In this case, the value in the reousrce field is the same as the one in the previous platform_device structure, and appears to be a copy-paste error. Replace the value in the resource field with the argument to the local call to ARRAY_SIZE. Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2017-08-15powerpc/l2cr_6xx: Fix invalid use of register expressionsAndreas Schwab
This fixes another invalid use of register expressions. Signed-off-by: Andreas Schwab <schwab@linux-m68k.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2017-08-15x86/mtrr: Prevent CPU hotplug lock recursionThomas Gleixner
Larry reported a CPU hotplug lock recursion in the MTRR code. ============================================ WARNING: possible recursive locking detected systemd-udevd/153 is trying to acquire lock: (cpu_hotplug_lock.rw_sem){.+.+.+}, at: [<c030fc26>] stop_machine+0x16/0x30 but task is already holding lock: (cpu_hotplug_lock.rw_sem){.+.+.+}, at: [<c0234353>] mtrr_add_page+0x83/0x470 .... cpus_read_lock+0x48/0x90 stop_machine+0x16/0x30 mtrr_add_page+0x18b/0x470 mtrr_add+0x3e/0x70 mtrr_add_page() holds the hotplug rwsem already and calls stop_machine() which acquires it again. Call stop_machine_cpuslocked() instead. Reported-and-tested-by: Larry Finger <Larry.Finger@lwfinger.net> Reported-by: Dmitry Vyukov <dvyukov@google.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: http://lkml.kernel.org/r/alpine.DEB.2.20.1708140920250.1865@nanos Cc: "Paul E. McKenney" <paulmck@linux.vnet.ibm.com> Cc: Borislav Petkov <bp@suse.de>
2017-08-15powerpc/iommu: Avoid undefined right shift in iommu_range_alloc()Michael Ellerman
In iommu_range_alloc() we generate a mask by right shifting ~0, however if the specified alignment is 0 then we right shift by 64, which is undefined. UBSAN tells us so: UBSAN: Undefined behaviour in ../arch/powerpc/kernel/iommu.c:193:35 shift exponent 64 is too large for 64-bit type 'long unsigned int' We can avoid it by instead generating the mask with: align_mask = (1ull << align_order) - 1; That will also generate an undefined shift if align_order is 64 or greater, but that shouldn't be a problem for a while. Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2017-08-15powerpc/perf/imc: Fix nest events on muti socket systemAnju T
In a multi node system with discontiguous node ids, nest event values are not showing up properly. eg. lscpu output: NUMA node0 CPU(s): 0-15 NUMA node8 CPU(s): 16-31 Nest event values on such systems can be counted on CPUs <= 15: $./perf stat -e 'nest_powerbus0_imc/PM_PB_CYC/' -C 0-14 -I 1000 sleep 1000 # time counts unit events 1.000294577 30,17,24,42,880 nest_powerbus0_imc/PM_PB_CYC/ But not on CPUs >= 16: $./perf stat -e 'nest_powerbus0_imc/PM_PB_CYC/' -C 16-28 -I 1000 sleep 1000 # time counts unit events 1.000049902 <not supported> nest_powerbus0_imc/PM_PB_CYC/ This is because, when fetching the reference count, the node id (which may be sparse) is used as the array index, not the node number (which is 0 based and contiguous). Fix it by using the node number as the array index. $./perf stat -e 'nest_powerbus0_imc/PM_PB_CYC/' -C 16-28 -I 1000 sleep 1000 # time counts unit events 1.000241961 26,12,35,28,704 nest_powerbus0_imc/PM_PB_CYC/ Signed-off-by: Anju T Sudhakar <anju@linux.vnet.ibm.com> [mpe: Change log tweaks for clarity and brevity] Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2017-08-15powerpc/mm/nohash: Move definition of PGALLOC_GFP to fix build errorsMichael Ellerman
In some obscure Book3E configs (randconfig) we can end up missing a definition for PGALLOC_GFP in pgtable_64.c. Fix it by moving the definition to asm/pgalloc.h. Fixes: de3b87611dd1 ("powerpc/mm/book(e)(3s)/64: Add page table accounting") Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2017-08-15x86/xen/64: Fix the reported SS and CS in SYSCALLAndy Lutomirski
When I cleaned up the Xen SYSCALL entries, I inadvertently changed the reported segment registers. Before my patch, regs->ss was __USER(32)_DS and regs->cs was __USER(32)_CS. After the patch, they are FLAT_USER_CS/DS(32). This had a couple unfortunate effects. It confused the opportunistic fast return logic. It also significantly increased the risk of triggering a nasty glibc bug: https://sourceware.org/bugzilla/show_bug.cgi?id=21269 Update the Xen entry code to change it back. Reported-by: Brian Gerst <brgerst@gmail.com> Signed-off-by: Andy Lutomirski <luto@kernel.org> Cc: Andrew Cooper <andrew.cooper3@citrix.com> Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com> Cc: Borislav Petkov <bp@alien8.de> Cc: Juergen Gross <jgross@suse.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: xen-devel@lists.xenproject.org Fixes: 8a9949bc71a7 ("x86/xen/64: Rearrange the SYSCALL entries") Link: http://lkml.kernel.org/r/daba8351ea2764bb30272296ab9ce08a81bd8264.1502775273.git.luto@kernel.org Signed-off-by: Ingo Molnar <mingo@kernel.org>
2017-08-15mfd: tps65010: Move header file out of I2C realmWolfram Sang
include/linux/i2c is not for client devices. Move the header file to a more appropriate location. Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-08-15Backmerge tag 'v4.13-rc5' into drm-nextDave Airlie
Linux 4.13-rc5 There's a really nasty nouveau collision, hopefully someone can take a look once I pushed this out.
2017-08-15powerpc/xmon: Exclude all of xmon from ftraceNaveen N. Rao
Exclude core xmon files from ftrace (along with an xmon xive helper outside of xmon/) to minimize impact of ftrace while within xmon. Before: /sys/kernel/debug/tracing# grep -ci xmon available_filter_functions 26 After: /sys/kernel/debug/tracing# grep -ci xmon available_filter_functions 0 Signed-off-by: Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com> [mpe: Use $(subst ..) on KBUILD_CFLAGS rather than CFLAGS_REMOVE_xxx] Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2017-08-15arm64: allwinner: a64: Add A64-OLinuXino initial supportJagan Teki
OLimex A64-OLinuXino is an open-source hardware board using the Allwinner A64 SOC. OLimex A64-OLinuXino has - A64 Quad-core Cortex-A53 64bit - 1GB or 2GB RAM DDR3L @ 672Mhz - microSD slot and 4/8/16GB eMMC - Debug TTL UART - HDMI - LCD - IR receiver - 5V DC power supply Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2017-08-15arm64: allwinner: a64: Add initial NanoPi A64 supportJagan Teki
NanoPi A64 is a new board of high performance with low cost designed by FriendlyElec., using the Allwinner A64 SOC. Nanopi A64 features - Allwinner A64, 64-bit Quad-core Cortex-A53@648MHz to 1.152GHz, DVFS - 1GB DDR3 RAM - MicroSD - Gigabit Ethernet (RTL8211E) - Wi-Fi 802.11b/g/n - IR receiver - Audio In/Out - Video In/Out - Serial Debug Port - microUSB 5V 2A DC power-supply Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2017-08-14Merge 4.13-rc5 into char-misc-nextGreg Kroah-Hartman
We want the firmware, and other changes, in here as well. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-08-14ARM: dts: rockchip: add spi dt node for rv1108Andy Yan
Add SPI device tree node for rv1108. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-08-14Merge branch 'linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6 Pull crypto fixes from Herbert Xu: "Fix an error path bug in ixp4xx as well as a read overrun in sha1-avx2" * 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: crypto: x86/sha1 - Fix reads beyond the number of blocks passed crypto: ixp4xx - Fix error handling path in 'aead_perform()'
2017-08-14ARM: dts: nokia n900: update dts with camera supportPavel Machek
Add camera support to N900 dts. Also add a note about MMC & debugging. Signed-off-by: Pavel Machek <pavel@ucw.cz> Acked-by: Pali Rohár <pali.rohar@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-08-14ARM: dts: Add support for dra76-evmLokesh Vutla
dra76-evm is a board based on TI's dra76 processor targeting for infotainment systems. Adding support for this platform. dra76-evm and dra7-evm has a similar layout except with few differences. So create a dra7-evm-common.dtsi with similarities on dra76-evm and dra7-evm. Include this common dtsi in both dra7-evm.dts and dra76-evm.dts Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Vignesh R <vigneshr@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-08-14ARM: dts: Add support for dra76x family of devicesLokesh Vutla
dra76 family is a high-performance, infotainment application device, based on OMAP architecture on a 28-nm technology. This contains most of the subsystems, peripherals that are available on dra74, dra72 family. This SoC mainly features Subsystems: - 2 x Cortex-A15 with max speed of 1.8GHz - 2 X DSP - 2 X Cortex-M4 IPU - ISS - CAL - DSS - VPE - VIP Connectivity peripherals: - 1 USB3.0 and 3 USB2.0 subsystems - 2 x SATA - 2 x PCI Express Gen2 - 3-port Gigabit ethernet switch - 2 x CAN - MCAN Adding basic dts support for DRA76 family while reusing the data available in dra7.dtsi, dra74x.dtsi. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-08-14ARM: dts: DRA7: Add pcie1 dt node for EP modeKishon Vijay Abraham I
Add pcie1 dt node in order for the controller to operate in endpoint mode. However since none of the dra7 based boards have slots configured to operate in endpoint mode, keep EP mode disabled. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-08-14ARM: dts: am335x: add support for Moxa UC-8100-ME-T open platformSZ Lin
Add support for Moxa UC-8100-ME-T open platform The UC-8100-ME-T computing platform is designed for embedded data acquisition industrial applications The features of UC-8100-ME-T series are: * eMMC * SPI flash * SD slot * 2x LAN * 2 RS-232/422/485 ports, software-selectable * Mini PCIe form factor with USB signal * USB host * EEPROM * TPM * Watchdog * RTC * User gpio-keys * User LEDs * User button Signed-off-by: SZ Lin <sz.lin@moxa.com> Acked-by: Rob Herring <robh@kernel.org> [tony@atomide.com: fix unit adress as suggested by Rob] Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-08-14ARM: dts: dra7xx: Enable NAND dma prefetch by defaultFranklin S Cooper Jr
Currently the default method of prefetch polled shows the highest possible read and write speed when minimal non NAND background activity is being done. But it is also very CPU intensive to reach these high speeds (CPU load of 99% via mtd performance tests). While DMA prefetch only uses 50% of the CPU to achieve around 23% less in top read and write performance. However, as the non NAND CPU load increases the read and write performance takes a large hit when using polled prefetch. Therefore, prefetch dma mode ends up outperforming prefetch polled in general "system level" test. So switch to using dma prefetch by default since it is likely what most users would prefer. Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com> Acked-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-08-14ARM: dts: am437xx: Enable NAND dma prefetch by defaultFranklin S Cooper Jr
Currently the default method of prefetch polled shows the highest possible read and write speed when minimal non NAND background activity is being done. But it is also very CPU intensive to reach these high speeds (CPU load of 99% via mtd performance tests). While DMA prefetch only uses 50% of the CPU to achieve around 23% less in top read and write performance. However, as the non NAND CPU load increases the read and write performance takes a large hit when using polled prefetch. Therefore, prefetch dma mode ends up outperforming prefetch polled in general "system level" test. So switch to using dma prefetch by default since it is likely what most users would prefer. Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com> Acked-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-08-14ARM: dts: am335x-evm: Enable NAND dma prefetch by defaultFranklin S Cooper Jr
Currently the default method of prefetch polled shows the highest possible read and write speed when minimal non NAND background activity is being done. But it is also very CPU intensive to reach these high speeds (CPU load of 99% via mtd performance tests). While DMA prefetch only uses 50% of the CPU to achieve around 23% less in top read and write performance. However, as the non NAND CPU load increases the read and write performance takes a large hit when using polled prefetch. Therefore, prefetch dma mode ends up outperforming prefetch polled in general "system level" test. So switch to using dma prefetch by default since it is likely what most users would prefer. Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com> Acked-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-08-14ARM: dts: omap4-droid4: Add vibratorSebastian Reichel
Add vibrator to Droid4's device tree. Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-08-14ARM: dts: motorola-cpcap-mapphone: set initial mode for vaudioSebastian Reichel
Set default mode for vaudio, which may be left in standby mode if the system is booted via kexec from Android. Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-08-14ARM: dts: omap3: Remove needless interrupt-parent propertyKarthik Tummala
All nodes inhert "interrupt-parent" property from root node. Removed the aforementioned property from usbhsohci, usbhsehci, ssi_port1, ssi_port2 nodes to avoid duplication. Signed-off-by: Karthik Tummala <karthik@techveda.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-08-14ARM: dts: Disable HDMI CEC internal pull-upsTony Lindgren
Devices using an external encoder, ESD protection and level shifter such as tpd12s015 or ip4791cz12 have the CEC pull in the encoder chip. And on var-som-om44, there is external pull up resistor R30. So the internal CEC pull-up resistor needs to be disabled as otherwise the external and internal pull are parallel making the pull value much smaller than intended. This leads into the CEC not working as reported by Hans Verkuil <hverkuil@xs4all.nl>. Reported-by: Hans Verkuil <hverkuil@xs4all.nl> Cc: Dmitry Lifshitz <lifshitz@compulab.co.il> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-08-14ARM: dts: am437x-gp-evm: Add support for buzzerFaiz Abbas
Add support for onboard gpio buzzer. It works using the gpio-beeper driver. Pinmux entries for GPIO controlling the buzzer are also added. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-08-14ARM: dts: bcm283x: Add 32-bit enable method for SMPStefan Wahren
This patch adds the missing 32-bit enable method for SMP on BCM2836 and BCM2837. The BCM2837 already has an enabled method, but this one only works for 64-bit. Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Tested-by: Eric Anholt <eric@anholt.net>
2017-08-14ARM: omap2plus_defconfig: Enable LP87565Lokesh Vutla
dra76-evm has LP87565. Enable it in omap2plus_defconfig. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-08-14ARM: OMAP: dra7: powerdomain data: Register SoC specific powerdomainsLokesh Vutla
Custom efuse powerdomain is always on in dra72 ES2.0 and dra76 SoCs. So register it as aon for these SoCs. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-08-14ARM: dra762: Enable SMP for dra762Lokesh Vutla
smp specific routines are called based on soc_is_*() api in omap-smc.c. Add soc_is_dra76x() to the condition so that smp specific routines are called for dra76 SoC. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-08-14ARM: dra7: hwmod: Register dra76x specific hwmodLokesh Vutla
Certain IPs are available on dra76 which are not present either in dra74 or dra72. So add provision to register dra76 specific IPs separately. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-08-14ARM: dra762: Add support for device identificationLokesh Vutla
Add ID code detection for dra762 SoC. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-08-14ARM: OMAP2+: board-generic: add support for dra762 familyLokesh Vutla
Adding board generic support for dra762 family. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-08-14ARM: align .data sectionRussell King
Robert Jarzmik reports that his PXA25x system fails to boot with 4.12, failing at __flush_whole_cache in arch/arm/mm/proc-xscale.S:215: 0xc0019e20 <+0>: ldr r1, [pc, #788] 0xc0019e24 <+4>: ldr r0, [r1] <== here with r1 containing 0xc06f82cd, which is the address of "clean_addr". Examination of the System.map shows: c06f22c8 D user_pmd_table c06f22cc d __warned.19178 c06f22cd d clean_addr indicating that a .data.unlikely section has appeared just before the .data section from proc-xscale.S. According to objdump -h, it appears that our assembly files default their .data alignment to 2**0, which is bad news if the preceding .data section size is not power-of-2 aligned at link time. Add the appropriate .align directives to all assembly files in arch/arm that are missing them where we require an appropriate alignment. Reported-by: Robert Jarzmik <robert.jarzmik@free.fr> Tested-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2017-08-14arm: dts: mt7623: cleanup binding fileRyder Lee
Dummy patch to sort nodes alphabetically and add some blank lines for consistency. Signed-off-by: Ryder Lee <ryder.lee@mediatek.com> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2017-08-14arm: dts: mt7623: Add SD-card and EMMC to bananapi-r2Sean Wang
The bananapi-r2 board has an SD-card controller and built-in EMMC storage so enables those devices in the devicetree. Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2017-08-14arm64: defconfig: enable DMA driver for hi3660Wang Ruyi
enable DMA driver for hi3660. Signed-off-by: Wang Ruyi <wangruyi@huawei.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2017-08-14arm64: defconfig: enable OP-TEEVictor Chong
This patch enables configs for Trusted Execution Environment (TEE) and OP-TEE. +CONFIG_TEE=y +CONFIG_OPTEE=y Signed-off-by: Victor Chong <victor.chong@linaro.org> Signed-off-by: Guodong Xu <guodong.xu@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2017-08-14arm64: defconfig: enable support for serial port connected deviceGuodong Xu
This patch enables these configs: +CONFIG_SERIAL_DEV_BUS=y +CONFIG_SERIAL_DEV_CTRL_TTYPORT=y As example, a bluetooth device connected to UART port can be supported by this. Signed-off-by: Guodong Xu <guodong.xu@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2017-08-14arm64: defconfig: enable CONFIG_SYSCON_REBOOT_MODEGuodong Xu
Enable CONFIG_SYSCON_REBOOT_MODE Signed-off-by: Guodong Xu <guodong.xu@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2017-08-14arm64: defconfig: enable support hi6421v530 PMICGuodong Xu
Enable configs for hi6421v530 mfd and regulator driver + CONFIG_MFD_HI6421_PMIC=y + CONFIG_REGULATOR_HI6421V530=y Signed-off-by: Guodong Xu <guodong.xu@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2017-08-14arm64: defconfig: enable Kirin PCIeXiaowei Song
Enable HiSilicon Kirin series SoCs PCIe controllers Signed-off-by: Guodong Xu <guodong.xu@linaro.org> Signed-off-by: Xiaowei Song <songxiaowei@hisilicon.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2017-08-14arm64: defconfig: enable SCSI_HISI_SAS_PCIJohn Garry
Enable HiSilicon SAS controller based on PCI device, which is included in hip08 SoC. Signed-off-by: John Garry <john.garry@huawei.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2017-08-14ARM64: dts: marvell: enable USB host on Armada-8040-DBGrzegorz Jaszczyk
Enable USB host on Armada-8040-DB by adding USB PHY nodes for the following ports: - host 0 and 1 of CPM - host 0 of CPS These PHY are enabled by lanes coming from regulators based on two I2C expanders. Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com> Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-08-14ARM64: dts: marvell: enable USB host on Armada-7040-DBHanna Hawa
Add I2C expander and USB host PHY (host 0 and host 1) to enable USB VBUS on USB ports of type A on Armada-7040-DB. Signed-off-by: Hanna Hawa <hannah@marvell.com> Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-08-14ARM64: dts: marvell: add NAND support on the CP110Gregory CLEMENT
The NAND controller used in A7K/A8K is present on the CP110. It is compatible with the pxa-nand driver. However, due to the limiation of the pins available this controller is only usable on the CPM for A7K and on the CPS for A8K. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
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