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2017-01-30perf/x86/events: Add an AMD-specific MakefileBorislav Petkov
Move the AMD pieces from the generic Makefile so that $ make arch/x86/events/amd/<file>.s can work too. Otherwise you get: $ make arch/x86/events/amd/ibs.s scripts/Makefile.build:44: arch/x86/events/amd/Makefile: No such file or directory make[1]: *** No rule to make target 'arch/x86/events/amd/Makefile'. Stop. Makefile:1636: recipe for target 'arch/x86/events/amd/ibs.s' failed make: *** [arch/x86/events/amd/ibs.s] Error 2 Signed-off-by: Borislav Petkov <bp@suse.de> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Stephane Eranian <eranian@google.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Vince Weaver <vincent.weaver@maine.edu> Link: http://lkml.kernel.org/r/20170126080819.417-1-bp@alien8.de Signed-off-by: Ingo Molnar <mingo@kernel.org>
2017-01-30perf/x86/amd/uncore: Update sysfs attributes for Family17h processorsJanakarajan Natarajan
This patch updates the sysfs attributes for AMD Family17h processors. In Family17h, the event bit position is changed for both the NorthBridge and Last level cache counters. The sysfs attributes are assigned based on the family and the type of the counter. Signed-off-by: Janakarajan Natarajan <Janakarajan.Natarajan@amd.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Arnaldo Carvalho de Melo <acme@kernel.org> Cc: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Stephane Eranian <eranian@google.com> Cc: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Vince Weaver <vincent.weaver@maine.edu> Link: http://lkml.kernel.org/r/617570ed3634e804991f95db62c3cf3856a9d2a7.1484598705.git.Janakarajan.Natarajan@amd.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
2017-01-30perf/x86/amd/uncore: Update the number of uncore countersJanakarajan Natarajan
This patch updates the AMD uncore driver to support AMD Family17h processors. In Family17h, there are two extra last level cache counters. The maximum available counters is increased and the number of counters for each uncore type is now based on the family. Signed-off-by: Janakarajan Natarajan <Janakarajan.Natarajan@amd.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Arnaldo Carvalho de Melo <acme@kernel.org> Cc: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Stephane Eranian <eranian@google.com> Cc: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Vince Weaver <vincent.weaver@maine.edu> Link: http://lkml.kernel.org/r/799f9c5be8963cc209d9169a08f4a2643b748dc7.1484598705.git.Janakarajan.Natarajan@amd.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
2017-01-30perf/x86/amd/uncore: Rename 'L2' to 'LLC'Janakarajan Natarajan
This patch renames L2 counters to LLC counters. In AMD Family17h processors, L3 cache counter is supported. Since older families have at most L2 counters, last level cache (LLC) indicates L2/L3 based on the family. Signed-off-by: Janakarajan Natarajan <Janakarajan.Natarajan@amd.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Arnaldo Carvalho de Melo <acme@kernel.org> Cc: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Stephane Eranian <eranian@google.com> Cc: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Vince Weaver <vincent.weaver@maine.edu> Link: http://lkml.kernel.org/r/5d8cd8736d8d578354597a548e64ff16210c319b.1484598705.git.Janakarajan.Natarajan@amd.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
2017-01-30arm64: allwinner: add BananaPi-M64 supportAndre Przywara
The Banana Pi M64 board is a typical single board computer based on the Allwinner A64 SoC. Aside from the usual peripherals it features eMMC storage, which is connected to the 8-bit capable SDHC2 controller. Also it has a soldered WiFi/Bluetooth chip, so we enable UART1 and SDHC1 as those two interfaces are connected to it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
2017-01-30arm64: allwinner: a64: add UART1 pin nodesAndre Przywara
On many boards UART1 connects to a Bluetooth chip, so add the pinctrl nodes for the only pins providing access to that UART. That includes those pins for hardware flow control (RTS/CTS). Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
2017-01-30arm64: allwinner: pine64: add MMC supportAndre Przywara
All Pine64 boards connect an micro-SD card slot to the first MMC controller. Enable the respective DT node and specify the (always-on) regulator and card-detect pin. As a micro-SD slot does not feature a write-protect switch, we disable this feature. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
2017-01-30arm64: allwinner: a64: Increase the MMC max frequencyMaxime Ripard
The eMMC controller seem to have a maximum frequency of 200MHz, while the regular MMC controllers are capped at 150MHz. Since older SoCs cannot go that high, we cannot change the default maximum frequency, but fortunately for us we have a property for that in the DT. This also has the side effect of allowing to use the MMC HS200 and SD SDR104 modes for the boards that support it (with either 1.2v or 1.8v IOs). Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Tested-by: Florian Vaussard <florian.vaussard@heig-vd.ch> Acked-by: Chen-Yu Tsai <wens@csie.org>
2017-01-30arm64: allwinner: a64: Add MMC pinctrl nodesMaxime Ripard
The A64 only has a single set of pins for each MMC controller. Since we already have boards that require all of them, let's add them to the DTSI. Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Tested-by: Florian Vaussard <florian.vaussard@heig-vd.ch> Acked-by: Chen-Yu Tsai <wens@csie.org>
2017-01-30arm64: allwinner: a64: Add MMC nodesAndre Przywara
The A64 has 3 MMC controllers, one of them being especially targeted to eMMC. Among other things, it has a data strobe signal and a 8 bits data width. The two other are more usual controllers that will have a 4 bits width at most and no data strobe signal, which limits it to more usual SD or MMC peripherals. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Tested-by: Florian Vaussard <florian.vaussard@heig-vd.ch> Acked-by: Chen-Yu Tsai <wens@csie.org>
2017-01-30KVM: s390: Add debug logging to basic cpu model interfaceChristian Borntraeger
Let's log something for changes in facilities, cpuid and ibc now that we have a cpu model in QEMU. All of these calls are pretty seldom, so we will not spill the log, the they will help to understand pontential guest issues, for example if some instructions are fenced off. As the s390 debug feature has a limited amount of parameters and strings must not go away we limit the facility printing to 3 double words, instead of building that list dynamically. This should be enough for several years. If we ever exceed 3 double words then the logging will be incomplete but no functional impact will happen. Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
2017-01-30Merge tag 'kvm-s390-master-4.10-1' of ↵Christian Borntraeger
git://git.kernel.org/pub/scm/linux/kernel/git/kvms390/linux into kernelorgnext avoid merge conflicts, pull update for master also into next.
2017-01-30KVM: s390: Fix RRBE return code not being CCJanosch Frank
reset_guest_reference_bit needs to return the CC, so we can set it in the guest PSW when emulating RRBE. Right now it only returns 0. Let's fix that. Signed-off-by: Janosch Frank <frankja@linux.vnet.ibm.com> Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
2017-01-30KVM: s390: guestdbg: filter PER i-fetch on EXECUTE properlyDavid Hildenbrand
When we get a PER i-fetch event on an EXECUTE or EXECUTE RELATIVE LONG instruction, because the executed instruction generated a PER i-fetch event, then the PER address points at the EXECUTE function, not the fetched one. Therefore, when filtering PER events, we have to take care of the really fetched instruction, which we can only get by reading in guest virtual memory. For icpt code 4 and 56, we directly have additional information about an EXECUTE instruction at hand. For icpt code 8, we always have to read in guest virtual memory. Signed-off-by: David Hildenbrand <dahi@linux.vnet.ibm.com> Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com> [small fixes]
2017-01-30KVM: s390: prepare to read random guest instructionsDavid Hildenbrand
We will have to read instructions not residing at the current PSW address. Reviewed-by: Eric Farman <farman@linux.vnet.ibm.com> Signed-off-by: David Hildenbrand <dahi@linux.vnet.ibm.com> Cc: David Hildenbrand <david@redhat.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
2017-01-30KVM: s390: guestdbg: filter i-fetch events on icptsDavid Hildenbrand
We already filter PER events reported via icpt code 8. For icpt code 4 and 56, this is still missing. So let's properly detect if we have a debugging event and if we have to inject a PER i-fetch event into the guest at all. Signed-off-by: David Hildenbrand <dahi@linux.vnet.ibm.com> Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com> Cc: David Hildenbrand <david@redhat.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
2017-01-30KVM: s390: Introduce BCD Vector Instructions to the guestGuenther Hutzl
We can directly forward the vector BCD instructions to the guest if available and VX is requested by user space. Please note that user space will have to take care of the final state of the facility bit when migrating to older machines. Signed-off-by: Guenther Hutzl <hutzl@linux.vnet.ibm.com> Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com> Reviewed-by: David Hildenbrand <dahi@linux.vnet.ibm.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
2017-01-30KVM: s390: Introduce Vector Enhancements facility 1 to the guestMaxim Samoylov
We can directly forward the vector enhancement facility 1 to the guest if available and VX is requested by user space. Please note that user space will have to take care of the final state of the facility bit when migrating to older machines. Reviewed-by: David Hildenbrand <dahi@linux.vnet.ibm.com> Signed-off-by: Maxim Samoylov <max7255@linux.vnet.ibm.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
2017-01-30KVM: s390: Get rid of ar_tChristian Borntraeger
sparse with __CHECK_ENDIAN__ shows that ar_t was never properly used across KVM on s390. We can now: - fix all places - do not make ar_t special Since ar_t is just used as a register number (no endianness issues for u8), and all other register numbers are also just plain int variables, let's just use u8, which matches the __u8 in the userspace ABI for the memop ioctl. Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com> Acked-by: Janosch Frank <frankja@linux.vnet.ibm.com> Reviewed-by: Cornelia Huck <cornelia.huck@de.ibm.com>
2017-01-30KVM: s390: get rid of bogus cc initializationHeiko Carstens
The plo inline assembly has a cc output operand that is always written to and is also as such an operand declared. Therefore the compiler is free to omit the rather pointless and misleading initialization. Get rid of this. Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
2017-01-30KVM: s390: instruction-execution-protection supportJanosch Frank
The new Instruction Execution Protection needs to be enabled before the guest can use it. Therefore we pass the IEP facility bit to the guest and enable IEP interpretation. Signed-off-by: Janosch Frank <frankja@linux.vnet.ibm.com> Reviewed-by: David Hildenbrand <dahi@linux.vnet.ibm.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
2017-01-30KVM: s390: gaccess: add ESOP2 handlingChristian Borntraeger
When we access guest memory and run into a protection exception, we need to pass the exception data to the guest. ESOP2 provides detailed information about all protection exceptions which ESOP1 only partially provided. The gaccess changes make sure, that the guest always gets all available information. Signed-off-by: Janosch Frank <frankja@linux.vnet.ibm.com> Reviewed-by: David Hildenbrand <dahi@linux.vnet.ibm.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
2017-01-30powerpc/powernv: Use OPAL call for TCE kill on NVLink2Alistair Popple
Add detection of NPU2 PHBs. NPU2/NVLink2 has a different register layout for the TCE kill register therefore TCE invalidation should be done via the OPAL call rather than using the register directly as it is for PHB3 and NVLink1. This changes TCE invalidation to use the OPAL call in the case of a NPU2 PHB model. Signed-off-by: Alistair Popple <alistair@popple.id.au> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2017-01-30powerpc/powernv: Initialise nest mmuAlistair Popple
POWER9 contains an off core mmu called the nest mmu (NMMU). This is used by other hardware units on the chip to translate virtual addresses into real addresses. The unit attempting an address translation provides the majority of the context required for the translation request except for the base address of the partition table (ie. the PTCR) which needs to be programmed into the NMMU. This patch adds a call to OPAL to set the PTCR for the nest mmu in opal_init(). Signed-off-by: Alistair Popple <alistair@popple.id.au> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2017-01-30x86/microcode: Do not access the initrd after it has been freedBorislav Petkov
When we look for microcode blobs, we first try builtin and if that doesn't succeed, we fallback to the initrd supplied to the kernel. However, at some point doing boot, that initrd gets jettisoned and we shouldn't access it anymore. But we do, as the below KASAN report shows. That's because find_microcode_in_initrd() doesn't check whether the initrd is still valid or not. So do that. ================================================================== BUG: KASAN: use-after-free in find_cpio_data Read of size 1 by task swapper/1/0 page:ffffea0000db9d40 count:0 mapcount:0 mapping: (null) index:0x1 flags: 0x100000000000000() raw: 0100000000000000 0000000000000000 0000000000000001 00000000ffffffff raw: dead000000000100 dead000000000200 0000000000000000 0000000000000000 page dumped because: kasan: bad access detected CPU: 1 PID: 0 Comm: swapper/1 Tainted: G W 4.10.0-rc5-debug-00075-g2dbde22 #3 Hardware name: Dell Inc. XPS 13 9360/0839Y6, BIOS 1.2.3 12/01/2016 Call Trace: dump_stack ? _atomic_dec_and_lock ? __dump_page kasan_report_error ? pointer ? find_cpio_data __asan_report_load1_noabort ? find_cpio_data find_cpio_data ? vsprintf ? dump_stack ? get_ucode_user ? print_usage_bug find_microcode_in_initrd __load_ucode_intel ? collect_cpu_info_early ? debug_check_no_locks_freed load_ucode_intel_ap ? collect_cpu_info ? trace_hardirqs_on ? flat_send_IPI_mask_allbutself load_ucode_ap ? get_builtin_firmware ? flush_tlb_func ? do_raw_spin_trylock ? cpumask_weight cpu_init ? trace_hardirqs_off ? play_dead_common ? native_play_dead ? hlt_play_dead ? syscall_init ? arch_cpu_idle_dead ? do_idle start_secondary start_cpu Memory state around the buggy address: ffff880036e74f00: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ffff880036e74f80: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff >ffff880036e75000: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ^ ffff880036e75080: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ffff880036e75100: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ================================================================== Reported-by: Andrey Ryabinin <aryabinin@virtuozzo.com> Tested-by: Andrey Ryabinin <aryabinin@virtuozzo.com> Signed-off-by: Borislav Petkov <bp@suse.de> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Link: http://lkml.kernel.org/r/20170126165833.evjemhbqzaepirxo@pd.tnic Signed-off-by: Ingo Molnar <mingo@kernel.org>
2017-01-30PM / OPP: Update OPP users to put referenceViresh Kumar
This patch updates dev_pm_opp_find_freq_*() routines to get a reference to the OPPs returned by them. Also updates the users of dev_pm_opp_find_freq_*() routines to call dev_pm_opp_put() after they are done using the OPPs. As it is guaranteed the that OPPs wouldn't get freed while being used, the RCU read side locking present with the users isn't required anymore. Drop it as well. This patch also updates all users of devfreq_recommended_opp() which was returning an OPP received from the OPP core. Note that some of the OPP core routines have gained rcu_read_{lock|unlock}() calls, as those still use RCU specific APIs within them. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com> [Devfreq] Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2017-01-30ARM: dts: sun9i: Switch to new clock bindingsChen-Yu Tsai
Now that we have a full clock driver for sun9i, switch to it. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-01-30powerpc/mm: Allow memory hotplug into an offline nodeReza Arbab
Relax the check preventing us from hotplugging into an offline node. This limitation was added in commit 482ec7c403d2 ("[PATCH] powerpc numa: Support sparse online node map") to prevent adding resources to an uninitialized node. These days, there is no harm in doing so. The addition will actually cause the node to be initialized and onlined; add_memory_resource() calls hotadd_new_pgdat() (if necessary) and node_set_online(). Signed-off-by: Reza Arbab <arbab@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2017-01-30powerpc/mm: Simplify loop control in parse_numa_properties()Reza Arbab
The flow of the main loop in parse_numa_properties() is overly complicated. Simplify it to be less confusing and easier to read. No functional change. The end of the main loop in parse_numa_properties() looks like this: for_each_node_by_type(...) { ... if (!condition) { if (--ranges) goto new_range; else continue; } statement(); if (--ranges) goto new_range; /* else * continue; <- implicit, this is the end of the loop */ } The only effect of !condition is to skip execution of statement(). This can be rewritten in a simpler way: for_each_node_by_type(...) { ... if (condition) statement(); if (--ranges) goto new_range; } Signed-off-by: Reza Arbab <arbab@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2017-01-30powerpc/fadump: Fix the race in crash_fadump().Mahesh Salgaonkar
There are chances that multiple CPUs can call crash_fadump() simultaneously and would start duplicating same info to vmcoreinfo ELF note section. This causes makedumpfile to fail during kdump capture. One example is, triggering dumprestart from HMC which sends system reset to all the CPUs at once. makedumpfile --dump-dmesg /proc/vmcore read_vmcoreinfo_basic_info: Invalid data in /tmp/vmcoreinfoyjgxlL: CRASHTIME=1475605971CRASHTIME=1475605971CRASHTIME=1475605971CRASHTIME=1475605971CRASHTIME=1475605971CRASHTIME=1475605971CRASHTIME=1475605971CRASHTIME=1475605971 makedumpfile Failed. Running makedumpfile --dump-dmesg /proc/vmcore failed (1). makedumpfile -d 31 -l /proc/vmcore read_vmcoreinfo_basic_info: Invalid data in /tmp/vmcoreinfo1mmVdO: CRASHTIME=1475605971CRASHTIME=1475605971CRASHTIME=1475605971CRASHTIME=1475605971CRASHTIME=1475605971CRASHTIME=1475605971CRASHTIME=1475605971CRASHTIME=1475605971 makedumpfile Failed. Running makedumpfile -d 31 -l /proc/vmcore failed (1). Signed-off-by: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2017-01-30powerpc/mm/hash: Properly mask the ESID bits when building proto VSIDAneesh Kumar K.V
The proto VSID is built using both the MMU context id and effective segment ID (ESID). We should not have overlapping bits between those. That could result in us having a VSID collision. With the current code we missed masking the top bits of the ESID. This implies for kernel address we ended up using the top 4 bits of the ESID as part of the proto VSID, which is wrong. The current code use the top 4 context values (0x7fffc - 0x7ffff) for the kernel. With those context IDs used for the kernel, we don't run into VSID collisions because we get the same proto VSID irrespective of whether we mask the ESID bits or not. eg: ea = 0xf000000000000000 context = 0x7ffff w/out masking: proto_vsid = (0x7ffff << 6 | 0xf000000000000000 >> 40) = (0x1ffffc0 | 0xf00000) = 0x1ffffc0 with masking: proto_vsid = (0x7ffff << 6 | ((0xf000000000000000 >> 40) & 0x3f)) = (0x1ffffc0 | (0xf00000 & 0x3f)) = 0x1ffffc0 | 0) = 0x1ffffc0 So although there is no bug, the code is still overly subtle, so fix it to save ourselves pain in future. Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2017-01-29Merge tag 'samsung-soc-4.11-2' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/soc Samsung mach/soc update for v4.11, second round: 1. Remove mach code for Exynos4415 as a continuation of removal of this SoC. 2. Remove obsolete property from the bindings documentation. * tag 'samsung-soc-4.11-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: dt-bindings: video: exynos7-decon: Remove obsolete samsung,power-domain property ARM: EXYNOS: Remove Exynos4415 arch code (SoC not supported anymore) Signed-off-by: Olof Johansson <olof@lixom.net>
2017-01-29Merge tag 'samsung-dt-4.11-2' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt Samsung DeviceTree update for v4.11, second round: 1. Use bigger reserved memory region for Multi Format Codec on all Exynos chipsets so it could decode FullHD easily. * tag 'samsung-dt-4.11-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: ARM: dts: exynos: Fix indentation of EHCI and OHCI ports ARM: dts: exynos: Increase MFC left reserved memory region size Signed-off-by: Olof Johansson <olof@lixom.net>
2017-01-29Merge tag 'samsung-drivers-soc-pmu-4.11-2' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/drivers Continuation of improvements for Exynos PM drivers for v4.11: 1. Add support for Exynos5433 to Power Management Unit (PMU) and Power Domains drivers. 2. Cleanups of duplicated and unused defines. * tag 'samsung-drivers-soc-pmu-4.11-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: soc: samsung: pmu: Remove duplicated define for ARM_L2_OPTION register soc: samsung: pmu: Remove unused and duplicated defines soc: samsung: pm_domains: Add new Exynos5433 compatible soc: samsung: pmu: Add dummy support for Exynos5433 SoC Signed-off-by: Olof Johansson <olof@lixom.net>
2017-01-29arm64: defconfig: enable CONFIG_MTD_NAND and CONFIG_MTD_NAND_DENALI_DTMasahiro Yamada
Enable the NAND framework and the Denali NAND controller driver. This NAND controller is used on UniPhier SoCs. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2017-01-29arm64: defconfig: enable CONFIG_MTD_BLOCKMasahiro Yamada
Enable the block layer support for MTD devices. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2017-01-29Merge tag 'zte-dt64-4.11' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt64 ZTE arm64 device tree update for 4.11: - Enable cpufreq support for zx296718 by using new operating-points-v2 bindings, so that it works with the generic cpufreq-dt driver. * tag 'zte-dt64-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: arm64: dts: zx: support cpu-freq for zx296718 Signed-off-by: Olof Johansson <olof@lixom.net>
2017-01-29Merge tag 'imx-defconfig-4.11' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/defconfig i.MX defconfig updates for 4.11: - Select wireless extensions option for imx_v6_v7_defconfig, so that wireless works out of box with userspace tools such as 'iwconfig'. - Enable EXT4 filesystem support for vf610m4_defconfig. * tag 'imx-defconfig-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: ARM: vf610m4: defconfig: enable EXT4 filesystem ARM: imx_v6_v7_defconfig: Select wireless extensions option Signed-off-by: Olof Johansson <olof@lixom.net>
2017-01-29Merge tag 'imx-dt64-4.11' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt64 Freescale arm64 device tree updates for 4.11: - Add support for LS1012A SoC which is an ARMv8 SoC with single Cortex-A53 core, and the corresponding board support: FRDM, QDS and RDB. - Enable TMU (Thermal Monitoring Unit) support for LS1046A SoC. - Enable PCA9547 device for ls2080a-rdb board by removing 'disabled' status setting. * tag 'imx-dt64-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: dt-bindings: clockgen: Add compatible string for LS1012A Documentation: DT: add LS1012A compatible for SCFG and DCFG Documentation: DT: Add entry for FSL LS1012A RDB, FRDM, QDS boards arm64: dts: ls1046a: Add TMU device tree support arm64: dts: Add support for FSL's LS1012A SoC arm64: dts: ls2080a-rdb: remove disable status of pca9547 Signed-off-by: Olof Johansson <olof@lixom.net>
2017-01-29Merge tag 'imx-dt-4.11' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt i.MX device tree updates for 4.11: - New board support: vf610-zii-dev-rev-c, imx6ul-opos6uldev, imx6ul-isiot, imx6qdl-savageboard, imx6q-mccmon6. - A patch from Alexandre to correct the mangled license text which has been copied & pasted all over the i.MX device tree files. - Update cpu nodes of some i.MX SoCs to make them consistent and match ePAPR spec. - Add OCOTP device for i.MX6UL SoC. - Add security violation interrupt for i.MX25 DryIce. - Enable USB OTG, WIFI and Bluetooth support for i.MX6SX Udoo Neo board. - Enable S/PDIF and 2nd display pipeline support for CompuLab board.. - Add SPI and LTC3676 PMIC support for Gateworks Ventana boards. - A few random device addition for various boards: TVE DAC regulators for imx53-qsb, EEPROM for vf610-zii-dev, eMMC and NAND support for i.MX6UL Engicam boards. - Cleanups on obsoleted or unused properties. * tag 'imx-dt-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (32 commits) ARM: dts: udoo_neo: Add Bluetooth support ARM: dts: udoo_neo: Add Wifi support ARM: dts: udoo_neo: Add UDOO Neo USB OTG1 and OTG2 support ARM: dts: imx6ul: Add Engicam Is.IoT MX6UL NAND initial support ARM: dts: imx6ul: Add Engicam Is.IoT MX6UL eMMC initial support ARM: dts: imx6qdl: Fix "ERROR: code indent should use tabs where possible" ARM: dts: vf610-zii-dev: add EEPROM entry to Rev C ARM: dts: add Armadeus Systems OPOS6UL and OPOS6ULDEV support ARM: dts: imx6q-utilite-pro: enable 2nd display pipeline ARM: dts: vf610-zii-dev: Add .dts file for rev. C ARM: dts: vf610-zii-dev-rev-b: Remove leftover PWM pingroup ARM: dts: imx6: Support Savageboard quad ARM: dts: imx6: Support Savageboard dual ARM: dts: imx6: Add Savageboard common file ARM: dts: imx53-qsb: Provide the TVE DAC regulators ARM: dts: imx6q: Add mccmon6 board support Doc: devicetree: bindings: Add vendor prefix entry - lwn ARM: dts: imx/vf: Correct license text ARM: dts: imx25.dtsi: DryIce security violation interrupt ARM: dts: imx: Add ocotp node for imx6ul ... Signed-off-by: Olof Johansson <olof@lixom.net>
2017-01-29Merge tag 'imx-cleanup-4.11' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/soc i.MX cleanup for 4.11: - Remove unused flexcan and esdhc device definitions for i.MX25. - A series from Fabio to remove camera device initialization code from i.MX platform support, since the corresponding media driver has been deprecated and removed from kernel tree. * tag 'imx-cleanup-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: ARM: mach-mx27_3ds: Remove camera support ARM: mach-pcm037: Remove camera support ARM: mach-mx35_3ds: Remove camera support ARM: mx31moboard-smartbot: Remove camera support ARM: mx31moboard-marxbot: Remove camera support ARM: mach-mx31_3ds: Remove camera support ARM: imx: remove unused device definitions Signed-off-by: Olof Johansson <olof@lixom.net>
2017-01-29Merge tag 'imx-fixes-nc-4.11' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt i.MX non-critical device tree fixes for 4.11: - A couple of fixes on anatop regulator voltage and constraints according to hardware datasheet. - Correct FEC interrupt routing for i.MX6QP which has got the hardware bug found on i.MX6Q fixed. - Remove unit address from i.MX6 LDB device node to fix DTC warning. - A fix on imx53-qsb board FEC pinmux config to remove the dependency on firmware for setting up pins. - A series from Sascha to fix LPSR pins for i.MX7 boards. * tag 'imx-fixes-nc-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: ARM: dts: imx53-qsb-common: fix FEC pinmux config ARM: imx6: remove unit address from LDB node ARM: imx6qp: adapt DT to changed FEC interrupts ARM: imx6: fix regulator constraints on anatop 1p1 and 2p5 ARM: imx6: fix min/max voltage of anatop 2p5 regulator ARM: dts: imx7: Add "LPSR" to LPSR iomux pin names ARM: dts: imx7d-cl-som: Fix OTG power pinctrl ARM: dts: imx7d-sdb: Fix watchdog and pwm pinmux ARM: dts: imx7s-warp: Fix watchdog pinmux Signed-off-by: Olof Johansson <olof@lixom.net>
2017-01-29Merge tag 'stm32-defconfig-for-v4.11-1' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into next/defconfig STM32 defconfig updates for v4.11, round 1. Highlights: ---------- - Enable ADC - Enable RTC * tag 'stm32-defconfig-for-v4.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: ARM: configs: stm32: Add RTC support in STM32 defconfig ARM: configs: stm32: enable ADC driver Signed-off-by: Olof Johansson <olof@lixom.net>
2017-01-29Merge tag 'mvebu-dt64-4.11-2' of git://git.infradead.org/linux-mvebu into ↵Olof Johansson
next/dt64 mvebu dt64 for 4.11 (part 2) - Add a new Armada 8K based board: MACCHIATOBin - Enable AHCI on the Armada 7K/8K SoCs * tag 'mvebu-dt64-4.11-2' of git://git.infradead.org/linux-mvebu: arm64: dts: marvell: add generic-ahci compatibles for CP110 ahci arm64: dts: marvell: Add DT for MACCHIATOBin board Signed-off-by: Olof Johansson <olof@lixom.net>
2017-01-29Merge tag 'mvebu-dt-4.11-2' of git://git.infradead.org/linux-mvebu into next/dtOlof Johansson
mvebu dt for 4.11 (part 2) Switch device tree files to the new DSA binding * tag 'mvebu-dt-4.11-2' of git://git.infradead.org/linux-mvebu: ARM: dts: kirkwood-rd88f6281: Utilize new DSA binding ARM: dts: kirkwood-mv88f6281gtw-ge: Utilize new DSA binding ARM: dts: kirkwood-linksys-viper: Utilize new DSA binding ARM: dts: kirkwood-dir665: Utilize new DSA binding ARM: dts: armada-xp-linksys-mamba: Utilize new DSA binding ARM: dts: armada-388-clearfog: Utilize new DSA binding ARM: dts: armada-385-linksys: Utilize new DSA binding ARM: dts: armada-370-rd: Utilize new DSA binding Signed-off-by: Olof Johansson <olof@lixom.net>
2017-01-29Merge tag 'mvebu-soc-4.11-1' of git://git.infradead.org/linux-mvebu into ↵Olof Johansson
next/soc mvebu soc for 4.11 (part 1) Cleanup up on dove pmu and mv78x00 pci * tag 'mvebu-soc-4.11-1' of git://git.infradead.org/linux-mvebu: soc: dove: constify reset_control_ops structures ARM: mv78xx0: fix possible PCI buffer overflow Signed-off-by: Olof Johansson <olof@lixom.net>
2017-01-29Merge branch 'sti-dt-for-v4.11-round2' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/pchotard/sti into next/dt * 'sti-dt-for-v4.11-round2' of git://git.kernel.org/pub/scm/linux/kernel/git/pchotard/sti: ARM: dts: STiH407-family: Add missing pwm irq Signed-off-by: Olof Johansson <olof@lixom.net>
2017-01-29Merge tag 'sti-dt-for-v4.10-rc' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/pchotard/sti into fixes STi DT fix: Since v4.10-rc1, xhci is complaining in loop with : [ 801.953836] usb usb6-port1: Cannot enable. Maybe the USB cable is bad? [ 801.960455] xhci-hcd xhci-hcd.0.auto: Cannot set link state. [ 801.966611] usb usb6-port1: cannot disable (err = -32) set property "snps,dis_u3_susphy_quirk" in DT fix it. * tag 'sti-dt-for-v4.10-rc' of git://git.kernel.org/pub/scm/linux/kernel/git/pchotard/sti: ARM: dts: STiH407-family: set snps,dis_u3_susphy_quirk Signed-off-by: Olof Johansson <olof@lixom.net>
2017-01-29Merge tag 'tegra-for-4.11-arm64-dt' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt64 arm64: tegra: Device tree changes for v4.11-rc1 This contains three patches that reintroduce symbolic identifiers for clocks, resets and mailboxes. These had been converted to literals in the v4.10 release to avoid complicated dependencies between branches. * tag 'tegra-for-4.11-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: arm64: tegra: Use symbolic reset identifiers arm64: tegra: Use symbolic clock identifiers arm64: tegra: Use symbolic HSP identifiers Signed-off-by: Olof Johansson <olof@lixom.net>
2017-01-29Merge tag 'tegra-for-4.11-arm-dt' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt ARM: tegra: Device tree changes for v4.11-rc1 This contains a set of patches that add hardware compatibility for newer revisions of the Toradex Apalis TK1. Also included is a fix to the PAZ00 that stabilizes panel initialization on boot as well as a patch to add card detection for the µSD card slot on TrimSlice. To round things off there are a couple of fixes and changes to the Nyan device tree files to fix the battery charger, add compatibility with new revisions of Nyan Blaze and Nyan Big, as well as properly support the TPM. * tag 'tegra-for-4.11-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: ARM: tegra: nyan-blaze: Proper pinmux for TPM I2C ARM: tegra: nyan-big: Proper pinmux for TPM I2C ARM: tegra: nyan-blaze: Include compatible revisions for proper detection ARM: tegra: nyan-big: Include compatible revisions for proper detection ARM: tegra: nyan: Use external control for bq24735 charger ARM: tegra: nyan: Use proper IRQ type definitions ARM: dts: tegra: Fix missing card detection in Trimslice µSD card slot ARM: tegra: paz00: Mark panel regulator as enabled on boot ARM: tegra: apalis-tk1: Update compatibility comment ARM: tegra: apalis-tk1: Fix SD card detect on v1.1 HW ARM: tegra: apalis-tk1: Adjust pin muxing for v1.1 HW ARM: tegra: apalis-tk1: Optional DisplayPort hot-plug detect ARM: tegra: apalis-tk1: Pull-up temperature alert Signed-off-by: Olof Johansson <olof@lixom.net>
generated by cgit (git 2.34.1) at 2025-09-14 18:51:47 +0000