summaryrefslogtreecommitdiff
path: root/arch
AgeCommit message (Collapse)Author
2023-10-06m68k: kernel: Include <linux/cpu.h> for trap_init()Geert Uytterhoeven
When building with W=1: arch/m68k/kernel/vectors.c:74:13: warning: no previous prototype for ‘trap_init’ [-Wmissing-prototypes] 74 | void __init trap_init (void) | ^~~~~~~~~ Fix this by including <linux/cpu.h>. Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Link: https://lore.kernel.org/r/42e7055fab50deda1f7cd648982e90b7ab28fdc3.1694613528.git.geert@linux-m68k.org
2023-10-06m68k: kernel: Add missing asmlinkage to do_notify_resume()Geert Uytterhoeven
do_notify_resume() is called from assembly code, so it should be marked asmlinkage for documentation purposes. Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Link: https://lore.kernel.org/r/e24d63ec4332316e859125caa8d07c0589603cfd.1694613528.git.geert@linux-m68k.org
2023-10-06m68k: Use kernel's generic libgcc functionsGreg Ungerer
The arch/m68k/lib versions of the libgcc functions: ashldi3, ashrdi3 and lshrdi3 were taken directly from an older version of gcc. We can use the kernel's own generic lib versions of these - they are virtually identical. Switch to those and remove the m68k local ones. Signed-off-by: Greg Ungerer <gerg@linux-m68k.org> Reviewed-by: Geert Uytterhoeven <geert@linux-m68k.org> Link: https://lore.kernel.org/r/20230913071350.1939818-1-gerg@kernel.org Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
2023-10-06m68k: emu: Replace strlcpy() with strscpy()Azeem Shaikh
strlcpy() reads the entire source buffer first. This read may exceed the destination size limit. This is both inefficient and can lead to linear read overflows if a source string is not NUL-terminated [1]. In an effort to remove strlcpy() completely [2], replace strlcpy() here with strscpy(). Direct replacement is safe here since return value of -errno is used to check for truncation instead of sizeof(dest). [1] https://www.kernel.org/doc/html/latest/process/deprecated.html#strlcpy [2] https://github.com/KSPP/linux/issues/89 Signed-off-by: Azeem Shaikh <azeemshaikh38@gmail.com> Reviewed-by: Kees Cook <keescook@chromium.org> Reviewed-by: Geert Uytterhoeven <geert@linux-m68k.org> Link: https://lore.kernel.org/r/20230830185428.4109426-1-azeemshaikh38@gmail.com Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
2023-10-06m68k: math-emu: Add missing prototypesGeert Uytterhoeven
When building with W=1: arch/m68k/math-emu/fp_arith.c:301:16: warning: no previous prototype for ‘fp_fsglmul’ [-Wmissing-prototypes] 301 | struct fp_ext *fp_fsglmul(struct fp_ext *dest, struct fp_ext *src) | ^~~~~~~~~~ arch/m68k/math-emu/fp_arith.c:357:16: warning: no previous prototype for ‘fp_fsgldiv’ [-Wmissing-prototypes] 357 | struct fp_ext *fp_fsgldiv(struct fp_ext *dest, struct fp_ext *src) | ^~~~~~~~~~ CC arch/m68k/math-emu/fp_log.o ... Fix this by adding the missing prototypes to header files. Reported-by: Arnd Bergmann <arnd@arndb.de> Link: https://lore.kernel.org/r/20230810141947.1236730-17-arnd@kernel.org/ Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Link: https://lore.kernel.org/r/96c039640d76973ea762d79018de0bc75bbdc1dc.1692283195.git.geert@linux-m68k.org
2023-10-06m68k: math-emu: Reformat function and variable headersGeert Uytterhoeven
Make the code shorter and easier to read. Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Link: https://lore.kernel.org/r/11506b9225e281f2453a83a02ac4793d0e58b609.1692283195.git.geert@linux-m68k.org
2023-10-06m68k: math-emu: Replace external declarations by header inclusionGeert Uytterhoeven
Replace the (incorrect) external declarations by an inclusion of the appropriate header file. Semantically, the "src" parameters of the various fp_*() functions are constant. However, they cannot actually be const as most of these functions perform a normalization step first. As the fp_one constant passed to fp_add() is already normalized, it is safe to cast away its constness when making the function call. Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Link: https://lore.kernel.org/r/163bc2f64b5a3dd7b96a12aaca6733b408ddc880.1692283195.git.geert@linux-m68k.org
2023-10-06m68k: math-emu: Make multi_arith.h self-containedGeert Uytterhoeven
Add the missing #include "fp_emu.h". Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Link: https://lore.kernel.org/r/2efd6610e97dd1621e7d28bf87cb79173285545d.1692283195.git.geert@linux-m68k.org
2023-10-06m68k: math-emu: Sanitize include guardsGeert Uytterhoeven
Some include guards start with an underscore, others don't. Some comments do not match the actual include guard. Make them uniform, adhering to the "FP_<FOO>_H" format. Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Link: https://lore.kernel.org/r/8c84c8bf06c0c1e463c47f071891e2e83d5abdd2.1692283195.git.geert@linux-m68k.org
2023-10-06m68k: math-emu: Fix incorrect file reference in fp_log.cGeert Uytterhoeven
The file comment header refers to the wrong file. Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Link: https://lore.kernel.org/r/faf2244c3c80a4d70da5a18dd2a170a15b3ebd88.1692283195.git.geert@linux-m68k.org
2023-10-06arm64: dts: meson-a1-ad402: set SPIFC pinsIgor Prusov
SPIFC uses muxed GPIO pins, so they should be properly configured. Signed-off-by: Igor Prusov <ivprusov@salutedevices.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20231005195543.380273-3-ivprusov@salutedevices.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-10-06arm64: dts: meson: a1: Add SPIFC mux pinsIgor Prusov
SPI Flash Controller uses multi-function pins, so add missing mux definition. Signed-off-by: Igor Prusov <ivprusov@salutedevices.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20231005195543.380273-2-ivprusov@salutedevices.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-10-05KVM: x86: Refine calculation of guest wall clock to use a single TSC readDavid Woodhouse
When populating the guest's PV wall clock information, KVM currently does a simple 'kvm_get_real_ns() - get_kvmclock_ns(kvm)'. This is an antipattern which should be avoided; when working with the relationship between two clocks, it's never correct to obtain one of them "now" and then the other at a slightly different "now" after an unspecified period of preemption (which might not even be under the control of the kernel, if this is an L1 hosting an L2 guest under nested virtualization). Add a kvm_get_wall_clock_epoch() function to return the guest wall clock epoch in nanoseconds using the same method as __get_kvmclock() — by using kvm_get_walltime_and_clockread() to calculate both the wall clock and KVM clock time from a *single* TSC reading. The condition using get_cpu_tsc_khz() is equivalent to the version in __get_kvmclock() which separately checks for the CONSTANT_TSC feature or the per-CPU cpu_tsc_khz. Which is what get_cpu_tsc_khz() does anyway. Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Link: https://lore.kernel.org/r/bfc6d3d7cfb88c47481eabbf5a30a264c58c7789.camel@infradead.org Signed-off-by: Sean Christopherson <seanjc@google.com>
2023-10-05Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netJakub Kicinski
Cross-merge networking fixes after downstream PR. No conflicts (or adjacent changes of note). Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2023-10-05Merge tag 'net-6.6-rc5' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net Pull networking fixes from Jakub Kicinski: "Including fixes from Bluetooth, netfilter, BPF and WiFi. I didn't collect precise data but feels like we've got a lot of 6.5 fixes here. WiFi fixes are most user-awaited. Current release - regressions: - Bluetooth: fix hci_link_tx_to RCU lock usage Current release - new code bugs: - bpf: mprog: fix maximum program check on mprog attachment - eth: ti: icssg-prueth: fix signedness bug in prueth_init_tx_chns() Previous releases - regressions: - ipv6: tcp: add a missing nf_reset_ct() in 3WHS handling - vringh: don't use vringh_kiov_advance() in vringh_iov_xfer(), it doesn't handle zero length like we expected - wifi: - cfg80211: fix cqm_config access race, fix crashes with brcmfmac - iwlwifi: mvm: handle PS changes in vif_cfg_changed - mac80211: fix mesh id corruption on 32 bit systems - mt76: mt76x02: fix MT76x0 external LNA gain handling - Bluetooth: fix handling of HCI_QUIRK_STRICT_DUPLICATE_FILTER - l2tp: fix handling of transhdrlen in __ip{,6}_append_data() - dsa: mv88e6xxx: avoid EEPROM timeout when EEPROM is absent - eth: stmmac: fix the incorrect parameter after refactoring Previous releases - always broken: - net: replace calls to sock->ops->connect() with kernel_connect(), prevent address rewrite in kernel_bind(); otherwise BPF hooks may modify arguments, unexpectedly to the caller - tcp: fix delayed ACKs when reads and writes align with MSS - bpf: - verifier: unconditionally reset backtrack_state masks on global func exit - s390: let arch_prepare_bpf_trampoline return program size, fix struct_ops offsets - sockmap: fix accounting of available bytes in presence of PEEKs - sockmap: reject sk_msg egress redirects to non-TCP sockets - ipv4/fib: send netlink notify when delete source address routes - ethtool: plca: fix width of reads when parsing netlink commands - netfilter: nft_payload: rebuild vlan header on h_proto access - Bluetooth: hci_codec: fix leaking memory of local_codecs - eth: intel: ice: always add legacy 32byte RXDID in supported_rxdids - eth: stmmac: - dwmac-stm32: fix resume on STM32 MCU - remove buggy and unneeded stmmac_poll_controller, depend on NAPI - ibmveth: always recompute TCP pseudo-header checksum, fix use of the driver with Open vSwitch - wifi: - rtw88: rtw8723d: fix MAC address offset in EEPROM - mt76: fix lock dependency problem for wed_lock - mwifiex: sanity check data reported by the device - iwlwifi: ensure ack flag is properly cleared - iwlwifi: mvm: fix a memory corruption due to bad pointer arithm - iwlwifi: mvm: fix incorrect usage of scan API Misc: - wifi: mac80211: work around Cisco AP 9115 VHT MPDU length" * tag 'net-6.6-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net: (99 commits) MAINTAINERS: update Matthieu's email address mptcp: userspace pm allow creating id 0 subflow mptcp: fix delegated action races net: stmmac: remove unneeded stmmac_poll_controller net: lan743x: also select PHYLIB net: ethernet: mediatek: disable irq before schedule napi net: mana: Fix oversized sge0 for GSO packets net: mana: Fix the tso_bytes calculation net: mana: Fix TX CQE error handling netlink: annotate data-races around sk->sk_err sctp: update hb timer immediately after users change hb_interval sctp: update transport state when processing a dupcook packet tcp: fix delayed ACKs for MSS boundary condition tcp: fix quick-ack counting to count actual ACKs of new data page_pool: fix documentation typos tipc: fix a potential deadlock on &tx->lock net: stmmac: dwmac-stm32: fix resume on STM32 MCU ipv4: Set offload_failed flag in fibmatch results netfilter: nf_tables: nft_set_rbtree: fix spurious insertion failure netfilter: nf_tables: Deduplicate nft_register_obj audit logs ...
2023-10-05arm64: dts: ti: k3-am62a7-sk: Enable audio on AM62AJai Luthra
Add nodes for audio codec and sound card, enable the audio serializer (McASP1) under use and update pinmux. Reviewed-by: Jayesh Choudhary <j-choudhary@ti.com> Reviewed-by: Devarsh Thakkar <devarsht@ti.com> Link: https://www.ti.com/lit/zip/sprr459 Signed-off-by: Jai Luthra <j-luthra@ti.com> Link: https://lore.kernel.org/r/20231003-mcasp_am62a-v3-5-2b631ff319ca@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2023-10-05arm64: dts: ti: k3-am62a7-sk: Add support for TPS6593 PMICJulien Panis
This patch adds support for TPS6593 PMIC on main I2C0 bus. This device provides regulators (bucks and LDOs), but also GPIOs, a RTC, a watchdog, an ESM (Error Signal Monitor) which monitors the SoC error output signal, and a PFSM (Pre-configurable Finite State Machine) which manages the operational modes of the PMIC. Signed-off-by: Julien Panis <jpanis@baylibre.com> Signed-off-by: Esteban Blanc <eblanc@baylibre.com> Signed-off-by: Jai Luthra <j-luthra@ti.com> Link: https://lore.kernel.org/r/20231003-mcasp_am62a-v3-4-2b631ff319ca@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2023-10-05arm64: dts: ti: k3-am62a7-sk: Drop i2c-1 to 100KhzJai Luthra
The TLV320AIC3106 audio codec is interfaced on the i2c-1 bus. With the default rate of 400Khz the i2c register writes fail to sync: [ 36.026387] tlv320aic3x 1-001b: Unable to sync registers 0x16-0x16. -110 [ 38.101130] omap_i2c 20010000.i2c: controller timed out Dropping the rate to 100Khz fixes the issue. Fixes: 38c4a08c820c ("arm64: dts: ti: Add support for AM62A7-SK") Reviewed-by: Devarsh Thakkar <devarsht@ti.com> Reviewed-by: Aradhya Bhatia <a-bhatia1@ti.com> Signed-off-by: Jai Luthra <j-luthra@ti.com> Link: https://lore.kernel.org/r/20231003-mcasp_am62a-v3-3-2b631ff319ca@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2023-10-05arm64: dts: ti: k3-am62a7-sk: Split vcc_3v3 regulatorsJai Luthra
VCC_3V3_MAIN is the output of LM5141-Q1, and it serves as an input to TPS22965DSGT which produces VCC_3V3_SYS. [1] Link: https://www.ti.com/lit/zip/sprr459 [1] Signed-off-by: Jai Luthra <j-luthra@ti.com> Reviewed-by: Devarsh Thakkar <devarsht@ti.com> Link: https://lore.kernel.org/r/20231003-mcasp_am62a-v3-2-2b631ff319ca@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2023-10-05arm64: dts: ti: k3-am62a-main: Add nodes for McASPJai Luthra
Same as AM62, AM62A has three instances of McASP which can be used for transmitting or receiving digital audio in various formats. Reviewed-by: Jayesh Choudhary <j-choudhary@ti.com> Reviewed-by: Devarsh Thakkar <devarsht@ti.com> Signed-off-by: Jai Luthra <j-luthra@ti.com> Link: https://lore.kernel.org/r/20231003-mcasp_am62a-v3-1-2b631ff319ca@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2023-10-05arm64: dts: ti: k3-am64-tqma64xxl-mbax4xxl: update gpio-led configurationMatthias Schiffer
Replace the deprecated label property with color/function. Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Link: https://lore.kernel.org/r/79cb3cdfed19962ce0d4ae558de897695658a81f.1695901360.git.matthias.schiffer@ew.tq-group.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2023-10-05arm64: dts: ti: k3-am64-tqma64xxl-mbax4xxl: add chassis-typeMatthias Schiffer
Set the "embedded" chassis-type for the MBaX4XxL. Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Link: https://lore.kernel.org/r/55bf14afa377b9bbc1d6c4647895c51c018ae761.1695901360.git.matthias.schiffer@ew.tq-group.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2023-10-05arm64: dts: ti: k3-am64-tqma64xxl-mbax4xxl: add muxing for GPIOs on pin headersMatthias Schiffer
The pin headers X41 and X42 do not have a fixed function. All of these pins can be assigned to PRG0, but as a default, it makes more sense to configure them as simple GPIOs, as the MBaX4XxL is a starterkit/evaluation mainboard. Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Link: https://lore.kernel.org/r/77c30081154774ce31fc4306474a3afa52b07753.1695901360.git.matthias.schiffer@ew.tq-group.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2023-10-05arm64: dts: ti: k3-am64-tqma64xxl: add supply regulator for I2C devicesMatthias Schiffer
Describes the hardware better, and avoids a few warnings during boot: lm75 0-004a: supply vs not found, using dummy regulator at24 0-0050: supply vcc not found, using dummy regulator at24 0-0054: supply vcc not found, using dummy regulator Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Link: https://lore.kernel.org/r/d5991041263c96c798b94c0844a1550e28daa3b1.1695901360.git.matthias.schiffer@ew.tq-group.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2023-10-05ARM: 9326/1: make <linux/uaccess.h> self-contained for ARMMasahiro Yamada
When I compiled the following code for ARM, I encountered numerous errors. [Test Code] #include <linux/compiler.h> #include <linux/uaccess.h> int foo(int *x, int __user *ptr) { return get_user(*x, ptr); } To fix the errors, make some asm headers self-contained: 1. In arch/arm/include/asm/domain.h, include <linux/thread_info.h> for current_thread_info(). 2. In arch/arm/include/asm/traps.h, remove unneeded __init, and include <linux/linkage.h> for asmlinkage. 3. In arch/arm/include/asm/uaccess.h, include <linux/kernel.h> for might_fault(). Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2023-10-05ARM: 9324/1: fix get_user() broken with veneerMasahiro Yamada
The 32-bit ARM kernel stops working if the kernel grows to the point where veneers for __get_user_* are created. AAPCS32 [1] states, "Register r12 (IP) may be used by a linker as a scratch register between a routine and any subroutine it calls. It can also be used within a routine to hold intermediate values between subroutine calls." However, bl instructions buried within the inline asm are unpredictable for compilers; hence, "ip" must be added to the clobber list. This becomes critical when veneers for __get_user_* are created because veneers use the ip register since commit 02e541db0540 ("ARM: 8323/1: force linker to use PIC veneers"). [1]: https://github.com/ARM-software/abi-aa/blob/2023Q1/aapcs32/aapcs32.rst Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> Reviewed-by: Ard Biesheuvel <ardb@kernel.org> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2023-10-05ARM: 9323/1: mm: Fix ARCH_LOW_ADDRESS_LIMIT when CONFIG_ZONE_DMAwahrenst
Configuring VMSPLIT_2G + LPAE on Raspberry Pi 4 leads to SWIOTLB buffer allocation beyond platform dma_zone_size of SZ_1G, which results in broken SD card boot. So fix this be setting ARCH_LOW_ADDRESS_LIMIT in CONFIG_ZONE_DMA case. Suggested-by: Russell King <rmk+kernel@armlinux.org.uk> Fixes: e9faf9b0b07a ("ARM: add multi_v7_lpae_defconfig") Signed-off-by: Stefan Wahren <wahrenst@gmx.net> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2023-10-05ARM: 9322/1: Explicitly include correct DT includesRob Herring
The DT of_device.h and of_platform.h date back to the separate of_platform_bus_type before it as merged into the regular platform bus. As part of that merge prepping Arm DT support 13 years ago, they "temporarily" include each other. They also include platform_device.h and of.h. As a result, there's a pretty much random mix of those include files used throughout the tree. In order to detangle these headers and replace the implicit includes with struct declarations, users need to explicitly include the correct includes. Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2023-10-05ARM: 9321/1: memset: cast the constant byte to unsigned charKursad Oney
memset() description in ISO/IEC 9899:1999 (and elsewhere) says: The memset function copies the value of c (converted to an unsigned char) into each of the first n characters of the object pointed to by s. The kernel's arm32 memset does not cast c to unsigned char. This results in the following code to produce erroneous output: char a[128]; memset(a, -128, sizeof(a)); This is because gcc will generally emit the following code before it calls memset() : mov r0, r7 mvn r1, #127 ; 0x7f bl 00000000 <memset> r1 ends up with 0xffffff80 before being used by memset() and the 'a' array will have -128 once in every four bytes while the other bytes will be set incorrectly to -1 like this (printing the first 8 bytes) : test_module: -128 -1 -1 -1 test_module: -1 -1 -1 -128 The change here is to 'and' r1 with 255 before it is used. Fixes: 1da177e4c3f4 ("Linux-2.6.12-rc2") Reviewed-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Kursad Oney <kursad.oney@broadcom.com> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2023-10-05ARM: 9320/1: fix stack depot IRQ stack filterVincent Whitchurch
Place IRQ handlers such as gic_handle_irq() in the irqentry section even if FUNCTION_GRAPH_TRACER is not enabled. Without this, the stack depot's filter_irq_stacks() does not correctly filter out IRQ stacks in those configurations, which hampers deduplication and eventually leads to "Stack depot reached limit capacity" splats with KASAN. A similar fix was done for arm64 in commit f6794950f0e5ba37e3bbed ("arm64: set __exception_irq_entry with __irq_entry as a default"). Link: https://lore.kernel.org/r/20230803-arm-irqentry-v1-1-8aad8e260b1c@axis.com Signed-off-by: Vincent Whitchurch <vincent.whitchurch@axis.com> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2023-10-05ARM: 9319/1: sa1111: fix sa1111_probe kernel-doc warningsRandy Dunlap
Document only the platform_driver probe entry point in kernel-doc to prevent kernel-doc warnings: sa1111.c:802: warning: Function parameter or member 'me' not described in '__sa1111_probe' sa1111.c:802: warning: Function parameter or member 'mem' not described in '__sa1111_probe' sa1111.c:802: warning: Function parameter or member 'irq' not described in '__sa1111_probe' sa1111.c:802: warning: expecting prototype for sa1111_probe(). Prototype was for __sa1111_probe() instead Also, use ReST list format to enumerate the return values. Link: https://lore.kernel.org/oe-kbuild-all/202308112255.SK1J0rze-lkp@intel.com/ Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Reported-by: kernel test robot <lkp@intel.com> Cc: linux-arm-kernel@lists.infradead.org Cc: patches@armlinux.org.uk Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2023-10-05arm64: dts: ti: k3-am68-sk: Add DT node for USBSinthu Raja
AM68 Starter kit has a USB3 hub that connects to the SerDes0 Lane 2. Update the SerDes configuration to support USB3. Signed-off-by: Sinthu Raja <sinthu.raja@ti.com> Signed-off-by: Ravi Gunasekaran <r-gunasekaran@ti.com> Link: https://lore.kernel.org/r/20230921100039.19897-4-r-gunasekaran@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2023-10-05arm64: dts: ti: k3-am68-sk: Add DT node for PCIeSinthu Raja
AM68 Starter kit features with one PCIe M.2 Key M connector interfaced via two SerDes lanes. Update the SerDes configuration for PCIe. Signed-off-by: Sinthu Raja <sinthu.raja@ti.com> Signed-off-by: Ravi Gunasekaran <r-gunasekaran@ti.com> Link: https://lore.kernel.org/r/20230921100039.19897-3-r-gunasekaran@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2023-10-05arm64: dts: ti: Add USB Type C swap defines for J721S2 SoCSinthu Raja
Lanes 0 and 2 of the J721S2 SerDes WIZ are reserved for USB type-C lane swap. Update the macro definition for it. Signed-off-by: Sinthu Raja <sinthu.raja@ti.com> Signed-off-by: Ravi Gunasekaran <r-gunasekaran@ti.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230921100039.19897-2-r-gunasekaran@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2023-10-05arm64: dts: ti: k3-am69-sk: Add DDR carveout memory nodes for C71x DSPApurva Nandan
Two carveout reserved memory nodes each have been added for each of the C71x DSP for the TI K3 AM69 SK boards. These nodes are assigned to the respective rproc device nodes as well. The first region will be used as the DMA pool for the rproc device, and the second region will furnish the static carveout regions for the firmware memory. The current carveout addresses and sizes are defined statically for each device. The C71x DSP processor supports a MMU called CMMU, but is not currently supported and as such requires the exact memory used by the firmware to be set-aside. Signed-off-by: Sinthu Raja <sinthu.raja@ti.com> Signed-off-by: Apurva Nandan <a-nandan@ti.com> Reviewed-by: Udit Kumar <u-kumar1@ti.com> Link: https://lore.kernel.org/r/20231001181417.743306-10-a-nandan@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2023-10-05arm64: dts: ti: k3-am69-sk: Add DDR carveout memory nodes for R5FApurva Nandan
Two carveout reserved memory nodes each have been added for each of the R5F remote processor device within both the MCU and MAIN domains for the TI K3 AM69 SK boards. These nodes are assigned to the respective rproc device nodes as well. The first region will be used as the DMA pool for the rproc device, and the second region will furnish the static carveout regions for the firmware memory. The current carveout addresses and sizes are defined statically for each device. The R5F processors do not have an MMU, and as such require the exact memory used by the firmwares to be set-aside. The firmware images do not require any RSC_CARVEOUT entries in their resource tables either to allocate the memory for firmware memory segments. Note that the R5F1 carveouts are needed only if the R5F cluster is running in Split (non-LockStep) mode. The reserved memory nodes can be disabled later on if there is no use-case defined to use the corresponding remote processor. Signed-off-by: Sinthu Raja <sinthu.raja@ti.com> Signed-off-by: Apurva Nandan <a-nandan@ti.com> Reviewed-by: Udit Kumar <u-kumar1@ti.com> Link: https://lore.kernel.org/r/20231001181417.743306-9-a-nandan@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2023-10-05arm64: dts: ti: k3-am68-sk-som: Add DDR carveout memory nodes for C71x DSPApurva Nandan
Two carveout reserved memory nodes each have been added for each of the C71x DSP for the TI K3 AM68 SK boards. These nodes are assigned to the respective rproc device nodes as well. The first region will be used as the DMA pool for the rproc device, and the second region will furnish the static carveout regions for the firmware memory. The current carveout addresses and sizes are defined statically for each device. The C71x DSP processor supports a MMU called CMMU, but is not currently supported and as such requires the exact memory used by the firmware to be set-aside. Signed-off-by: Sinthu Raja <sinthu.raja@ti.com> Signed-off-by: Apurva Nandan <a-nandan@ti.com> Reviewed-by: Udit Kumar <u-kumar1@ti.com> Link: https://lore.kernel.org/r/20231001181417.743306-8-a-nandan@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2023-10-05arm64: dts: ti: k3-am68-sk-som: Add DDR carveout memory nodes for R5FApurva Nandan
Two carveout reserved memory nodes each have been added for each of the R5F remote processor device within both the MCU and MAIN domains for the TI K3 AM68 SK boards. These nodes are assigned to the respective rproc device nodes as well. The first region will be used as the DMA pool for the rproc device, and the second region will furnish the static carveout regions for the firmware memory. The current carveout addresses and sizes are defined statically for each device. The R5F processors do not have an MMU, and as such require the exact memory used by the firmwares to be set-aside. The firmware images do not require any RSC_CARVEOUT entries in their resource tables either to allocate the memory for firmware memory segments. Note that the R5F1 carveouts are needed only if the R5F cluster is running in Split (non-LockStep) mode. The reserved memory nodes can be disabled later on if there is no use-case defined to use the corresponding remote processor. Signed-off-by: Sinthu Raja <sinthu.raja@ti.com> Signed-off-by: Apurva Nandan <a-nandan@ti.com> Reviewed-by: Udit Kumar <u-kumar1@ti.com> Link: https://lore.kernel.org/r/20231001181417.743306-7-a-nandan@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2023-10-05arm64: dts: ti: k3-j721s2-som-p0: Add DDR carveout memory nodes for C71x DSPsApurva Nandan
Two carveout reserved memory nodes each have been added for each of the C71x DSP for the TI J721S2 EVM boards. These nodes are assigned to the respective rproc device nodes as well. The first region will be used as the DMA pool for the rproc device, and the second region will furnish the static carveout regions for the firmware memory. The current carveout addresses and sizes are defined statically for each device. The C71x DSP processor supports a MMU called CMMU, but is not currently supported and as such requires the exact memory used by the firmware to be set-aside. Signed-off-by: Hari Nagalla <hnagalla@ti.com> Signed-off-by: Apurva Nandan <a-nandan@ti.com> Reviewed-by: Andrew Davis <afd@ti.com> Link: https://lore.kernel.org/r/20231001181417.743306-6-a-nandan@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2023-10-05arm64: dts: ti: k3-j721s2-som-p0: Add DDR carveout memory nodes for R5FApurva Nandan
Two carveout reserved memory nodes each have been added for each of the R5F remote processor device within both the MCU and MAIN domains for the TI J721S2 EVM boards. These nodes are assigned to the respective rproc device nodes as well. The first region will be used as the DMA pool for the rproc device, and the second region will furnish the static carveout regions for the firmware memory. The current carveout addresses and sizes are defined statically for each device. The R5F processors do not have an MMU, and as such require the exact memory used by the firmwares to be set-aside. The firmware images do not require any RSC_CARVEOUT entries in their resource tables either to allocate the memory for firmware memory segments. Note that the R5F1 carveouts are needed only if the R5F cluster is running in Split (non-LockStep) mode. The reserved memory nodes can be disabled later on if there is no use-case defined to use the corresponding remote processor. Signed-off-by: Hari Nagalla <hnagalla@ti.com> Signed-off-by: Apurva Nandan <a-nandan@ti.com> Reviewed-by: Andrew Davis <afd@ti.com> Link: https://lore.kernel.org/r/20231001181417.743306-5-a-nandan@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2023-10-05arm64: dts: ti: k3-j721s2-main: Add C7x remote processsor nodesApurva Nandan
The K3 J721S2 SoCs have two C71x DSP subsystems in MAIN voltage domain. The C71x DSPs are 64 bit machine with fixed and floating point DSP operations. Similar to the R5F remote cores, the inter-processor communication between the main A72 cores and these DSP cores is achieved through shared memory and Mailboxes. The following firmware names are used by default for these DSP cores, and can be overridden in a board dts file if desired: MAIN C71_0 : j721s2-c71_0-fw MAIN C71_1 : j721s2-c71_1-fw Signed-off-by: Hari Nagalla <hnagalla@ti.com> Signed-off-by: Apurva Nandan <a-nandan@ti.com> Reviewed-by: Andrew Davis <afd@ti.com> Link: https://lore.kernel.org/r/20231001181417.743306-4-a-nandan@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2023-10-05arm64: dts: ti: k3-j721s2-main: Add MAIN R5F remote processsor nodesApurva Nandan
The J721S2 SoCs have 2 dual-core Arm Cortex-R5F processor (R5FSS) subsystems/clusters in MAIN voltage domain. Each of these can be configured at boot time to be either run in a LockStep mode or in an Asymmetric Multi Processing (AMP) fashion in Split-mode. These subsystems have 64 KB each Tightly-Coupled Memory (TCM) internal memories for each core split between two banks - ATCM and BTCM (further interleaved into two banks). The TCMs of both Cores are combined in LockStep-mode to provide a larger 128 KB of memory, but otherwise are functionally similar to those on J721E SoCs. Add the DT nodes for the MAIN domain R5F cluster/subsystems, the two R5F cores are added as child nodes to each of the R5F cluster nodes. The clusters are configured to run in LockStep mode by default, with the ATCMs enabled to allow the R5 cores to execute code from DDR with boot-strapping code from ATCM. The inter-processor communication between the main A72 cores and these processors is achieved through shared memory and Mailboxes. The following firmware names are used by default for these cores, and can be overridden in a board dts file if desired: MAIN R5FSS0 Core0: j721s2-main-r5f0_0-fw (both in LockStep & Split mode) MAIN R5FSS0 Core1: j721s2-main-r5f0_1-fw (needed only in Split mode) MAIN R5FSS1 Core0: j721s2-main-r5f1_0-fw (both in LockStep & Split mode) MAIN R5FSS1 Core1: j721s2-main-r5f1_1-fw (needed only in Split mode) Signed-off-by: Hari Nagalla <hnagalla@ti.com> Signed-off-by: Apurva Nandan <a-nandan@ti.com> Reviewed-by: Andrew Davis <afd@ti.com> Link: https://lore.kernel.org/r/20231001181417.743306-3-a-nandan@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2023-10-05arm64: dts: ti: k3-j721s2-mcu: Add MCU R5F cluster nodesApurva Nandan
The J721S2 SoCs have a dual-core Arm Cortex-R5F processor (R5FSS) subsystems/cluster in MCU voltage domain. It can be configured at boot time to be either run in a LockStep mode or in an Asymmetric Multi Processing (AMP) fashion in Split-mode. These subsystems have 64 KB each Tightly-Coupled Memory (TCM) internal memories for each core split between two banks - ATCM and BTCM (further interleaved into two banks). The TCMs of both Cores are combined in LockStep-mode to provide a larger 128 KB of memory, but otherwise are functionally similar to those on J721E SoCs. Add the DT nodes for the MCU domain R5F cluster/subsystem, the two R5F cores are added as child nodes to each of the R5F cluster nodes. The clusters are configured to run in LockStep mode by default, with the ATCMs enabled to allow the R5 cores to execute code from DDR with boot-strapping code from ATCM. The inter-processor communication between the main A72 cores and these processors is achieved through shared memory and Mailboxes. The following firmware names are used by default for these cores, and can be overridden in a board dts file if desired: MCU R5FSS0 Core0: j721s2-mcu-r5f0_0-fw (both in LockStep and Split mode) MCU R5FSS0 Core1: j721s2-mcu-r5f0_1-fw (needed only in Split mode) Signed-off-by: Hari Nagalla <hnagalla@ti.com> Signed-off-by: Apurva Nandan <a-nandan@ti.com> Reviewed-by: Andrew Davis <afd@ti.com> Link: https://lore.kernel.org/r/20231001181417.743306-2-a-nandan@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2023-10-05arm64: dts: ti: k3-j721e-mcu-wakeup: Add MCU domain ESM instanceNeha Malcom Francis
Currently J721E defines only the main_esm in DTS. Add node for mcu_esm as well. According to J721E TRM (12.11.2.2 ESM Environment) [1], we see that the interrupt line from ESMi (main_esm) is routed to MCU_ESM (mcu_esm). This is MCU_ESM0_LVL_IN_95 with interrupt ID 95. Configure mcu_esm accordingly so that errors from main_esm are routed to mcu_esm and handled. [1] https://www.ti.com/lit/zip/spruil1 Signed-off-by: Neha Malcom Francis <n-francis@ti.com> Reviewed-by: Udit Kumar <u-kumar1@ti.com> Link: https://lore.kernel.org/r/20230926142810.602384-1-n-francis@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2023-10-05arm64: dts: ti: k3-am625-beagleplay: Fix typo in ramoops regWadim Egorov
Seems like the address value of the reg property was mistyped. Update reg to 0x9ca00000 to match node's definition. Fixes: f5a731f0787f ("arm64: dts: ti: Add k3-am625-beagleplay") Signed-off-by: Wadim Egorov <w.egorov@phytec.de> Reviewed-by: Nishanth Menon <nm@ti.com> Link: https://lore.kernel.org/r/20230925151444.1856852-1-w.egorov@phytec.de Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2023-10-05arm64: dts: ti: k3-am64: Add GPIO expander on I2C0Roger Quadros
A TCA9554 GPIO expander is present on I2C0. Add it. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://lore.kernel.org/r/20230923080046.5373-3-rogerq@kernel.org Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2023-10-05arm64: defconfig: Enable RZ/G3S (R9A08G045) SoCClaudiu Beznea
Enable the config flag for the Renesas RZ/G3S (R9A08G045) SoC. Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20230929053915.1530607-29-claudiu.beznea@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-10-05arm64: dts: renesas: ebisu: Document Ebisu-4D supportWolfram Sang
Document properly that Ebisu-support includes the Ebisu-4D variant, so there won't be confusion what happened with support for this board. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20231004152751.3917-1-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-10-05arm64: dts: renesas: Add R-Car S4 Starter Kit supportKuninori Morimoto
Add initial support for the R-Car S4 Starter Kit with R8A779F4 SoC support. Based on a patch in the BSP. Signed-off-by: Michael Dege <michael.dege@renesas.com> Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com> Signed-off-by: Tam Nguyen <tam.nguyen.xa@renesas.com> Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Co-developed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/87pm1wfn8z.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-10-05arm64: dts: renesas: Add Renesas R8A779F4 SoC supportKuninori Morimoto
The R8A779F4 (R-Car S4-8) SoC is an updated version of R8A779F0. Add support for it, using the r8a779f0 .dtsi internally. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/87r0mcfn95.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
generated by cgit (git 2.34.1) at 2025-10-02 15:51:48 +0000