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2017-02-07x86/apic: Fix a typo in a comment lineDou Liyang
s/bringin /bringing Signed-off-by: Dou Liyang <douly.fnst@cn.fujitsu.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: trivial@kernel.org Link: http://lkml.kernel.org/r/1486442688-24690-1-git-send-email-douly.fnst@cn.fujitsu.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
2017-02-07x86/kconfig: Remove misleading note regarding hibernation and KASLRNiklas Cassel
There used to be a restriction with KASLR and hibernation, but this is no longer true, and since commit: 65fe935dd238 ("x86/KASLR, x86/power: Remove x86 hibernation restrictions") the parameter "kaslr" does no longer exist. Signed-off-by: Niklas Cassel <niklas.cassel@axis.com> Cc: Kees Cook <keescook@chromium.org> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Niklas Cassel <niklass@axis.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Link: http://lkml.kernel.org/r/1486399429-23078-1-git-send-email-niklass@axis.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
2017-02-07Merge tag 'v4.10-rc7' into efi/core, to pick up fixesIngo Molnar
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2017-02-07s390/debug: make debug event time stamps relative to the boot TOD clockMartin Schwidefsky
The debug features currently uses absolute TOD time stamps for the debug events. Given that the TOD clock can jump forward and backward due to STP sync checks the order of debug events can get obfuscated. Replace the absolute TOD time stamps with a delta to the IPL time stamp. On a STP sync check the TOD clock correction is added to the IPL time stamp as well to make the deltas unaffected by STP sync check. The readout of the debug feature entries will convert the deltas back to absolute time stamps based on the Unix epoch. Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2017-02-07s390/topology: correct allocation of topology informationMartin Schwidefsky
The data stored by the STSI instruction can be up to a page in size but the memblock_virt_alloc allocation for tl_info only specifies 16 bytes. The memory after the short allocation is overwritten every time arch_update_cpu_topology is called. Fixes: 8c9105802235 "s390/numa: establish cpu to node mapping early" Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2017-02-07s390: make setup_randomness workHeiko Carstens
Commit bcfcbb6bae64 ("s390: add system information as device randomness") intended to add some virtual machine specific information to the randomness pool. Unfortunately it uses the page allocator before it is ready to use. In result the page allocator always returns NULL and the setup_randomness function never adds anything to the randomness pool. To fix this use memblock_alloc and memblock_free instead. Fixes: bcfcbb6bae64 ("s390: add system information as device randomness") Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2017-02-07m68k/mac: Replace via-maciisi driver with via-cuda driverFinn Thain
Change the device probe test in the via-cuda.c driver so it will load on Egret-based machines too. Remove the now redundant via-maciisi.c driver. Tested-by: Stan Johnson <userm57@yahoo.com> Signed-off-by: Finn Thain <fthain@telegraphics.com.au> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2017-02-07powerpc/powernv: Remove separate entry for OPAL real mode callsBenjamin Herrenschmidt
All entry points already read the MSR so they can easily do the right thing. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@ozlabs.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2017-02-07powerpc/64: CONFIG_RELOCATABLE support for hmi interruptsNicholas Piggin
The branch from hmi_exception_early to hmi_exception_realmode must use a "relocatable-style" branch, because it is branching from unrelocated exception code to beyond __end_interrupts. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2017-02-07powerpc/mm: Add MMU_FTR_KERNEL_RO to possible feature maskAneesh Kumar K.V
Without this we will always find the feature disabled. Fixes: 984d7a1ec6 ("powerpc/mm: Fixup kernel read only mapping") Cc: stable@vger.kernel.org # v4.7+ Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Acked-by: Balbir Singh <bsingharora@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2017-02-06Merge branch 'linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6 Pull crypto fixes from Herbert Xu: - use-after-free in algif_aead - modular aesni regression when pcbc is modular but absent - bug causing IO page faults in ccp - double list add in ccp - NULL pointer dereference in qat (two patches) - panic in chcr - NULL pointer dereference in chcr - out-of-bound access in chcr * 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: crypto: chcr - Fix key length for RFC4106 crypto: algif_aead - Fix kernel panic on list_del crypto: aesni - Fix failure when pcbc module is absent crypto: ccp - Fix double add when creating new DMA command crypto: ccp - Fix DMA operations when IOMMU is enabled crypto: chcr - Check device is allocated before use crypto: chcr - Fix panic on dma_unmap_sg crypto: qat - zero esram only for DH85x devices crypto: qat - fix bar discovery for c62x
2017-02-07powerpc/64s: Use (start, size) rather than (start, end) for exception handlersNicholas Piggin
start,size has the benefit of being easier to search for (start,end usually gives you the preceeding vector from the one you want, as first result). Suggested-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2017-02-07powerpc/64s: Tidy up after exception handler reworkNicholas Piggin
Somewhere along the line, search/replace left some naming garbled, and untidy alignment (aka. mpe stuffed it up). Might as well fix them all up now while git blame history doesn't extend too far. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2017-02-06arm64: do not trace atomic operationsPratyush Anand
Atomic operation function symbols are exported,when CONFIG_ARM64_LSE_ATOMICS is defined. Prefix them with notrace, so that an user can not trace these functions. Tracing these functions causes kernel crash. Signed-off-by: Pratyush Anand <panand@redhat.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
2017-02-06arm64: mm: enable CONFIG_HOLES_IN_ZONE for NUMAArd Biesheuvel
The NUMA code may get confused by the presence of NOMAP regions within zones, resulting in spurious BUG() checks where the node id deviates from the containing zone's node id. Since the kernel has no business reasoning about node ids of pages it does not own in the first place, enable CONFIG_HOLES_IN_ZONE to ensure that such pages are disregarded. Acked-by: Robert Richter <rrichter@cavium.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Will Deacon <will.deacon@arm.com>
2017-02-06ARC: [plat-*] ARC_HAS_COH_CACHES no longer relevantVineet Gupta
A typical SMP system expects cache coherency. Initial NPS platform support was slated to be SMP w/o cache coherency. However it seems the platform now selects that option, so there is no point in keeping it around. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2017-02-06ARCv2: intc: Delete useless comments in Device TreesYuriy Kolerov
Signed-off-by: Yuriy Kolerov <yuriy.kolerov@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2017-02-06ARCv2: IDU-intc: Delete deprecated parameters in Device TreesYuriy Kolerov
No need for specifying a list of interrupts in the declaration of IDU interrupt controller anymore since the kernel can obtain a number of supported interrupts from the build register. Also delete support of the second parameter for devices which are connected to IDU because it is not used anywhere. Signed-off-by: Yuriy Kolerov <yuriy.kolerov@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2017-02-06ARCv2: IDU-intc: mask all common interrupts by defaultYuriy Kolerov
Signed-off-by: Yuriy Kolerov <yuriy.kolerov@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com> [vgupta: broken off from a bigger patch]
2017-02-06ARCv2: IDU-intc: Use build registers for getting numbers of interruptsYuriy Kolerov
This enhancement is needed to allow masking all available common interrupts in IDU interrupt controller in boot time since the kernel can discover a number of them from the build register. Also now there is no need to specify in device tree a list of used core interrupts by IDU. E.g. before: idu_intc: idu-interrupt-controller { compatible = "snps,archs-idu-intc"; interrupt-controller; interrupt-parent = <&core_intc>; #interrupt-cells = <2>; interrupts = <24 25 26 27 28 29 30 31>; }; and after: idu_intc: idu-interrupt-controller { compatible = "snps,archs-idu-intc"; interrupt-controller; interrupt-parent = <&core_intc>; #interrupt-cells = <2>; }; Signed-off-by: Yuriy Kolerov <yuriy.kolerov@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2017-02-06ARCv2: intc: Set default priority for all core interruptsYuriy Kolerov
After reset all interrupts in the core interrupt controller has the highest priority P0. If the platform supports Fast IRQs and has more than 1 banks of registers then CPU automatically switch banks of registers when P0 interrupt comes. The problem is that the kernel expects that by default switching of banks is not used by all interrupts. It is necessary to set a default nonzero priority for all available interrupts to avoid undefined behaviour. Signed-off-by: Yuriy Kolerov <yuriy.kolerov@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2017-02-06ARCv2: intc: Use runtime value of irq count for setting up intcVineet Gupta
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2017-02-06ARCv2: intc: Rework the build time irq count informationYuriy Kolerov
Currently Kconfig knob ARC_NUMBER_OF_INTERRUPTS is used as indicator of hard irq count. But it is flawed that it doesn't affect - NR_IRQS : for number of virtual interrupts - NR_CPU_IRQS : for number of hardware interrupts Moreover the actual hardware irq count might still not be same as ARC_NUMBER_OF_INTERRUPTS. So use the information availble in the Build Configuration Registers and get rid of the Kconfig option. We still need "some" build time info about irq count to set up sufficient number of vector table entries. This is done with a sufficiently large NR_CPU_IRQS which will eventually be used soley for that purpose (subsequent patches will remove its usage elsewhere) So to summarize what this patch does: * NR_CPU_IRQS defines a maximum number of hardware interrupts. * Remove ARC_NUMBER_OF_INTERRUPTS option and create interrupts table for all possible hardware interrupts. * Increase a maximum number of virtual IRQs to 512. ARCv2 can support 240 interrupts in the core interrupts controllers and 128 interrupts in IDU. Thus 512 virtual IRQs must be enough for most configurations of boards. This patch leads to NR_CPU_IRQS in 2 places, to reduce the overall churn. The next patch will remove the 2nd definition anyways. Signed-off-by: Yuriy Kolerov <yuriy.kolerov@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com> [vgupta: reworked the changelog a bit]
2017-02-06ARC: [intc-*]: confine NR_CPU_IRQS to intc codeVineet Gupta
And even this willl change in subsequent patches where we resort to using run time info instead... Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2017-02-06ARCv2: intc: Use ARC_REG_STATUS32 for addressing STATUS32 regYuriy Kolerov
It is better to use it instead of magic numbers. Signed-off-by: Yuriy Kolerov <yuriy.kolerov@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2017-02-06arc: vdk: Add support of UIOAlexey Brodkin
ARC VDK for EVSS uses UIO for communication with Embedded Vision Subsystem. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2017-02-06arc: vdk: Add support of MMC controllerAlexey Brodkin
ARC VDK virtual platform emulates host MMC controller (DW Mobile Storage) and moreover rootfs is situated on that virtual card. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2017-02-06arc: vdk: Disable halt on resetAlexey Brodkin
In recent VDKs ARC cores are configured as "run on reset" which made existing kernel configuration outdated to effect that slave cores never start execution of the code keeping only master online. With that fix we're again in sync with VDK platform. And while at it we regenerate defconfig via savedefconfig so default options are now excluded. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2017-02-06ARM: defconfigs: make NF_CT_PROTO_SCTP and NF_CT_PROTO_UDPLITE built-inArnd Bergmann
The symbols can no longer be used as loadable modules, leading to a harmless Kconfig warning: arch/arm/configs/imote2_defconfig:60:warning: symbol value 'm' invalid for NF_CT_PROTO_UDPLITE arch/arm/configs/imote2_defconfig:59:warning: symbol value 'm' invalid for NF_CT_PROTO_SCTP arch/arm/configs/ezx_defconfig:68:warning: symbol value 'm' invalid for NF_CT_PROTO_UDPLITE arch/arm/configs/ezx_defconfig:67:warning: symbol value 'm' invalid for NF_CT_PROTO_SCTP Let's make them built-in. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2017-02-06Merge tag 'mvebu-fixes-4.10-1' of git://git.infradead.org/linux-mvebu into fixesArnd Bergmann
Pull "mvebu fixes for 4.10 (part 1)" from Gregory CLEMENT: More consistent naming for some orion5x based boards helping the switch to device tree for debian users. * tag 'mvebu-fixes-4.10-1' of git://git.infradead.org/linux-mvebu: ARM: orion5x: fix Makefile for linkstation-lschl.dtb ARM: dts: orion5x-lschl: More consistent naming on linkstation series ARM: dts: orion5x-lschl: Fix model name
2017-02-06openrisc: add l.lwa/l.swa emulationStefan Kristiansson
This adds an emulation layer for implementations that lack the l.lwa and l.swa instructions. It handles these instructions both in kernel space and user space. Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> [shorne@gmail.com: Added delay slot pc adjust logic] Signed-off-by: Stafford Horne <shorne@gmail.com>
2017-02-06openrisc: head: refactor out tlb flush into it's own functionStefan Kristiansson
This brings it inline with the other setup oprations done like the cache enables _ic_enable and _dc_enable. Also, this is going to make it easier to initialize additional cpu's when smp is introduced. Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> [shorne@gmail.com: Added commit body] Signed-off-by: Stafford Horne <shorne@gmail.com>
2017-02-06openrisc: head: use THREAD_SIZE instead of magic constantStefan Kristiansson
The stack size was hard coded to 0x2000, use the standard THREAD_SIZE definition loaded from thread_info.h. Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> [shorne@gmail.com: Added body to the commit message] Signed-off-by: Stafford Horne <shorne@gmail.com>
2017-02-06openrisc: tlb miss handler optimizationsStefan Kristiansson
By slightly reorganizing the code, the number of registers used in the tlb miss handlers can be reduced by two, thus removing the need to save them to memory. Also, some dead and commented out code is removed. No functional change. Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> Signed-off-by: Jonas Bonn <jonas@southpole.se> Signed-off-by: Stafford Horne <shorne@gmail.com>
2017-02-06openrisc: add cache way information to cpuinfoStefan Kristiansson
Motivation for this is to be able to print the way information properly in print_cpuinfo(), instead of hardcoding it to one. Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> Signed-off-by: Jonas Bonn <jonas@southpole.se> [shorne@gmail.com fixed conflict with show_cpuinfo change] Signed-off-by: Stafford Horne <shorne@gmail.com>
2017-02-06openrisc: use SPARSE_IRQJonas Bonn
The sparse IRQ framework is preferred nowadays so switch over to it. Signed-off-by: Jonas Bonn <jonas@southpole.se> Signed-off-by: Stafford Horne <shorne@gmail.com>
2017-02-06iommu/dma: Remove bogus dma_supported() implementationRobin Murphy
Back when this was first written, dma_supported() was somewhat of a murky mess, with subtly different interpretations being relied upon in various places. The "does device X support DMA to address range Y?" uses assuming Y to be physical addresses, which motivated the current iommu_dma_supported() implementation and are alluded to in the comment therein, have since been cleaned up, leaving only the far less ambiguous "can device X drive address bits Y" usage internal to DMA API mask setting. As such, there is no reason to keep a slightly misleading callback which does nothing but duplicate the current default behaviour; we already constrain IOVA allocations to the iommu_domain aperture where necessary, so let's leave DMA mask business to architecture-specific code where it belongs. Signed-off-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
2017-02-06KVM: s390: detect some program check loopsChristian Borntraeger
Sometimes (e.g. early boot) a guest is broken in such ways that it loops 100% delivering operation exceptions (illegal operation) but the pgm new PSW is not set properly. This will result in code being read from address zero, which usually contains another illegal op. Let's detect this case and return to userspace. Instead of only detecting this for address zero apply a heuristic that will work for any program check new psw. We do not want guest problem state to be able to trigger a guest panic, e.g. by faulting on an address that is the same as the program check new PSW, so we check for the problem state bit being off. With proper handling in userspace we a: get rid of CPU consumption of such broken guests b: keep the program old PSW. This allows to find out the original illegal operation - making debugging such early boot issues much easier than with single stepping Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com> Reviewed-by: Cornelia Huck <cornelia.huck@de.ibm.com>
2017-02-06KVM: s390: Disable dirty log retrieval for UCONTROL guestsJanosch Frank
User controlled KVM guests do not support the dirty log, as they have no single gmap that we can check for changes. As they have no single gmap, kvm->arch.gmap is NULL and all further referencing to it for dirty checking will result in a NULL dereference. Let's return -EINVAL if a caller tries to sync dirty logs for a UCONTROL guest. Fixes: 15f36eb ("KVM: s390: Add proper dirty bitmap support to S390 kvm.") Cc: <stable@vger.kernel.org> # 3.16+ Signed-off-by: Janosch Frank <frankja@linux.vnet.ibm.com> Reported-by: Martin Schwidefsky <schwidefsky@de.ibm.com> Reviewed-by: Cornelia Huck <cornelia.huck@de.ibm.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
2017-02-06kprobes/x86: Use hlist_for_each_entry() instead of hlist_for_each_entry_safe()Masami Hiramatsu
Use hlist_for_each_entry() in the first loop in the kretprobe trampoline_handler() function, because it doesn't change the hlist. Signed-off-by: Masami Hiramatsu <mhiramat@kernel.org> Cc: Ananth N Mavinakayanahalli <ananth@linux.vnet.ibm.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Link: http://lkml.kernel.org/r/148637493309.19245.12546866092052500584.stgit@devbox Signed-off-by: Ingo Molnar <mingo@kernel.org>
2017-02-06kprobes/arm64: Remove a redundant dependency from the KconfigMasami Hiramatsu
Remove the 'HAVE_KPROBES' dependency from the HAVE_KRETPROBES line, since HAVE_KPROBES is already selected unconditionally in the Kconfig line above this one. Signed-off-by: Masami Hiramatsu <mhiramat@kernel.org> Cc: Ananth N Mavinakayanahalli <ananth@linux.vnet.ibm.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: David A. Long <dave.long@linaro.org> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Sandeepa Prabhu <sandeepa.s.prabhu@gmail.com> Cc: Thomas Gleixner <tglx@linutronix.de> Link: http://lkml.kernel.org/r/148637486369.19245.316601692744886725.stgit@devbox Signed-off-by: Ingo Molnar <mingo@kernel.org>
2017-02-06Merge branch 'perf/urgent' into perf/core, to pick up fixesIngo Molnar
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2017-02-06ARM: dts: STiH410-b2260: Enable HW flow-controlLee Jones
Hardware flow-control capability must be specified at a platform level in order to inform the ASC driver that the platform is capable (i.e. are the lines wired up, etc). STiH4{07,10} devices are indeed capable, so let's provide the property. Acked-by: Peter Griffin <peter.griffin@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-02-06ARM: dts: STiH407-family: Use new Pinctrl groupsLee Jones
Having just defined some new Pinctrl groups for when HW flow-control is {en,dis}abled, let's reference them for use within the driver. Acked-by: Peter Griffin <peter.griffin@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-02-06ARM: dts: STiH407-pinctrl: Add Pinctrl group for HW flow-controlLee Jones
Each serial port which supports HW flow-control should have 2 Pinctrl groups. One for when HW flow-control is in progress, where the IP will take over controlling the lines and another group which enables the lines to be toggled using GPIO mechanisms. Acked-by: Peter Griffin <peter.griffin@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-02-06ARM: dts: STiH410-b2260: Identify the UART RTS lineLee Jones
When hardware flow-control is disabled, manual toggling of the UART's reset line (RTS) using userland applications (e.g. stty) is not possible, since the ASC IP does not provide this functionality in the same was as some other IPs do. Thus, we have to do this manually. This patch configures the UART RTS line as a GPIO for manipulation within the UART driver when HW flow-control is not enabled. Acked-by: Peter Griffin <peter.griffin@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-02-06powerpc: Add new cache geometry aux vectorsBenjamin Herrenschmidt
This adds AUX vectors for the L1I,D, L2 and L3 cache levels providing for each cache level the size of the cache in bytes and the geometry (line size and number of ways). We chose to not use the existing alpha/sh definition which packs all the information in a single entry per cache level as it is too restricted to represent some of the geometries used on POWER. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2017-02-06powerpc/64: Hard code cache geometry on POWER8Benjamin Herrenschmidt
All shipping firmware versions have it wrong in the device-tree Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2017-02-06powerpc/64: Add L2 and L3 cache shape infoBenjamin Herrenschmidt
Retrieved from device-tree when available Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2017-02-06powerpc/64: Clean up ppc64_caches using a struct per cacheBenjamin Herrenschmidt
We have two set of identical struct members for the I and D sides and mostly identical bunches of code to parse the device-tree to populate them. Instead make a ppc_cache_info structure with one copy for I and one for D Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>