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2022-11-14riscv: dts: microchip: fix the icicle's #pwm-cellsConor Dooley
\#pwm-cells for the Icicle kit's fabric PWM was incorrectly set to 2 & blindly overridden by the (out of tree) driver anyway. The core can support inverted operation, so update the entry to correctly report its capabilities. Fixes: 72560c6559b8 ("riscv: dts: microchip: add fpga fabric section to icicle kit") Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2022-11-14arm64: Add architecture specific ACPI FFH Opregion callbacksSudeep Holla
FFH Operation Region space can be used to trigger SMC or HVC calls, using the Arm SMC Calling Convention (SMCCC). The choice of conduit (SMC or HVC) is based on what the kernel choose based on PSCI as with any other users of SMCCC within the kernel. Function identifiers only in the SMCCC SiP Service, OEM Service and FF-A specific call range are allowed in FFH Opregions. Offset can be either 0(32 bit calling convention) or 1(64 bit calling convention). The length must be set with the range applicable based on the value of the offset. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will@kernel.org> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2022-11-14memregion: Add cpu_cache_invalidate_memregion() interfaceDavidlohr Bueso
With CXL security features, and CXL dynamic provisioning, global CPU cache flushing nvdimm requirements are no longer specific to that subsystem, even beyond the scope of security_ops. CXL will need such semantics for features not necessarily limited to persistent memory. The functionality this is enabling is to be able to instantaneously secure erase potentially terabytes of memory at once and the kernel needs to be sure that none of the data from before the erase is still present in the cache. It is also used when unlocking a memory device where speculative reads and firmware accesses could have cached poison from before the device was unlocked. Lastly this facility is used when mapping new devices, or new capacity into an established physical address range. I.e. when the driver switches DeviceA mapping AddressX to DeviceB mapping AddressX then any cached data from DeviceA:AddressX needs to be invalidated. This capability is typically only used once per-boot (for unlock), or once per bare metal provisioning event (secure erase), like when handing off the system to another tenant or decommissioning a device. It may also be used for dynamic CXL region provisioning. Users must first call cpu_cache_has_invalidate_memregion() to know whether this functionality is available on the architecture. On x86 this respects the constraints of when wbinvd() is tolerable. It is already the case that wbinvd() is problematic to allow in VMs due its global performance impact and KVM, for example, has been known to just trap and ignore the call. With confidential computing guest execution of wbinvd() may even trigger an exception. Given guests should not be messing with the bare metal address map via CXL configuration changes cpu_cache_has_invalidate_memregion() returns false in VMs. While this global cache invalidation facility, is exported to modules, since NVDIMM and CXL support can be built as a module, it is not for general use. The intent is that this facility is not available outside of specific "device-memory" use cases. To make that expectation as clear as possible the API is scoped to a new "DEVMEM" module namespace that only the NVDIMM and CXL subsystems are expected to import. Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@redhat.com> Cc: Borislav Petkov <bp@alien8.de> Cc: x86@kernel.org Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Andy Lutomirski <luto@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Tested-by: Dave Jiang <dave.jiang@intel.com> Signed-off-by: Davidlohr Bueso <dave@stgolabs.net> Acked-by: Dave Hansen <dave.hansen@linux.intel.com> Co-developed-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2022-11-14Merge tag 'ux500-dts-for-v6.2' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into arm/dt Some Ux500 DTS updates for v6.2: - Some cleanups from Krzysztof for the SPI nodes. - Fix up the NFC chip in Janice. - Drop a bogus power domain regulator that isn't used for the crypto blocks. (We use proper power domains now.) - Add GPS to the Kyle. * tag 'ux500-dts-for-v6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik: ARM: dts: ux500: Add GPS to the Kyle ARM: dts: DBx500 cryp and hash uses power domain ARM: dts: ux500: Fix up the Janice NFC chip ARM: dts: ste: ux500: align SPI node name with dtschema Link: https://lore.kernel.org/r/CACRpkdaXmmZWsGdTG5tqNragkoefcTeUHjR+ZwNyNaa0S7s-7Q@mail.gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-11-14Merge tag 'asahi-soc-dt-6.2' of https://github.com/AsahiLinux/linux into arm/dtArnd Bergmann
Apple SoC DT updates for 6.2. This includes new device trees for Apple M1 Pro/Max/Ultra SoCs and the devices that contain them, as well as some audio-related changes. * tag 'asahi-soc-dt-6.2' of https://github.com/AsahiLinux/linux: arm64: dts: apple: Add ADMAC resets on t8103/t600x dt-bindings: dma: apple,admac: Add reset arm64: dts: apple: t600x: Add MCA and its support arm64: dts: apple: t8103: Add MCA and its support arm64: dts: apple: t8103: Add AUDIO_P parent to the SIO_ADMA power domain arm64: dts: apple: Add J375 devicetrees arm64: dts: apple: Add J314 and J316 devicetrees arm64: dts: apple: Add initial t6000/t6001/t6002 DTs arm64: dts: apple: Fix j45x model years dt-bindings: arm: apple: Add t6001/t6002 Mac Studio compatibles dt-bindings: apple,aic2: Add CPU PMU per-cpu pseudo-interrupts dt-bindings: iommu: dart: add t6000 compatible Link: https://lore.kernel.org/r/dea10860-2870-3a9e-fa51-21e493b1573a@marcan.st Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-11-14arm: dts: spear600: Add ssp controller nodesKory Maincent
The SPEAr600 has three Synchronous serial port to enables synchronous serial communication with slave or master peripherals (SPI). Lets add these nodes to be able to use them. Signed-off-by: Kory Maincent <kory.maincent@bootlin.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-11-14arm: dts: spear600: Fix clcd interruptKory Maincent
Interrupt 12 of the Interrupt controller belongs to the SMI controller, the right one for the display controller is the interrupt 13. Fixes: 8113ba917dfa ("ARM: SPEAr: DT: Update device nodes") Signed-off-by: Kory Maincent <kory.maincent@bootlin.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-11-14arm: configs: spear6xx: Enable PL110 display controllerKory Maincent
Enable the PL110 DRM driver, used by the spear600. Signed-off-by: Kory Maincent <kory.maincent@bootlin.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-11-14arm: configs: spear6xx: Refresh defconfigKory Maincent
Refresh the defconfig to follow the changes made over the year. I ensure important options have not gone away. I drop the gpio sysfs config as it is useless to keep it alone without CONFIG_EXPERT. Signed-off-by: Kory Maincent <kory.maincent@bootlin.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-11-14arm64/signal: Document our convention for choosing magic numbersMark Brown
Szabolcs Nagy has pointed out that most of our signal frame magic numbers are chosen to be meaningful ASCII when dumped to aid manual parsing. This seems sensible since it might help someone parsing things out, let's document it so people implementing new signal contexts are aware of it and are more likely to follow it. Signed-off-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20221031192450.826159-1-broonie@kernel.org [will: Fixed typo and tweaked wording] Signed-off-by: Will Deacon <will@kernel.org>
2022-11-14Merge tag 'renesas-arm-soc-for-v6.2-tag1' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/soc Renesas ARM SoC updates for v6.2 - Drop selecting GPIOLIB and PINCTRL, which are already automatically selected as part of the SOC_RENESAS config option in drivers/soc/renesas/Kconfig. * tag 'renesas-arm-soc-for-v6.2-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: arm64: renesas: Drop selecting GPIOLIB and PINCTRL ARM: shmobile: Drop selecting GPIOLIB and PINCTRL soc: renesas: Kconfig: Explicitly select GPIOLIB and PINCTRL config under SOC_RENESAS Link: https://lore.kernel.org/r/cover.1667558746.git.geert+renesas@glider.be Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-11-14Merge tag 'ux500-soc-v6.2' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into arm/soc Ux500 core changes for the v6.2 kernel cycle: - Spelling error. - A non-urgent fix to not access IOmem for feeding entropy directly, instead copy and use. - Clean out an old register file. * tag 'ux500-soc-v6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik: ARM: ux500: Drop unused register file ARM: ux500: do not directly dereference __iomem arm/mach-ux500: fix repeated words in comments Link: https://lore.kernel.org/r/CACRpkdaPDbJKUzZHsS2POVUQEjYi+6bjU6cvbg4ox=SKPXG2ng@mail.gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-11-14arm64: atomics: lse: remove stale dependency on JUMP_LABELMark Rutland
Currently CONFIG_ARM64_USE_LSE_ATOMICS depends upon CONFIG_JUMP_LABEL, as the inline atomics were indirected with a static branch. However, since commit: 21fb26bfb01ffe0d ("arm64: alternatives: add alternative_has_feature_*()") ... we use an alternative_branch (which is always available) rather than a static branch, and hence the dependency is unnecessary. Remove the stale dependency, along with the stale include. This will allow the use of LSE atomics in kernels built with CONFIG_JUMP_LABEL=n, and reduces the risk of circular header dependencies via <asm/lse.h>. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will@kernel.org> Link: https://lore.kernel.org/r/20221114125424.2998268-1-mark.rutland@arm.com Signed-off-by: Will Deacon <will@kernel.org>
2022-11-14Merge tag 'at91-defconfig-6.2' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/defconfig AT91 defconfig for 6.2 It contains: - sama7 defconfig refresh (done with make savedefconfig) - update sama7 defconfig with OTPC support - update sama7 defconfig with thermal management support * tag 'at91-defconfig-6.2' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: ARM: configs: at91: sama7: add config for thermal management ARM: configs: at91: sama7: add config for microchip otpc ARM: configs: at91: sama7: use make savedefconfig Link: https://lore.kernel.org/r/20221110115422.180893-1-claudiu.beznea@microchip.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-11-14Merge tag 'at91-dt-6.2' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into soc/dt AT91 DT for 6.2 It contains: - interrupt support for ethernet PHYs on pcb8290 board - thermal management support for SAMA7G5 by adding OTP controller (that keeps temperature sensor calibration data), proper ADC bindings and describing thermal zones - securam node from SAMA7G5 is now described with generic name (sram) - remove of status = "okay" from SAM9X60-EK regulators * tag 'at91-dt-6.2' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: ARM: dts: at91: sam9x60ek: remove status = "okay" for regulators ARM: dts: at91: sama7g5: use generic name for securam ARM: dts: at91: sama7g5: add thermal zones node ARM: dts: at91: sama7g5: add temperature sensor ARM: dts: at91: sama7g5: add cells for temperature calibration ARM: dts: at91: sama7g5: add io-channel-cells to adc node ARM: dts: at91: sama7g5: add otpc node ARM: dts: lan966x: Add interrupt support for PHYs on pcb8290 Link: https://lore.kernel.org/r/20221110115431.180908-1-claudiu.beznea@microchip.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-11-14Merge tag 'dt-cleanup-6.2' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt into soc/dt Minor improvements in ARM DTS for v6.2 1. Aspeed: fix qcom,dc-scm-v1-bmc compatible in the bindings. 2. Marvell: include bindings in maintainers entry. 3. Cleanup DTS according to bindings (panel endpoint unit address, incorrect spi-max-frequency, generic node names). 4. Few indentation fixes. * tag 'dt-cleanup-6.2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt: dt-bindings: arm: aspeed: adjust qcom,dc-scm-v1-bmc compatible after rename ARM: dts: sunxi: correct indentation ARM: dts: omap: correct indentation ARM: dts: kirkwood: correct indentation ARM: dts: armada: correct indentation ARM: dts: ti: correct indentation ARM: dts: aspeed: align SPI node name with dtschema MAINTAINERS: ARM: marvell: include bindings ARM: dts: sunplus: sp7021: drop incorrect spi-max-frequency ARM: dts: am335x: drop panel endpoint unit address Link: https://lore.kernel.org/r/20221110092111.18581-1-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-11-14m68k: defconfig: Update defconfigs for v6.1-rc1Geert Uytterhoeven
- Shuffle crypto configuration (cfr. commit f1f142ad43488361 ("crypto: Kconfig - add submenus")). Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Link: https://lore.kernel.org/r/c11de475ba9ba580e7e20cc349919ecfc36c8407.1666026267.git.geert@linux-m68k.org
2022-11-14Merge tag 'renesas-arm-dt-for-v6.2-tag1' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt Renesas ARM DT updates for v6.2 - DMA, SPI (MSIOF), external interrupt (INTC-EX), PWM (PWM and TPU), SDHI, HyperFLASH/QSPI (RPC), and serial ((H)SCIF) support for the R-Car V4H SoC, - I/O expander, eMMC, and QSPI FLASH support for the White Hawk development board, - Preparatory work to share r9a07g043.dtsi between the ARM-based RZ/G2UL (R9A07G043U) and the RISC-V-based RZ/Five (R9A07G043F) SoCs, - Miscellaneous fixes and improvements. * tag 'renesas-arm-dt-for-v6.2-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (21 commits) arm64: dts: renesas: r9a07g043: Split out RZ/G2UL SoC specific parts arm64: dts: renesas: r9a07g043: Introduce SOC_PERIPHERAL_IRQ() macro to specify interrupt property ARM: dts: renesas: Miscellaneous whitespace fixes arm64: dts: renesas: r8a779a0: Update to R-Car Gen4 compatible values arm64: dts: renesas: r8a779g0: Add remaining HSCIF nodes arm64: dts: renesas: r8a779g0: Add SCIF nodes arm64: dts: renesas: white-hawk-cpu: Add QSPI FLASH support arm64: dts: renesas: r8a779g0: Add RPC node arm64: dts: renesas: white-hawk-cpu: Add eMMC support arm64: dts: renesas: r8a779g0: Add SDHI node arm64: dts: renesas: rzg2l: Drop WDT2 nodes arm64: dts: renesas: r8a779g0: Add TPU device node arm64: dts: renesas: r8a779g0: Add PWM device nodes arm64: dts: renesas: r8a779g0: Fix HSCIF0 "brg_int" clock arm64: dts: renesas: condor-common: Add missing bootargs arm64: dts: renesas: white-hawk-cpu: Add PCA9654 I/O Expander arm64: dts: renesas: r8a779g0: Add INTC-EX node arm64: dts: renesas: r8a779g0: Add MSIOF nodes arm64: dts: renesas: r8a779g0: Add DMA support arm64: dts: renesas: rzg2ul-smarc: Move spi1 pinmux to carrier board DTSI ... Link: https://lore.kernel.org/r/cover.1667558740.git.geert+renesas@glider.be Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-11-14x86/xen: Use kstrtobool() instead of strtobool()Christophe JAILLET
strtobool() is the same as kstrtobool(). However, the latter is more used within the kernel. In order to remove strtobool() and slightly simplify kstrtox.h, switch to the other function name. While at it, include the corresponding header file (<linux/kstrtox.h>) Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Reviewed-by: Boris Ostrovsky <boris.ostrovsky@oracle.com> Link: https://lore.kernel.org/r/e91af3c8708af38b1c57e0a2d7eb9765dda0e963.1667336095.git.christophe.jaillet@wanadoo.fr Signed-off-by: Juergen Gross <jgross@suse.com>
2022-11-14arm64: ftrace: Define ftrace_stub_graph only with FUNCTION_GRAPH_TRACERSami Tolvanen
The 0-day bot reports that arm64 builds with CONFIG_CFI_CLANG + CONFIG_FTRACE are broken when CONFIG_FUNCTION_GRAPH_TRACER is not enabled: ld.lld: error: undefined symbol: __kcfi_typeid_ftrace_stub_graph >>> referenced by entry-ftrace.S:299 (arch/arm64/kernel/entry-ftrace.S:299) >>> arch/arm64/kernel/entry-ftrace.o:(.text+0x48) in archive vmlinux.a This is caused by ftrace_stub_graph using SYM_TYPE_FUNC_START when the address of the function is not taken in any C translation unit. Fix the build by only defining ftrace_stub_graph when it's actually needed, i.e. with CONFIG_FUNCTION_GRAPH_TRACER. Link: https://lore.kernel.org/lkml/202210251659.tRMs78RH-lkp@intel.com/ Fixes: 883bbbffa5a4 ("ftrace,kcfi: Separate ftrace_stub() and ftrace_stub_graph()") Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Sami Tolvanen <samitolvanen@google.com> Reviewed-by: Kees Cook <keescook@chromium.org> Acked-by: Mark Rutland <mark.rutland@arm.com> Reviewed-by: Masami Hiramatsu (Google) <mhiramat@kernel.org> Link: https://lore.kernel.org/r/20221109192831.3057131-1-samitolvanen@google.com Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2022-11-14ARM: findbit: add unwinder informationRussell King (Oracle)
Add unwinder information so oops in the findbit functions can create a proper backtrace. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2022-11-14ARM: findbit: operate by wordsRussell King (Oracle)
Convert the implementations to operate on words rather than bytes which makes bitmap searching faster. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2022-11-14ARM: findbit: convert to macrosRussell King (Oracle)
Since the pairs of _find_first and _find_next functions are pretty similar, use macros to generate this code. This commit does not change the generated code. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2022-11-14ARM: findbit: provide more efficient ARMv7 implementationRussell King (Oracle)
Provide a more efficient ARMv7 implementation to determine the first set bit in the supplied value. Signed-off-by: Russell King (Oracle) <rmk@armlinux.org.uk>
2022-11-14ARM: findbit: document ARMv5 bit offset calculationRussell King (Oracle)
Document the ARMv5 bit offset calculation code. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2022-11-14ARM: 9259/1: stacktrace: Convert stacktrace to generic ARCH_STACKWALKLi Huafei
Historically architectures have had duplicated code in their stack trace implementations for filtering what gets traced. In order to avoid this duplication some generic code has been provided using a new interface arch_stack_walk(), enabled by selecting ARCH_STACKWALK in Kconfig, which factors all this out into the generic stack trace code. Convert ARM to use this common infrastructure. When initializing the stack frame of the current task, arm64 uses __builtin_frame_address(1) to initialize the frame pointer, skipping arch_stack_walk(), see the commit c607ab4f916d ("arm64: stacktrace: don't trace arch_stack_walk()"). Since __builtin_frame_address(1) does not work on ARM, unwind_frame() is used to unwind the stack one layer forward before calling walk_stackframe(). Signed-off-by: Li Huafei <lihuafei1@huawei.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2022-11-14Merge tag 'at91-fixes-6.1' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/fixes AT91 fixes for 6.1 It contains: - signal name fix for a pin on SAMA7G5 - memory self-refresh fix for SAMA7G5 by avoid soft resetting AC DLL which can introduce glitches in RAM controller and lead to unexpected behavior - led support fix for lan966x-pcb8291 board by enabling sgpio node * tag 'at91-fixes-6.1' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: ARM: at91: pm: avoid soft resetting AC DLL ARM: dts: lan966x: Enable sgpio on pcb8291 ARM: dts: at91: sama7g5: fix signal name of pin PB2 Link: https://lore.kernel.org/r/20221110115411.180876-1-claudiu.beznea@microchip.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-11-14Merge tag 'qcom-arm64-fixes-for-6.1' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/fixes Qualcomm ARM64 DTS fixes for 6.1 This fixes the APCS register region on IPQ8074 to not overlap with adjacent nodes. It lists the valid LDO modes on a variety of platforms, as this is not required by the binding and implementation. The reference clocks for the two UFS instances on SC8280XP are corrected, to avoid relying on the state left by most versions of the bootloader. A number of issues are corrected with regards to the QMP PHY register ranges on SC8280XP. SC7280 gains a missing lpass reset region. Lastly cluster idle is termporarily disabled on SM8250 to avoid issues with booting the platform, until the last missing pieces lands. * tag 'qcom-arm64-fixes-for-6.1' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: arm64: dts: qcom: sm8250: Disable the not yet supported cluster idle state arm64: dts: qcom: sc7280: Add the reset reg for lpass audiocc on SC7280 arm64: dts: qcom: sc8280xp: fix UFS PHY serdes size arm64: dts: qcom: sc8280xp: drop broken DP PHY nodes arm64: dts: qcom: sc8280xp: fix USB PHY PCS registers arm64: dts: qcom: sc8280xp: fix USB1 PHY RX1 registers arm64: dts: qcom: sc8280xp: fix USB0 PHY PCS_MISC registers arm64: dts: qcom: sc8280xp: correct ref clock for ufs_mem_phy arm64: dts: qcom: sc8280xp: fix ufs_card_phy ref clock arm64: dts: qcom: sm8350-hdk: Specify which LDO modes are allowed arm64: dts: qcom: sm8250-xperia-edo: Specify which LDO modes are allowed arm64: dts: qcom: sm8150-xperia-kumano: Specify which LDO modes are allowed arm64: dts: qcom: sc8280xp-crd: Specify which LDO modes are allowed arm64: dts: qcom: sa8295p-adp: Specify which LDO modes are allowed arm64: dts: qcom: sa8155p-adp: Specify which LDO modes are allowed Revert "arm64: dts: qcom: msm8996: add missing TCSR syscon compatible" arm64: dts: qcom: ipq8074: correct APCS register space size Link: https://lore.kernel.org/r/20221110040635.795921-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-11-14arm64: dts: imx8mm-phg: Add initial board supportFabio Estevam
Add the initial support for the i.MX8MM Cloos PHG board. This board uses a imx8mm-tqma8mqml SoM from TQ-Group. Signed-off-by: Fabio Estevam <festevam@denx.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-11-14arm64: dts: imx8qxp-ss-lsio: add gpio-ranges propertyShenwei Wang
add gpio-ranges property for imx8qxp soc. This gpio-range is used to record which GPIOs correspond to which pins on which pin controllers. The GPIO to PIN mapping will be referenced by the pad wakeup function in GPIO-MXC driver. Signed-off-by: Shenwei Wang <shenwei.wang@nxp.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-11-14arm64: dts: imx8qm-ss-lsio: add gpio-ranges propertyShenwei Wang
add gpio-ranges property for imx8qm soc. This gpio-range is used to record which GPIOs correspond to which pins on which pin controllers. The GPIO to PIN mapping will be referenced by the pad wakeup function in GPIO-MXC driver. Signed-off-by: Shenwei Wang <shenwei.wang@nxp.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-11-14arm64: dts: imx8dxl-ss-lsio: add gpio-ranges propertyShenwei Wang
add gpio-ranges property for imx8dxl soc. This gpio-range is used to record which GPIOs correspond to which pins on which pin controllers. The GPIO to PIN mapping will be referenced by the pad wakeup function in GPIO-MXC driver. Signed-off-by: Shenwei Wang <shenwei.wang@nxp.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-11-14arm64: dts: imx8dxl_evk: add lpspi0 supportFrank Li
Enable lpspi0 at imx8dxl_evk boards dts. Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-11-14arm64: dts: imx8dxl: add lpspi supportFrank Li
Add lpspi0 lpspi1 lpspi2 lpspi3 node at common dma subsystem. Change irq number for 8dxl. Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-11-14arm64: dts: imx8dxl_evk: add flexspi0 supportFrank Li
Enable flexspi0 at imx8dxl_evk boards dts. Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-11-14arm64: dts: imx8dxl: add flexspi0 supportFrank Li
Add flexspi0 node at common lsio subsystem. Change flexspi0 irq number for imx8dxl. Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-11-14arm64: dts: imx8dxl_evk: add adc0 supportFrank Li
Enable adc0 at imx8dxl_evk boards dts. Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-11-14arm64: dts: imx8dxl: add adc0 supportFrank Li
Add adc0 and adc1 node at imx8 common dma subsystem. imx8dxl have only adc0. Change irq number for adc0. Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-11-14ARM: dts: imx: e60k02: Add touchscreenAndreas Kemnade
Add the touchscreen now, since the driver is available. Signed-off-by: Andreas Kemnade <andreas@kemnade.info> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-11-14ARM: dts: imx6qdl-sabre: Add mmc aliasesDetlev Casanova
If not specified, the mmc0 and mmc1 devices will be the devices mmc@2190000 and mmc@2194000, which are in disabled state on the iMX.6 Sabrelite devices. The actual SD card reader devices are the ones at mmc@2198000 and mmc@219c000. Set aliases to use the correct mmc devices order. Signed-off-by: Detlev Casanova <detlev.casanova@collabora.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-11-13Merge tag 'mips-fixes_6.1_1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux Pull MIPS fixes from Thomas Bogendoerfer: - fix jump label branch range check - check kmalloc failures in Loongson64 kexec - fix builds with clang-14 - fix char/int handling in pic32 * tag 'mips-fixes_6.1_1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: MIPS: pic32: treat port as signed integer MIPS: jump_label: Fix compat branch range check mips: alchemy: gpio: Include the right header MIPS: Loongson64: Add WARN_ON on kexec related kmalloc failed MIPS: fix duplicate definitions for exported symbols mips: boot/compressed: use __NO_FORTIFY
2022-11-13Merge tag 'efi-fixes-for-v6.1-3' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/efi/efi Pull EFI fixes from Ard Biesheuvel: - Force the use of SetVirtualAddressMap() on Ampera Altra arm64 machines, which crash in SetTime() if no virtual remapping is used This is the first time we've added an SMBIOS based quirk on arm64, but fortunately, we can just call a EFI protocol to grab the type #1 SMBIOS record when running in the stub, so we don't need all the machinery we have in the kernel proper to parse SMBIOS data. - Drop a spurious warning on misaligned runtime regions when using 16k or 64k pages on arm64 * tag 'efi-fixes-for-v6.1-3' of git://git.kernel.org/pub/scm/linux/kernel/git/efi/efi: arm64: efi: Fix handling of misaligned runtime regions and drop warning arm64: efi: Force the use of SetVirtualAddressMap() on Altra machines
2022-11-13arm64: dts: rockchip: Fix Pine64 Quartz4-B PMIC interruptChen-Yu Tsai
Ths PMIC's interrupt line is tied to GPIO0_A3. This is described correctly for the pinmux setting, but incorrectly for the interrupt. Correct the interrupt setting so that interrupts from the PMIC get delivered. Fixes: dcc8c66bef79 ("arm64: dts: rockchip: add Pine64 Quartz64-B device tree") Signed-off-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Peter Geis <pgwipeout@gmail.com> Link: https://lore.kernel.org/r/20221106161513.4140-1-wens@kernel.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-11-11arm64: dts: qcom: sc8280xp-x13s: enable WiFi controllerJohan Hovold
Enable the Qualcomm QCNFA765 Wireless Network Adapter connected to PCIe4. Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221110103558.12690-10-johan+linaro@kernel.org
2022-11-11arm64: dts: qcom: sc8280xp-x13s: enable modemJohan Hovold
Enable the modem connected to the PCIe3a M.2 connector. Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221110103558.12690-9-johan+linaro@kernel.org
2022-11-11arm64: dts: qcom: sc8280xp-x13s: enable NVMe SSDJohan Hovold
Enable the NVMe SSD connected to PCIe2. Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221110103558.12690-8-johan+linaro@kernel.org
2022-11-11arm64: dts: qcom: sc8280xp-crd: enable WiFi controllerJohan Hovold
Enable the Qualcomm QCNFA765 Wireless Network Adapter connected to PCIe4. Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221110103558.12690-7-johan+linaro@kernel.org
2022-11-11arm64: dts: qcom: sc8280xp-crd: enable SDX55 modemJohan Hovold
Enable the SDX55 modem connected to PCIe3. Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221110103558.12690-6-johan+linaro@kernel.org
2022-11-11arm64: dts: qcom: sc8280xp-crd: enable NVMe SSDJohan Hovold
Enable the NVMe SSD connected to PCIe2. Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221110103558.12690-5-johan+linaro@kernel.org
2022-11-11arm64: dts: qcom: sc8280xp-crd: rename backlight and misc regulatorsJohan Hovold
Rename the backlight and misc regulators according to the net names. Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221110103558.12690-4-johan+linaro@kernel.org
generated by cgit (git 2.34.1) at 2025-09-19 14:49:21 +0000