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2018-03-28s390/lpp: use assembler alternatives for the LPP instructionMartin Schwidefsky
With the new macros for CPU alternatives the MACHINE_FLAG_LPP check around the LPP instruction can be optimized. After this is done the flag can be removed. Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2018-03-28s390/entry.S: use assembler alternativesMartin Schwidefsky
Replace the open coded alternatives for the BPOFF, BPON, BPENTER, and BPEXIT macros with the new magic from asm/alternatives-asm.h to make the code easier to read. Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2018-03-28s390: add assembler macros for CPU alternativesMartin Schwidefsky
Add a header with macros usable in assembler files to emit alternative code sequences. It works analog to the alternatives for inline assmeblies in C files, with the same restrictions and capabilities. The syntax is ALTERNATIVE "<default instructions sequence>", \ "<alternative instructions sequence>", \ "<features-bit>" and ALTERNATIVE_2 "<default instructions sequence>", \ "<alternative instructions sqeuence #1>", \ "<feature-bit #1>", "<alternative instructions sqeuence #2>", \ "<feature-bit #2>" Reviewed-by: Vasily Gorbik <gor@linux.vnet.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2018-03-28s390: add sysfs attributes for spectreMartin Schwidefsky
Set CONFIG_GENERIC_CPU_VULNERABILITIES and provide the two functions cpu_show_spectre_v1 and cpu_show_spectre_v2 to report the spectre mitigations. Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2018-03-28s390: report spectre mitigation via syslogMartin Schwidefsky
Add a boot message if either of the spectre defenses is active. The message is "Spectre V2 mitigation: execute trampolines." or "Spectre V2 mitigation: limited branch prediction." Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2018-03-28s390: add automatic detection of the spectre defenseMartin Schwidefsky
Automatically decide between nobp vs. expolines if the spectre_v2=auto kernel parameter is specified or CONFIG_EXPOLINE_AUTO=y is set. The decision made at boot time due to CONFIG_EXPOLINE_AUTO=y being set can be overruled with the nobp, nospec and spectre_v2 kernel parameters. Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2018-03-28s390: move nobp parameter functions to nospec-branch.cMartin Schwidefsky
Keep the code for the nobp parameter handling with the code for expolines. Both are related to the spectre v2 mitigation. Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2018-03-28Backmerge tag 'v4.16-rc7' into drm-nextDave Airlie
Linux 4.16-rc7 This was requested by Daniel, and things were getting a bit hard to reconcile, most of the conflicts were trivial though.
2018-03-28Merge remote-tracking branch 'asoc/topic/intel' into asoc-nextMark Brown
2018-03-27Merge branch 'fixes' of git://git.armlinux.org.uk/~rmk/linux-armLinus Torvalds
Pull ARM fixes from Russell King: "A small number of small fixes for ARM, mostly for some build issues. One fix for a regression caused by the cpu hotplug conversion from a few kernel versions ago" * 'fixes' of git://git.armlinux.org.uk/~rmk/linux-arm: ARM: 8750/1: deflate_xip_data.sh: minor fixes ARM: 8748/1: mm: Define vdso_start, vdso_end as array ARM: 8747/1: make CONFIG_DEBUG_WX depend on MMU ARM: 8746/1: vfp: Go back to clearing vfp_current_hw_state[]
2018-03-28KVM: PPC: Book3S HV: Use __gfn_to_pfn_memslot() in page fault handlerPaul Mackerras
This changes the hypervisor page fault handler for radix guests to use the generic KVM __gfn_to_pfn_memslot() function instead of using get_user_pages_fast() and then handling the case of VM_PFNMAP vmas specially. The old code missed the case of VM_IO vmas; with this change, VM_IO vmas will now be handled correctly by code within __gfn_to_pfn_memslot. Currently, __gfn_to_pfn_memslot calls hva_to_pfn, which only uses __get_user_pages_fast for the initial lookup in the cases where either atomic or async is set. Since we are not setting either atomic or async, we do our own __get_user_pages_fast first, for now. This also adds code to check for the KVM_MEM_READONLY flag on the memslot. If it is set and this is a write access, we synthesize a data storage interrupt for the guest. In the case where the page is not normal RAM (i.e. page == NULL in kvmppc_book3s_radix_page_fault(), we read the PTE from the Linux page tables because we need the mapping attribute bits as well as the PFN. (The mapping attribute bits indicate whether accesses have to be non-cacheable and/or guarded.) Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
2018-03-27parisc: Fix out of array access in match_pci_device()Helge Deller
As found by the ubsan checker, the value of the 'index' variable can be out of range for the bc[] array: UBSAN: Undefined behaviour in arch/parisc/kernel/drivers.c:655:21 index 6 is out of range for type 'char [6]' Backtrace: [<104fa850>] __ubsan_handle_out_of_bounds+0x68/0x80 [<1019d83c>] check_parent+0xc0/0x170 [<1019d91c>] descend_children+0x30/0x6c [<1059e164>] device_for_each_child+0x60/0x98 [<1019cd54>] parse_tree_node+0x40/0x54 [<1019d86c>] check_parent+0xf0/0x170 [<1019d91c>] descend_children+0x30/0x6c [<1059e164>] device_for_each_child+0x60/0x98 [<1019d938>] descend_children+0x4c/0x6c [<1059e164>] device_for_each_child+0x60/0x98 [<1019cd54>] parse_tree_node+0x40/0x54 [<1019cffc>] hwpath_to_device+0xa4/0xc4 Signed-off-by: Helge Deller <deller@gmx.de> Cc: stable@vger.kernel.org
2018-03-27parisc: Add code generator for Qemu/SeaBIOS machine infoHelge Deller
Qemu now supports emulating PA-RISC machines. For that a forked version of SeaBIOS available at https://github.com/hdeller/seabios-hppa is used which requires some information about the emulated machine. This patch adds code to generate a header file with the necessary information for SeaBIOS. The information is extracted from the firmware the current kernel is running on. Tested on a B160L workstation. Signed-off-by: Helge Deller <deller@gmx.de>
2018-03-27parisc: Fix HPMC handler by increasing size to multiple of 16 bytesHelge Deller
Make sure that the HPMC (High Priority Machine Check) handler is 16-byte aligned and that it's length in the IVT is a multiple of 16 bytes. Otherwise PDC may decide not to call the HPMC crash handler. Signed-off-by: Helge Deller <deller@gmx.de> Cc: stable@vger.kernel.org
2018-03-27parisc: machine_power_off() should call pm_power_off()Helge Deller
Signed-off-by: Helge Deller <deller@gmx.de> Tested-by: Matt Turner <mattst88@gmail.com>
2018-03-27parisc/Kconfig: SMP kernels boot on all machinesHelge Deller
I'm not aware of any machines which won't be able to run our SMP kernel. Refine the Kconfig help text. Signed-off-by: Helge Deller <deller@gmx.de>
2018-03-27parisc: Silence uninitialized variable warning in dbl_to_sgl_fcnvff()Dan Carpenter
Smatch warns that is_tiny can be used uninitialized: arch/parisc/math-emu/fcnvff.c:297 dbl_to_sgl_fcnvff() error: uninitialized symbol 'is_tiny'. This code is very old so that suggests the bug doesn't have a huge affect in real life. But I've read the code and it seems like a reasonable warning. Either way it should be harmless to initialize it to false and silence the static checker warning. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Helge Deller <deller@gmx.de>
2018-03-27parisc: Move various functions and strings to init sectionHelge Deller
Signed-off-by: Helge Deller <deller@gmx.de>
2018-03-27parisc: Convert MAP_TYPE to cover 4 bits on pariscHelge Deller
On parisc we want to be as much as possible compatible to the major architectures like x86. Those architectures have MAP_TYPE defined as 0x0f which covers MAP_SHARED and MAP_PRIVATE and leaves two more bits unused. In contrast, on parisc we have MAP_TYPE defined to 0x03 which covers MAP_SHARED and MAP_PRIVATE only. But we don't have the 2 bits free as x86. Usually that's not a problem, but during the discussions for pmem+dax support the idea came up to use the two remaining bits of MAP_TYPE (on x86 and others) for the new MAP_DIRECT and MAP_SYNC flags. One requirement is, that an old kernel should correctly handle MAP_DIRECT and MAP_SYNC and fail on those if set. This only works if MAP_TYPE has 4 bits. Even though the pmem+dax people now choosed another solution via MAP_SHARED_VALIDATE, let's still proceed to be more compatible to x86 by adding two more bits for future usage. Signed-off-by: Helge Deller <deller@gmx.de> Signed-off-by: John David Anglin <dave.anglin@bell.net>
2018-03-27parisc: Force to various endian types for sparseHelge Deller
Signed-off-by: Helge Deller <deller@gmx.de>
2018-03-28arm64: dts: uniphier: add ethernet node for PXs3Kunihiko Hayashi
Add nodes of the AVE ethernet controller for PXs3 and the boards. This SoC has two controllers. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-03-28ARM: dts: uniphier: add pinctrl groups of ethernet for second instanceKunihiko Hayashi
Add pinctrl groups of ethernet, such as "ether1_rgmii" and "ether1_rmii". These are used for second ethernet instance. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-03-27Merge tag 'mvebu-dt-4.17-spdx' of git://git.infradead.org/linux-mvebu into ↵Arnd Bergmann
next/dt Pull "mvebu SPDX dt for 4.17: from Gregory CLEMENT: convert to the SPDX-License-Identifier for the Kirkwood and the Armada based device tree files. Compared to the series submitted most of the patch have been squashed: the result is grouped by SoC, boards, type of licenses and the patches that were explicitly acked on the mailing list. * tag 'mvebu-dt-4.17-spdx' of git://git.infradead.org/linux-mvebu: arm: dts: kirkwood*.dts: use SPDX-License-Identifier for board using GPL-2.0+ arm: dts: kirkwood*.dts: use SPDX-License-Identifier for boards using GPL-2.0+/MIT arm: dts: kirkwood*.dts: use SPDX-License-Identifier for boards using GPL-2.0 arm: dts: armada-385-turris-omnia: use SPDX-License-Identifier arm: dts: armada-385-db-ap: use SPDX-License-Identifier arm: dts: armada-388-rd: use SPDX-License-Identifier arm: dts: armada-xp-db-xc3-24g4xg: use SPDX-License-Identifier arm: dts: armada-xp-db-dxbc2: use SPDX-License-Identifier arm: dts: armada-370-db: use SPDX-License-Identifier arm: dts: armada-*.dts: use SPDX-License-Identifier for most of the Armada based board arm: dts: armada-xp-98dx: use SPDX-License-Identifier for prestara 98d SoCs arm: dts: armada-*.dtsi: use SPDX-License-Identifier for most of the Armada SoCs
2018-03-27Merge tag 'mvebu-dt-4.17-2' of git://git.infradead.org/linux-mvebu into next/dtArnd Bergmann
Pull "mvebu dt for 4.17 (part 2)" from Gregory CLEMENT: - add SFP module support on the clearfog (Armada 388 based board) - disable internal RTC node for Linksys boards (Armada 38x based boards) * tag 'mvebu-dt-4.17-2' of git://git.infradead.org/linux-mvebu: ARM: dts: armada388-clearfog: add SFP module support ARM: dts: armada-385-linksys: Disable internal RTC
2018-03-27Merge tag 'omap-for-v4.17/soc-pt2-signed' of ↵Arnd Bergmann
ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc Pull "Two omap5 specific aux control module patches for v4.17" from Tony Lindgren: On omap5 there is an aux control module that we are not handling currently for clocks, so let's add support for it. * tag 'omap-for-v4.17/soc-pt2-signed' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: OMAP5: control: add support for control module wkup pad config ARM: omap2+: control: add support for auxiliary control module instances
2018-03-27Merge tag 'samsung-soc-4.17-2' of ↵Arnd Bergmann
ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/soc Pull "Samsung mach/soc changes for v4.17, part two" from Krzysztof Kozłowski: 1. Fix coupled CPU idle freeze on Exynos4210. 2. Simplify hot-path in coupled CPU idle. * tag 'samsung-soc-4.17-2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/krzk/linux: ARM: EXYNOS: Simplify code in coupled CPU idle hot path ARM: EXYNOS: Fix coupled CPU idle freeze on Exynos4210
2018-03-27Merge tag 'renesas-soc-for-v4.17' of ↵Arnd Bergmann
ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc Pull "Renesas ARM Based SoC Updates for v4.17" from Simon Horman: 01d675f159e0 ARM: shmobile: rcar-gen2: Add watchdog support 58adf1ba0d22 ARM: shmobile: Add watchdog support * SoC - Identify R-Car V3H (r8a77980) and M3N (r8a77965) - Enable R-Car Gen2 regulator quirk for Stout board with H3 (r8a7790) SoC Marek Vaust says "Regulator setup is suboptimal on H2 Stout too. The Stout newly has two DA9210 regulators, so the quirk is extended to handle another DA9210 at i2c address 0x70." - Add watchdog support This is the SoC portion of the following solution. It is not yet enabled in DT as it is not functional without clock dependencies in place. Fabrizio Castro says "this series has been around for some time as RFC, and it has collected useful comments from the community along the way. The solution proposed by this patch set works for most R-Car Gen2 and RZ/G1 devices, but not all of them. We now know that for some R-Car Gen2 early revisions there is no proper software fix. Anyway, no product has been built around early revisions, but development boards mounting early revisions (basically prototypes) are still out there. As a result, this series isn't enabling the internal watchdog on R-Car Gen2 boards, developers may enable it in board specific device trees if needed. This series has been tested by me on the iwg20d, iwg22d, Lager, Alt, and Koelsch boards. The problem =========== To deal with SMP on R-Car Gen2 and RZ/G1, we install a reset vector to ICRAM1 and we program the [S]BAR registers so that when we turn ON the non-boot CPUs they are redirected to the reset vector installed by Linux in ICRAM1, and eventually they continue the execution to RAM, where the SMP bring-up code will take care of the rest. The content of the [S]BAR registers survives a watchdog triggered reset, and as such after the watchdog fires the boot core will try and execute the SMP bring-up code instead of jumping to the bootrom code. The fix ======= The main strategy for the solution is to let the reset vector decide if it needs to jump to shmobile_boot_fn or to the bootrom code. In a watchdog triggered reset scenario, since the [S]BAR registers keep their values, the boot CPU will jump into the newly designed reset vector, the assembly routine will eventually test WOVF (a bit in register RWTCSRA that indicates if the watchdog counter has overflown, the value of this bit gets retained in this scenario), and jump to the bootrom code which will in turn load up the bootloader, etc. When bringing up SMP or using CPU hotplug, the reset vector will jump to shmobile_boot_fn instead." * R-Car Rst - Add support for R-Car V3H (r8a77980) and V3H (r8a77980) * R-Car SYSC - Mark rcar_sysc_matches[] __initconst Geert Uytterhoeven says "This frees another 1764 bytes (arm32/shmobile_defconfig) or 1000 bytes (arm64/renesas_defconfig) of memory after kernel init." - Fix power area parents Sergei Shtylyov says "According to the figure 9.2(b) of the R-Car Series, 3rd Generation User’s Manual: Hardware Rev. 0.80 the A2IRn and A2SCn power areas in R8A77970 have the A3IR area as a parent, thus the SYSC driver has those parents wrong.." - Add support for R-Car V3H (r8a77980) and V3H (r8a77980) * tag 'renesas-soc-for-v4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: rcar-gen2: Add watchdog support ARM: shmobile: Add watchdog support ARM: shmobile: rcar-gen2: Fix error check in regulator quirk soc: renesas: rcar-rst: Add support for R-Car M3-N ARM: shmobile: stout: enable R-Car Gen2 regulator quirk soc: renesas: rcar-sysc: Add R-Car M3-N support soc: renesas: Identify R-Car M3-N soc: renesas: rcar-sysc: add R8A77980 support dt-bindings: power: add R8A77980 SYSC power domain definitions soc: renesas: r8a77970-sysc: fix power area parents soc: renesas: rcar-rst: Enable watchdog as reset trigger for Gen2 soc: renesas: rcar-rst: add R8A77980 support soc: renesas: identify R-Car V3H soc: renesas: rcar-sysc: Mark rcar_sysc_matches[] __initconst
2018-03-27arm: dts: kirkwood*.dts: use SPDX-License-Identifier for board using GPL-2.0+Gregory CLEMENT
Follow the recent trend for the license description Acked-by: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2018-03-27arm: dts: kirkwood*.dts: use SPDX-License-Identifier for boards using ↵Gregory CLEMENT
GPL-2.0+/MIT Follow the recent trend for the license description, and also fix the wrongly stated X11 to MIT. As already pointed on the DT ML, the X11 license text [1] is explicitly for the X Consortium and has a couple of extra clauses. The MIT license text [2] is actually what the current DT files claim. [1] https://spdx.org/licenses/X11.html [2] https://spdx.org/licenses/MIT.html Acked-by: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2018-03-27arm: dts: kirkwood*.dts: use SPDX-License-Identifier for boards using GPL-2.0Gregory CLEMENT
Follow the recent trend for the license description Acked-by: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2018-03-27Merge tag 'sunxi-core-for-4.17' of ↵Arnd Bergmann
ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/soc Pull "Allwinner core changes for 4.17" from Maxime Ripard: Here is our bunch of changes for mach-sunxi for this release cycle. This is basically only about bringing the SMP support to the A80, which has a bug in hardware and cannot use PSCI like the other SoCs we have. * tag 'sunxi-core-for-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: ARM: sunxi: mc-smp: Split out SoC-specific device node lookup sequence ARM: sunxi: mc-smp: Use DT enable-method for sun9i A80 SMP ARM: sunxi: mc-smp: Fix "lookback" typo ARM: sun9i: smp: Support cpu0 hotplug dt-bindings: ARM: sunxi: Document A80 SoC secure SRAM usage by SMP hotplug ARM: sun9i: smp: Support CPU/cluster power down and hotplugging for cpu1~7 ARM: sun9i: Support SMP bring-up on A80
2018-03-27ARM: multi_v7_defconfig: add NXP FlexCAN IP supportStefan Agner
Enable FlexCAN support as module by default. FlexCAN can be found on various NXP designs such as the i.MX and Vybrid SoC family. Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2018-03-27ARM: multi_v7_defconfig: enable thermal driver for i.MX devicesStefan Agner
Enable the i.MX thermal driver required for i.MX SoC family. Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2018-03-27ARM: multi_v7_defconfig: add RN5T618 PMIC family supportStefan Agner
This allows to successfully boot Colibri iMX7 which is using the Ricoh RN5T567 PMIC. Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2018-03-27ARM: multi_v7_defconfig: add NXP graphics driversStefan Agner
Enable drivers to support NXP graphics IPs such as: - Etnaviv (e.g. i.MX6) - DCU (e.g. Vybrid LS1021A) - mxsfb (e.g. i.MX6UL/ULL/7) Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2018-03-27ARM: multi_v7_defconfig: add GPMI NAND controller supportStefan Agner
Add GPMI NAND controller support as required by some NXP i.MX6/7 based boards. Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2018-03-27ARM: multi_v7_defconfig: add OCOTP driver for NXP SoCsStefan Agner
Enable on-chip OTP NVMEM support for NXP i.MX and VF610 SoCs. Since OTP values might be required by drivers required during boot, make sure the driver is built-in (e.g. i.MX thermal driver). Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2018-03-27ARM: multi_v7_defconfig: configure I2C driver built-inStefan Agner
PMIC often require the I2C bus, and the PMIC regulators might be necessary to power on eMMC/SD-card or other supplies required for successful boot. Make sure I2C driver for i.MX devices is built-in. Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2018-03-27arm64: defconfig: add CONFIG_UNIPHIER_THERMAL and CONFIG_SNI_AVEKunihiko Hayashi
Enable the thermal monitor driver and the AVE ethernet driver implemented on UniPhier SoCs. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2018-03-27Merge tag 'stratix10_defconfig_for_v4.17' of ↵Arnd Bergmann
ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into next/soc Pull "ARM64: stratix10: defconfig updates for 4.17" from Dinh Nguyen: -enables STMMAC_ETH controller that is present on Stratix10 * tag 'stratix10_defconfig_for_v4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux: arm64: defconfig: enable stmmac ethernet to defconfig Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2018-03-27Merge tag 'omap-for-v4.17/defconfig-pt2-signed' of ↵Arnd Bergmann
ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc Pull "Second set of defconfig changes for omap variants for v4.17" from Tony Lindgren: This series enables more devices working on droid4 to make it easier for people and distros to use out of the box. * tag 'omap-for-v4.17/defconfig-pt2-signed' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: multi_v7_defconfig: Enable CPCAP related options mostly as loadable modules ARM: omap2plus_defconfig: Add UINPUT ARM: omap2plus_defconfig: Enable MDM6600 USB PHY ARM: omap2plus_defconfig: Add AUDIO_GRAPH_CARD ARM: omap2plus_defconfig: Enable PWM_VIBRA
2018-03-27Merge tag 'qcom-arm64-defconfig-for-4.17' of ↵Arnd Bergmann
ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/soc Pull "Qualcomm ARM64 Based defconfig Updates for v4.17" from Andy Gross: * Enable cpufreq governors, QCOM TSENS, and QCOM APCS driver * tag 'qcom-arm64-defconfig-for-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/agross/linux: arm64: defconfig: enable more cpufreq governors arm64: defconfig: enable thermal sensor on QCOM platforms arm64: defconfig: Enable the APCS IPC driver on Qualcomm platforms Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2018-03-27Merge tag 'armsoc-versatile-drm-defconfig' of ↵Arnd Bergmann
ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into next/soc Pull "defconfig changes for Versatile DRM" from Linus Walleij: This augments the RealView and Versatile defconfig to use the PL111 DRM driver rather than the old fbdev driver. * tag 'armsoc-versatile-drm-defconfig' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator: ARM: defconfig: Configure Versatile boards to use PL111 DRM ARM: defconfig: Update Versatile defconfig ARM: defconfig: Switch RealView boards to use P111 DRM ARM: defconfig: Update RealView defconfig
2018-03-27Merge tag 'amlogic-defconfig' of ↵Arnd Bergmann
ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/soc Pull "Amlogic defconfig fixes for v4.17" from Kevin Hilman * tag 'amlogic-defconfig' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: arm64: defconfig: enable MESON EFUSE
2018-03-27arm: dts: armada-385-turris-omnia: use SPDX-License-IdentifierGregory CLEMENT
Follow the recent trend for the license description, and also fix the wrongly stated X11 to MIT. As already pointed on the DT ML, the X11 license text [1] is explicitly for the X Consortium and has a couple of extra clauses. The MIT license text [2] is actually what the current DT files claim. [1] https://spdx.org/licenses/X11.html [2] https://spdx.org/licenses/MIT.html Cc: Uwe Kleine-König <uwe@kleine-koenig.org> Acked-by: Uwe Kleine-König <uwe@kleine-koenig.org> Acked-by: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2018-03-27arm: dts: armada-385-db-ap: use SPDX-License-IdentifierGregory CLEMENT
Follow the recent trend for the license description, and also fix the wrongly stated X11 to MIT. As already pointed on the DT ML, the X11 license text [1] is explicitly for the X Consortium and has a couple of extra clauses. The MIT license text [2] is actually what the current DT files claim. [1] https://spdx.org/licenses/X11.html [2] https://spdx.org/licenses/MIT.html Cc: Maxime Ripard <maxime.ripard@bootlin.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Acked-by: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2018-03-27arm: dts: armada-388-rd: use SPDX-License-IdentifierGregory CLEMENT
Follow the recent trend for the license description, and also fix the wrongly stated X11 to MIT. As already pointed on the DT ML, the X11 license text [1] is explicitly for the X Consortium and has a couple of extra clauses. The MIT license text [2] is actually what the current DT files claim. [1] https://spdx.org/licenses/X11.html [2] https://spdx.org/licenses/MIT.html Cc: Gregory CLEMENT <gregory.clement@bootlin.com> Acked-by: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2018-03-27arm: dts: armada-xp-db-xc3-24g4xg: use SPDX-License-IdentifierGregory CLEMENT
Follow the recent trend for the license description, and also fix the wrongly stated X11 to MIT. As already pointed on the DT ML, the X11 license text [1] is explicitly for the X Consortium and has a couple of extra clauses. The MIT license text [2] is actually what the current DT files claim. [1] https://spdx.org/licenses/X11.html [2] https://spdx.org/licenses/MIT.html Cc: Chris Packham <chris.packham@alliedtelesis.co.nz> Acked-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Acked-by: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2018-03-27arm: dts: armada-xp-db-dxbc2: use SPDX-License-IdentifierGregory CLEMENT
Follow the recent trend for the license description, and also fix the wrongly stated X11 to MIT. As already pointed on the DT ML, the X11 license text [1] is explicitly for the X Consortium and has a couple of extra clauses. The MIT license text [2] is actually what the current DT files claim. [1] https://spdx.org/licenses/X11.html [2] https://spdx.org/licenses/MIT.html Cc: Chris Packham <chris.packham@alliedtelesis.co.nz> Acked-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Acked-by: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2018-03-27arm: dts: armada-370-db: use SPDX-License-IdentifierGregory CLEMENT
Follow the recent trend for the license description, and also fix the wrongly stated X11 to MIT. As already pointed on the DT ML, the X11 license text [1] is explicitly for the X Consortium and has a couple of extra clauses. The MIT license text [2] is actually what the current DT files claim. [1] https://spdx.org/licenses/X11.html [2] https://spdx.org/licenses/MIT.html Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Acked-by: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
generated by cgit (git 2.34.1) at 2025-09-14 15:05:05 +0000