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2021-10-23ARM: dts: ipq4019-ap.dk01.1-c1: add device compatible in the dtsDavid Heidelberg
Version dk01.1-c1 didn't have compatible specified, which was causing dt-schema validation warnings. Remove duplicated and useless board compatible from dtsi between board and device. Signed-off-by: David Heidelberg <david@ixit.cz> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211009193102.76852-2-david@ixit.cz
2021-10-23ARM: dts: qcom: apq8026-lg-lenok: rename board vendorLuca Weiss
In order to avoid having prefixes for multiple internal divisions of LG use the "lg" prefix instead of "lge". Fixes: ad3f04b7bef6 ("ARM: dts: qcom: Add support for LG G Watch R") Signed-off-by: Luca Weiss <luca@z3ntu.xyz> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210928203815.77175-2-luca@z3ntu.xyz
2021-10-23ARM: dts: qcom: sdx55: Drop '#clock-cells' from QMP PHY nodeShawn Guo
'#clock-cells' is a required property of QMP PHY child node, not itself. Drop it to fix the dtbs_check warnings below. qcom-sdx55-t55.dt.yaml: phy@ff6000: '#clock-cells' does not match any of the regexes: '^phy@[0-9a-f]+$', 'pinctrl-[0-9]+' qcom-sdx55-mtp.dt.yaml: phy@ff6000: '#clock-cells' does not match any of the regexes: '^phy@[0-9a-f]+$', 'pinctrl-[0-9]+' qcom-sdx55-telit-fn980-tlb.dt.yaml: phy@ff6000: '#clock-cells' does not match any of the regexes: '^phy@[0-9a-f]+$', 'pinctrl-[0-9]+' Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210929034253.24570-11-shawn.guo@linaro.org
2021-10-23arm64: dts: qcom: qrb5165-rb5: Add msm-id and board-idAmit Pundir
Add qcom,msm-id and qcom,board-id for Robotics Board RB5. This will help us boot the device with newer Android boot image header versions, which package dtb separately instead of the default Image.gz-dtb (appended dtb) format. Signed-off-by: Amit Pundir <amit.pundir@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210930185742.117928-2-amit.pundir@linaro.org
2021-10-23arm64: dts: qcom: sdm845-db845c: Add msm-id and board-idAmit Pundir
Add qcom,msm-id and qcom,board-id for Dragonboard 845c. This will help us boot the device with newer Android boot image header versions, which package dtb separately instead of the default Image.gz-dtb (appended dtb) format. Signed-off-by: Amit Pundir <amit.pundir@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210930185742.117928-1-amit.pundir@linaro.org
2021-10-23arm64: dts: qcom: sdm845: Move gpio.h inclusion to SoC DTSIKonrad Dybcio
Almost any board that boots and has a way to interact with it (say for the rare cases of just-pstore or let's-rely-on-bootloader-setup) needs to set some GPIOs, so it makes no sense to include gpio.h separately each time. Hence move it to SoC DTSI. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211002001358.45920-6-konrad.dybcio@somainline.org
2021-10-23arm64: dts: qcom: sdm845: Add size/address-cells to dsi[01]Konrad Dybcio
Add the aforementioned properties in the SoC DTSI so that everybody doesn't have to copy that into their device DTs, effectively reducing code duplication. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211002001358.45920-5-konrad.dybcio@somainline.org
2021-10-23arm64: dts: qcom: sdm845: Don't disable MDP explicitlyKonrad Dybcio
DPU/MDSS is borderline useless without MDP, so disabling both of them makes little sense. With this change, enabling mdss will be enough. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211002001358.45920-4-konrad.dybcio@somainline.org
2021-10-23arm64: dts: qcom: sdm845: Disable Adreno, modem and Venus by defaultKonrad Dybcio
Components that rely on proprietary (not to mention signed!) firmware should not be enabled by default, as lack of the aforementioned firmware could cause various issues, from random errors to straight-up failing to boot. Re-enable these remote processors on boards that didn't previously explicitly disable them. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Tested-By: Steev Klimaszewski <steev@kali.org> [bjorn: Added missing changes to db845c and lenovo-yoga-c630 to the patch] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211002001358.45920-3-konrad.dybcio@somainline.org
2021-10-23arm64: dts: qcom: sdm845: Add XO clock to SDHCIKonrad Dybcio
Add the missing XO clock to the SDHCI controller. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211002001358.45920-2-konrad.dybcio@somainline.org
2021-10-23ARM: dts: qcom: msm8916-samsung-serranove: Include dts from arm64Stephan Gerhold
After adding all necessary support for MSM8916 SMP/cpuidle without PSCI on ARM32, build the Samsung Galaxy S4 Mini VE device tree from the arm64 tree together with the ARM32 include to allow booting this device on ARM32. The approach to include device tree files from other architectures is inspired from e.g. the Raspberry Pi (bcm2711-rpi-4-b.dts) where this is used to build the device tree for both ARM32 and ARM64. Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211004204955.21077-15-stephan@gerhold.net
2021-10-23ARM: dts: qcom: msm8916: Add include for SMP without PSCI on ARM32Stephan Gerhold
Add a special device tree include for MSM8916 on ARM32 that sets up SMP and cpuidle without PSCI. This is meant for devices with signed firmware that does not support PSCI and only allows booting ARM32 kernels. Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211004204955.21077-14-stephan@gerhold.net
2021-10-23arm64: dts: qcom: msm8916: Add CPU ACC and SAW/SPMStephan Gerhold
Add the device tree nodes necessary for SMP bring-up and cpuidle without PSCI on ARM32. The hardware is typically controlled by the PSCI implementation in the TrustZone firmware and is therefore marked as status = "reserved" by default (from the device tree specification): "Indicates that the device is operational, but should not be used. Typically this is used for devices that are controlled by another software component, such as platform firmware." Since this is part of the MSM8916 SoC it should be added to msm8916.dtsi but in practice these nodes should only get enabled via an extra include on ARM32. This is necessary for some devices with signed firmware which is missing both ARM64 and PSCI support and can therefore only boot ARM32 kernels. Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211004204955.21077-13-stephan@gerhold.net
2021-10-23ARM: qcom: Add ARCH_MSM8916 for MSM8916 on ARM32Stephan Gerhold
Add a CONFIG_ARCH_MSM8916 option to enable building MSM8916 support on ARM32. Note that since ARM64 is the main supported architecture for MSM8916 this is only intended for testing and for devices where signed firmware does not allow booting ARM64 kernels. Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211004204955.21077-7-stephan@gerhold.net
2021-10-23arm64: dts: qcom: msm8916-samsung-serranove: Add NFCStephan Gerhold
The LTE version of the S4 Mini VE has a NXP PN547, which is supported by the nxp-nci-i2c driver in mainline. It seems to detect NFC tags using "nfctool" just fine, although more testing is difficult given there seem to be very few useful applications making use of the Linux NFC subsystem. :( Note that for some reason Samsung decided to connect the I2C pins to GPIOs where no hardware I2C bus is available, so we need to fall back to software bit-banging with i2c-gpio. Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211004201921.18526-7-stephan@gerhold.net
2021-10-23arm64: dts: qcom: msm8916-samsung-serranove: Add rt5033 batteryStephan Gerhold
Like the Samsung Galaxy A3/A5, the S4 Mini VE uses a Richtek RT5033 PMIC as battery fuel gauge, charger, flash LED and for some regulators. For now, only add the fuel gauge/battery device to the device tree, so we can check the remaining battery percentage. The other RT5033 drivers need some more work first before they can be used properly. Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211004201921.18526-6-stephan@gerhold.net
2021-10-23arm64: dts: qcom: msm8916-samsung-serranove: Add IMUStephan Gerhold
Add the STMicroelectronics LSM6DS3 IMU that is used in the S4 Mini VE to the device tree. Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211004201921.18526-5-stephan@gerhold.net
2021-10-23arm64: dts: qcom: msm8916-samsung-serranove: Add touch keyStephan Gerhold
Add the CORERIVER TC360 touch key together with the two necessary fixed regulators for it. Note that for some reason Samsung decided to connect this to GPIOs where no hardware I2C bus is available, so we need to fall back to software bit-banging using i2c-gpio. Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211004201921.18526-4-stephan@gerhold.net
2021-10-23arm64: dts: qcom: msm8916-samsung-serranove: Add touch screenStephan Gerhold
Like msm8916-samsung-a3u-eur, the S4 Mini VE uses a Zinitix BT541 touch screen. Add it together with the necessary fixed-regulator to the device tree. Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211004201921.18526-3-stephan@gerhold.net
2021-10-23arm64: dts: qcom: Add device tree for Samsung Galaxy S4 Mini Value EditionStephan Gerhold
The Samsung Galaxy S4 Mini Value Edition is an updated version of the original S4 Mini based on MSM8916. It is similar to the other Samsung devices based on MSM8916 with only a few minor differences. The device tree contains initial support for the S4 Mini Value Edition with: - UART - eMMC/SD card (needs quirk for some reason) - Buttons - Vibrator - WiFi/Bluetooth (WCNSS) - USB Unfortunately, the S4 Mini VE was released with outdated 32-bit only firmware and never received any update from Samsung. Since the 32-bit TrustZone firmware is signed there seems to be no way currently to actually boot this device tree on arm64 Linux at the moment. :( However, it is possible to use this device tree by compiling an ARM32 kernel instead. The device tree can be easily built on ARM32 with an #include and it works really well there. To avoid confusion for others it is still better to add this device tree on arm64. Otherwise it's easy to forget to update this one when making some changes that affect all MSM8916 devices. Maybe someone finds a way to boot ARM64 Linux on this device at some point. In this case I expect that this device tree can be simply used as-is. Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211004201921.18526-2-stephan@gerhold.net
2021-10-23ARM: qcom: Add qcom,msm8916-smp enable-method identical to MSM8226Stephan Gerhold
Unfortunately, some MSM8916 devices have signed firmware without ARM64 and PSCI support and can therefore only boot ARM32 Linux. The ARM Cortex-A53 cores should be actually booted exactly like the Cortex-A7 cores on MSM8226, so just add an alias for the existing code. Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211004204955.21077-9-stephan@gerhold.net
2021-10-23ARM: dts: qcom: mdm9615: fix memory node for Sierra Wireless WP8548David Heidelberg
Specify unit address for the memory node, to match the reg. Signed-off-by: David Heidelberg <david@ixit.cz> [bjorn: Rewrote commit message] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211020234431.298310-1-david@ixit.cz
2021-10-23arm64: dts: qcom: sm7225: Add device tree for Fairphone 4Luca Weiss
Add device tree for the Fairphone 4 smartphone which is based on Snapdragon 750G (sm7225) which is basically sm6350. Currently supported are UART, physical buttons (power & volume), screen (based on simple-framebuffer set up by the bootloader), regulators and USB. Signed-off-by: Luca Weiss <luca@z3ntu.xyz> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211007212444.328034-12-luca@z3ntu.xyz
2021-10-23arm64: dts: qcom: Add SM7225 device treeLuca Weiss
The Snapdragon 750G (sm7225) is software-wise very similar to Snapdragon 690 (sm6350) with minor differences in clock speeds and as added here, it uses the Kryo 570 instead of Kryo 560. Signed-off-by: Luca Weiss <luca@z3ntu.xyz> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211007212444.328034-11-luca@z3ntu.xyz
2021-10-23arm64: dts: qcom: sm6350: add debug uartLuca Weiss
Add the necessary nodes for the debug uart on SM6350. Signed-off-by: Luca Weiss <luca@z3ntu.xyz> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211007212444.328034-8-luca@z3ntu.xyz
2021-10-23arm64: dts: qcom: Add PM6350 PMICLuca Weiss
PM6350 is used in SM6350 and provides similar functionality to other Qualcomm PMICs. Add the pon node with power & volume key and the gpios. Signed-off-by: Luca Weiss <luca@z3ntu.xyz> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211007212444.328034-7-luca@z3ntu.xyz
2021-10-23arm64: dts: qcom: sa8155p-adp: Enable remoteproc capabilitiesBhupesh Sharma
Enable two of the remoteprocs found on SA8155p platform - 'audio and compute'. Also specify firmware path for them. Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210928140929.2549459-3-bhupesh.sharma@linaro.org
2021-10-23arm64: dts: qcom: sm8150: Add fastrpc nodesBhupesh Sharma
Add fastrpc nodes for sDSP, cDSP, and aDSP. Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210928140929.2549459-2-bhupesh.sharma@linaro.org
2021-10-23arm64: dts: qcom: sm8350: Add fastrpc nodesOla Jeppsson
Add fastrpc nodes for sDSP, cDSP, and aDSP. Signed-off-by: Ola Jeppsson <ola@snap.com> Acked-by: Heinrich Fink <hfink@snap.com> Acked-by: Olivier Schonken <oschonken@snapchat.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211018085017.1549494-1-ola@snap.com
2021-10-23x86/fpu: Remove old KVM FPU interfaceThomas Gleixner
No more users. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Borislav Petkov <bp@suse.de> Link: https://lkml.kernel.org/r/20211022185313.074853631@linutronix.de
2021-10-23x86/kvm: Convert FPU handling to a single swap bufferThomas Gleixner
For the upcoming AMX support it's necessary to do a proper integration with KVM. Currently KVM allocates two FPU structs which are used for saving the user state of the vCPU thread and restoring the guest state when entering vcpu_run() and doing the reverse operation before leaving vcpu_run(). With the new fpstate mechanism this can be reduced to one extra buffer by swapping the fpstate pointer in current::thread::fpu. This makes the upcoming support for AMX and XFD simpler because then fpstate information (features, sizes, xfd) are always consistent and it does not require any nasty workarounds. Convert the KVM FPU code over to this new scheme. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Borislav Petkov <bp@suse.de> Link: https://lkml.kernel.org/r/20211022185313.019454292@linutronix.de
2021-10-23x86/fpu: Provide infrastructure for KVM FPU cleanupThomas Gleixner
For the upcoming AMX support it's necessary to do a proper integration with KVM. Currently KVM allocates two FPU structs which are used for saving the user state of the vCPU thread and restoring the guest state when entering vcpu_run() and doing the reverse operation before leaving vcpu_run(). With the new fpstate mechanism this can be reduced to one extra buffer by swapping the fpstate pointer in current::thread::fpu. This makes the upcoming support for AMX and XFD simpler because then fpstate information (features, sizes, xfd) are always consistent and it does not require any nasty workarounds. Provide: - An allocator which initializes the state properly - A replacement for the existing FPU swap mechanim Aside of the reduced memory footprint, this also makes state switching more efficient when TIF_FPU_NEED_LOAD is set. It does not require a memcpy as the state is already correct in the to be swapped out fpstate. The existing interfaces will be removed once KVM is converted over. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Borislav Petkov <bp@suse.de> Link: https://lkml.kernel.org/r/20211022185312.954684740@linutronix.de
2021-10-23x86/fpu: Prepare for sanitizing KVM FPU codeThomas Gleixner
For the upcoming AMX support it's necessary to do a proper integration with KVM. To avoid more nasty hackery in KVM which violate encapsulation extend struct fpu and fpstate so the fpstate switching can be consolidated and simplified. Currently KVM allocates two FPU structs which are used for saving the user state of the vCPU thread and restoring the guest state when entering vcpu_run() and doing the reverse operation before leaving vcpu_run(). With the new fpstate mechanism this can be reduced to one extra buffer by swapping the fpstate pointer in current::thread::fpu. This makes the upcoming support for AMX and XFD simpler because then fpstate information (features, sizes, xfd) are always consistent and it does not require any nasty workarounds. Add fpu::__task_fpstate to save the regular fpstate pointer while the task is inside vcpu_run(). Add some state fields to fpstate to indicate the nature of the state. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Borislav Petkov <bp@suse.de> Link: https://lkml.kernel.org/r/20211022185312.896403942@linutronix.de
2021-10-22bpf: Define bpf_jit_alloc_exec_limit for arm64 JITLorenz Bauer
Expose the maximum amount of useable memory from the arm64 JIT. Signed-off-by: Lorenz Bauer <lmb@cloudflare.com> Signed-off-by: Alexei Starovoitov <ast@kernel.org> Link: https://lore.kernel.org/bpf/20211014142554.53120-3-lmb@cloudflare.com
2021-10-22bpf: Define bpf_jit_alloc_exec_limit for riscv JITLorenz Bauer
Expose the maximum amount of useable memory from the riscv JIT. Signed-off-by: Lorenz Bauer <lmb@cloudflare.com> Signed-off-by: Alexei Starovoitov <ast@kernel.org> Acked-by: Luke Nelson <luke.r.nels@gmail.com> Acked-by: Björn Töpel <bjorn@kernel.org> Link: https://lore.kernel.org/bpf/20211014142554.53120-2-lmb@cloudflare.com
2021-10-22Merge tag 'aspeed-5.16-devicetree-2' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc into arm/dt ASPEED device tree updates for 5.16, round 2 - New machines: * Inventec Transformers, an x86 family server with an AST2600 BMC - Updates to the Everest and Rainier sensors, gpios and KCS devices - New UART routing device tree description * tag 'aspeed-5.16-devicetree-2' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc: ARM: dts: aspeed: Add uart routing to device tree ARM: dts: aspeed: rainier: Enable earlycon ARM: dts: aspeed: rainier: Add front panel LEDs ARM: dts: aspeed: rainier: Add 'factory-reset-toggle' as GPIOF6 ARM: dts: aspeed: rainier: Remove PSU gpio-keys ARM: dts: aspeed: rainier: Remove gpio hog for GPIOP7 ARM: dts: aspeed: rainier: Add eeprom on bus 12 ARM: dts: aspeed: p10bmc: Enable KCS channel 2 ARM: dts: aspeed: p10bmc: Use KCS 3 for MCTP binding ARM: dts: aspeed: Adding Inventec Transformers BMC ARM: dts: aspeed: everest: Fix bus 15 muxed eeproms ARM: dts: aspeed: everest: Add IBM Operation Panel I2C device ARM: dts: aspeed: everest: Add I2C switch on bus 8 ARM: dts: aspeed: rainier and everest: Remove PCA gpio specification ARM: dts: aspeed: p10bmc: Fix ADC iio-hwmon battery node name Link: https://lore.kernel.org/r/CACPK8Xd=eAMk-S3akhGgL4i_K190Nz9t=_CrdHQMJ+nbW172mg@mail.gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-22Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvmLinus Torvalds
Pull more x86 kvm fixes from Paolo Bonzini: - Cache coherency fix for SEV live migration - Fix for instruction emulation with PKU - fixes for rare delaying of interrupt delivery - fix for SEV-ES buffer overflow * tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: KVM: SEV-ES: go over the sev_pio_data buffer in multiple passes if needed KVM: SEV-ES: keep INS functions together KVM: x86: remove unnecessary arguments from complete_emulator_pio_in KVM: x86: split the two parts of emulator_pio_in KVM: SEV-ES: clean up kvm_sev_es_ins/outs KVM: x86: leave vcpu->arch.pio.count alone in emulator_pio_in_out KVM: SEV-ES: rename guest_ins_data to sev_pio_data KVM: SEV: Flush cache on non-coherent systems before RECEIVE_UPDATE_DATA KVM: MMU: Reset mmu->pkru_mask to avoid stale data KVM: nVMX: promptly process interrupts delivered while in guest mode KVM: x86: check for interrupts before deciding whether to exit the fast path
2021-10-22kvm: x86: Remove stale declaration of kvm_no_apic_vcpuJim Mattson
This variable was renamed to kvm_has_noapic_vcpu in commit 6e4e3b4df4e3 ("KVM: Stop using deprecated jump label APIs"). Signed-off-by: Jim Mattson <jmattson@google.com> Message-Id: <20211021185449.3471763-1-jmattson@google.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-10-22KVM: VMX: Unregister posted interrupt wakeup handler on hardware unsetupSean Christopherson
Unregister KVM's posted interrupt wakeup handler during unsetup so that a spurious interrupt that arrives after kvm_intel.ko is unloaded doesn't call into freed memory. Fixes: bf9f6ac8d749 ("KVM: Update Posted-Interrupts Descriptor when vCPU is blocked") Cc: stable@vger.kernel.org Signed-off-by: Sean Christopherson <seanjc@google.com> Message-Id: <20211009001107.3936588-3-seanjc@google.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-10-22x86/irq: Ensure PI wakeup handler is unregistered before module unloadSean Christopherson
Add a synchronize_rcu() after clearing the posted interrupt wakeup handler to ensure all readers, i.e. in-flight IRQ handlers, see the new handler before returning to the caller. If the caller is an exiting module and is unregistering its handler, failure to wait could result in the IRQ handler jumping into an unloaded module. The registration path doesn't require synchronization, as it's the caller's responsibility to not generate interrupts it cares about until after its handler is registered. Fixes: f6b3c72c2366 ("x86/irq: Define a global vector for VT-d Posted-Interrupts") Cc: stable@vger.kernel.org Signed-off-by: Sean Christopherson <seanjc@google.com> Message-Id: <20211009001107.3936588-2-seanjc@google.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-10-22sched,x86: Fix L2 cache maskPeter Zijlstra
Currently AMD/Hygon do not populate l2c_id, this means that for SMT enabled systems they report an L2 per thread. This is ofcourse not true but was harmless so far. However, since commit: 66558b730f25 ("sched: Add cluster scheduler level for x86") the scheduler topology setup requires: SMT <= L2 <= LLC Which leads to noisy warnings and possibly weird behaviour on affected chips. Therefore change the topology generation such that if l2c_id is not populated it follows the SMT topology, thereby satisfying the constraint. Fixes: 66558b730f25 ("sched: Add cluster scheduler level for x86") Reported-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Tested-by: Tom Lendacky <thomas.lendacky@amd.com>
2021-10-22ARM: Recover kretprobe modified return address in stacktraceMasami Hiramatsu
Since the kretprobe replaces the function return address with the kretprobe_trampoline on the stack, arm unwinder shows it instead of the correct return address. This finds the correct return address from the per-task kretprobe_instances list and verify it is in between the caller fp and callee fp. Note that this supports both GCC and clang if CONFIG_FRAME_POINTER=y and CONFIG_ARM_UNWIND=n. For the ARM unwinder, this is still not working correctly. Signed-off-by: Masami Hiramatsu <mhiramat@kernel.org> Signed-off-by: Steven Rostedt (VMware) <rostedt@goodmis.org>
2021-10-22ARM: kprobes: Make a frame pointer on __kretprobe_trampolineMasami Hiramatsu
Currently kretprobe on ARM just fills r0-r11 of pt_regs, but that is not enough for the stacktrace. Moreover, from the user kretprobe handler, stacktrace needs a frame pointer on the __kretprobe_trampoline. This adds a frame pointer on __kretprobe_trampoline for both gcc and clang case. Those have different frame pointer so we need different but similar stack on pt_regs. Gcc makes the frame pointer (fp) to point the 'pc' address of the {fp, ip (=sp), lr, pc}, this means {r11, r13, r14, r15}. Thus if we save the r11 (fp) on pt_regs->r12, we can make this set on the end of pt_regs. On the other hand, Clang makes the frame pointer to point the 'fp' address of {fp, lr} on stack. Since the next to the pt_regs->lr is pt_regs->sp, I reused the pair of pt_regs->fp and pt_regs->ip. So this stores the 'lr' on pt_regs->ip and make the fp to point pt_regs->fp. For both cases, saves __kretprobe_trampoline address to pt_regs->lr, so that the stack tracer can identify this frame pointer has been made by the __kretprobe_trampoline. Note that if the CONFIG_FRAME_POINTER is not set, this keeps fp as is. Signed-off-by: Masami Hiramatsu <mhiramat@kernel.org> Reviewed-by: Nick Desaulniers <ndesaulniers@google.com> Signed-off-by: Steven Rostedt (VMware) <rostedt@goodmis.org>
2021-10-22ARM: clang: Do not rely on lr register for stacktraceMasami Hiramatsu
Currently the stacktrace on clang compiled arm kernel uses the 'lr' register to find the first frame address from pt_regs. However, that is wrong after calling another function, because the 'lr' register is used by 'bl' instruction and never be recovered. As same as gcc arm kernel, directly use the frame pointer (r11) of the pt_regs to find the first frame address. Note that this fixes kretprobe stacktrace issue only with CONFIG_UNWINDER_FRAME_POINTER=y. For the CONFIG_UNWINDER_ARM, we need another fix. Signed-off-by: Masami Hiramatsu <mhiramat@kernel.org> Reviewed-by: Nick Desaulniers <ndesaulniers@google.com> Signed-off-by: Steven Rostedt (VMware) <rostedt@goodmis.org>
2021-10-22arm64: Recover kretprobe modified return address in stacktraceMasami Hiramatsu
Since the kretprobe replaces the function return address with the kretprobe_trampoline on the stack, stack unwinder shows it instead of the correct return address. This checks whether the next return address is the __kretprobe_trampoline(), and if so, try to find the correct return address from the kretprobe instance list. For this purpose this adds 'kr_cur' loop cursor to memorize the current kretprobe instance. With this fix, now arm64 can enable CONFIG_ARCH_CORRECT_STACKTRACE_ON_KRETPROBE, and pass the kprobe self tests. Signed-off-by: Masami Hiramatsu <mhiramat@kernel.org> Acked-by: Will Deacon <will@kernel.org> Signed-off-by: Steven Rostedt (VMware) <rostedt@goodmis.org>
2021-10-22arm64: kprobes: Make a frame pointer on __kretprobe_trampolineMasami Hiramatsu
Make a frame pointer (make the x29 register points the address of pt_regs->regs[29]) on __kretprobe_trampoline. This frame pointer will be used by the stacktracer when it is called from the kretprobe handlers. In this case, the stack tracer will unwind stack to trampoline_probe_handler() and find the next frame pointer in the stack frame of the __kretprobe_trampoline(). Signed-off-by: Masami Hiramatsu <mhiramat@kernel.org> Acked-by: Will Deacon <will@kernel.org> Signed-off-by: Steven Rostedt (VMware) <rostedt@goodmis.org>
2021-10-22arm64: kprobes: Record frame pointer with kretprobe instanceMasami Hiramatsu
Record the frame pointer instead of stack address with kretprobe instance as the identifier on the instance list. Since arm64 always enable CONFIG_FRAME_POINTER, we can use the actual frame pointer (x29). This will allow the stacktrace code to find the original return address from the FP alone. Signed-off-by: Masami Hiramatsu <mhiramat@kernel.org> Acked-by: Will Deacon <will@kernel.org> Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Steven Rostedt (VMware) <rostedt@goodmis.org>
2021-10-22x86/unwind: Compile kretprobe fixup code only if CONFIG_KRETPROBES=yMasami Hiramatsu
Compile kretprobe related stacktrace entry recovery code and unwind_state::kr_cur field only when CONFIG_KRETPROBES=y. Signed-off-by: Masami Hiramatsu <mhiramat@kernel.org> Signed-off-by: Steven Rostedt (VMware) <rostedt@goodmis.org>
2021-10-22dts: socfpga: Add Mercury+ AA1 devicetreePaweł Anikiel
Add support for the Mercury+ AA1 module for Arria 10 SoC FPGA. Signed-off-by: Paweł Anikiel <pan@semihalf.com> Signed-off-by: Joanna Brozek <jbrozek@antmicro.com> Signed-off-by: Mariusz Glebocki <mglebocki@antmicro.com> Signed-off-by: Tomasz Gorochowik <tgorochowik@antmicro.com> Signed-off-by: Maciej Mikunda <mmikunda@antmicro.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Link: https://lore.kernel.org/r/20211021151736.2096926-2-pan@semihalf.com' Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-22x86/sgx/virt: implement SGX_IOC_VEPC_REMOVE ioctlPaolo Bonzini
For bare-metal SGX on real hardware, the hardware provides guarantees SGX state at reboot. For instance, all pages start out uninitialized. The vepc driver provides a similar guarantee today for freshly-opened vepc instances, but guests such as Windows expect all pages to be in uninitialized state on startup, including after every guest reboot. Some userspace implementations of virtual SGX would rather avoid having to close and reopen the /dev/sgx_vepc file descriptor and re-mmap the virtual EPC. For example, they could sandbox themselves after the guest starts and forbid further calls to open(), in order to mitigate exploits from untrusted guests. Therefore, add a ioctl that does this with EREMOVE. Userspace can invoke the ioctl to bring its vEPC pages back to uninitialized state. There is a possibility that some pages fail to be removed if they are SECS pages, and the child and SECS pages could be in separate vEPC regions. Therefore, the ioctl returns the number of EREMOVE failures, telling userspace to try the ioctl again after it's done with all vEPC regions. A more verbose description of the correct usage and the possible error conditions is documented in sgx.rst. Reviewed-by: Jarkko Sakkinen <jarkko@kernel.org> Reviewed-by: Dave Hansen <dave.hansen@linux.intel.com> Reviewed-by: Sean Christopherson <seanjc@google.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com> Link: https://lkml.kernel.org/r/20211021201155.1523989-3-pbonzini@redhat.com
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