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2011-10-24mfd: remove CONFIG_MFD_SUPPORTArnd Bergmann
We currently have two symbols to control compilation the MFD subsystem, MFD_SUPPORT and MFD_CORE. The MFD_SUPPORT is actually not required at all, it only hides the submenu when not set, with the effect that Kconfig warns about missing dependencies when another driver selects an MFD driver while MFD_SUPPORT is disabled. Turning the MFD submenu back from menuconfig into a plain menu simplifies the Kconfig syntax for those kinds of users and avoids the surprise when the menu suddenly appears because another driver was enabled that selects this symbol. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2011-10-24ARM: imx: use mc13xxx constants instead of mc13783Uwe Kleine-König
The latter constants are going to be removed in favour of the former Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
2011-10-24arm: BeagleBoard: add support for the twl4030-madcKyle Manna
Signed-off-by: Kyle Manna <kyle@kylemanna.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
2011-10-24ARM: CSR: PM: use outer_resume to resume L2 cacheBarry Song
now we move l2x0 resume to Linux from bootloader since l2x0 already has resume support in core. Signed-off-by: Barry Song <Baohua.Song@csr.com>
2011-10-24ARM: CSR: call l2x0_of_init to init L2 cache of SiRFprimaIIBarry Song
Cc: Rob Herring <robherring2@gmail.com> Signed-off-by: Barry Song <Baohua.Song@csr.com>
2011-10-24Merge branch 'l2x0' of rmk tree into prima2-l2x0Barry Song
2011-10-24x86: Fix S4 regressionTakashi Iwai
Commit 4b239f458 ("x86-64, mm: Put early page table high") causes a S4 regression since 2.6.39, namely the machine reboots occasionally at S4 resume. It doesn't happen always, overall rate is about 1/20. But, like other bugs, once when this happens, it continues to happen. This patch fixes the problem by essentially reverting the memory assignment in the older way. Signed-off-by: Takashi Iwai <tiwai@suse.de> Cc: <stable@kernel.org> Cc: Rafael J. Wysocki <rjw@sisk.pl> Cc: Yinghai Lu <yinghai.lu@oracle.com> [ We'll hopefully find the real fix, but that's too late for 3.1 now ] Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2011-10-23ARM: 7133/1: SMP: fix per cpu timer setup before the cpu is marked onlineThomas Gleinxer
The problem is related to the early enabling of interrupts and the per cpu timer setup before the cpu is marked online. This doesn't need to be done in order to call calibrate_delay(). calibrate_delay() monitors jiffies, which are updated from the CPU which is waiting for the new CPU to set the online bit. So simply calibrate_delay() can be called on the new CPU just from the interrupt disabled region and move the local timer setup after stored the cpu data and before enabling interrupts. This solves both the cpu_online vs. cpu_active problem and the affinity setting of the per cpu timers. Signed-off-by: Thomas Gleinxer <tglx@linutronix.de> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-10-23Merge branch 'ppi-irq-core-for-rmk' of ↵Russell King
git://github.com/mzyngier/arm-platforms into devel-stable
2011-10-23ARM: gic, local timers: use the request_percpu_irq() interfaceMarc Zyngier
This patch remove the hardcoded link between local timers and PPIs, and convert the PPI users (TWD, MCT and MSM timers) to the new *_percpu_irq interface. Also some collateral cleanup (local_timer_ack() is gone, and the interrupt handler is strictly private to each driver). PPIs are now useable for more than just the local timers. Additional testing by David Brown (msm8250 and msm8660) and Shawn Guo (imx6q). Cc: David Brown <davidb@codeaurora.org> Cc: Thomas Gleixner <tglx@linutronix.de> Acked-by: David Brown <davidb@codeaurora.org> Tested-by: David Brown <davidb@codeaurora.org> Tested-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2011-10-23ARM: gic: consolidate PPI handlingMarc Zyngier
PPI handling is a bit of an odd beast. It uses its own low level handling code and is hardwired to the local timers (hence lacking a registration interface). Instead, switch the low handling to the normal SPI handling code. PPIs are handled by the handle_percpu_devid_irq flow. This also allows the removal of some duplicated code. Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: David Brown <davidb@codeaurora.org> Cc: Bryan Huntsman <bryanh@codeaurora.org> Cc: Tony Lindgren <tony@atomide.com> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Magnus Damm <magnus.damm@gmail.com> Cc: Thomas Gleixner <tglx@linutronix.de> Acked-by: David Brown <davidb@codeaurora.org> Tested-by: David Brown <davidb@codeaurora.org> Tested-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2011-10-23Merge branch 'samsung-fixes-4' of git://github.com/kgene/linux-samsungLinus Torvalds
* 'samsung-fixes-4' of git://github.com/kgene/linux-samsung: ARM: S3C24XX: Fix s3c24xx build errors if !CONFIG_PM ARM: S5P: fix offset calculation on gpio-interrupt
2011-10-22ARM: 7129/1: Add __arm_ioremap_exec for mapping external memory as MT_MEMORYTony Lindgren
This allows mapping external memory such as SRAM for use. This is needed for some small chunks of code, such as reprogramming SDRAM memory source clocks that can't be executed in SDRAM. Other use cases include some PM related code. Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Acked-by: Andres Salomon <dilinger@queued.net> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-10-22powerpc/cpm: Clear muram before it is in use.Hongjun Chen
We need to ensure that MURAM is in a known and cleared out state before using it as the bootloader could have utilized it from its own purposes and left it in an unknown state. If we don't clear it out we've seen issues with UCC ethernet: * Multi ethernet interfaces can't work simultanously. * Multi up/down Ethernet interfaces will halt these ports. * UCC1 RGMII can't work when kernel boots from some hosts. Signed-off-by: Kai.Jiang <Kai.Jiang@freescale.com> Signed-off-by: Hongjun Chen <Hong-jun.Chen@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-22ARM: 7136/1: pl330: Fix a race conditionJavi Merino
If two requests have been submitted and one of them is running, if you call pl330_chan_ctrl(ch_id, PL330_OP_START), there's a window of time between the spin_lock_irqsave() and the _state() check in which the running transaction may finish. In that case, we don't receive the interrupt (because they are disabled), but _start() sees that the DMA is stopped, so it starts it. The problem is that it sends the transaction that has just finished again, because pl330_update() hasn't mark it as done yet. This patch fixes this race condition by not calling _start() if the DMA is already executing transactions. When interrupts are reenabled, pl330_update() will call _start(). Reference: <1317892206-3600-1-git-send-email-javi.merino@arm.com> Signed-off-by: Javi Merino <javi.merino@arm.com> Acked-by: Jassi Brar <jassi.brar@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-10-22Merge branch 'pm-domains' into pm-for-linusRafael J. Wysocki
* pm-domains: ARM: mach-shmobile: sh7372 A4R support (v4) ARM: mach-shmobile: sh7372 A3SP support (v4) PM / Sleep: Mark devices involved in wakeup signaling during suspend
2011-10-22ARM: mach-shmobile: sh7372 A4R support (v4)Magnus Damm
This change adds support for the sh7372 A4R power domain. The sh7372 A4R hardware power domain contains the SH CPU Core and a set of I/O devices including multimedia accelerators and I2C controllers. One special case about A4R is the INTCS interrupt controller that needs to be saved and restored to keep working as expected. Also the LCDC hardware blocks are in a different hardware power domain but have their IRQs routed only through INTCS. So as long as LCDCs are active we cannot power down INTCS because that would risk losing interrupts. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
2011-10-22ARM: mach-shmobile: sh7372 A3SP support (v4)Magnus Damm
This change adds support for the sh7372 A3SP power domain. The sh7372 A3SP hardware power domain contains a wide range of I/O devices. The list of I/O devices include SCIF serial ports, DMA Engine hardware, SD and MMC controller hardware, USB controllers and I2C master controllers. This patch adds the A3SP low level code which powers the hardware power domain on and off. It also ties in platform devices to the pm domain support code. It is worth noting that the serial console is hooked up to SCIFA0 on most sh7372 boards, and the SCIFA0 port is included in the A3SP hardware power domain. For this reason we cannot output debug messages from the low level power control code in the case of A3SP. QoS support is needed in drivers before we can enable the A3SP power control on the fly. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
2011-10-22ARM: S3C24XX: Fix s3c24xx build errors if !CONFIG_PMDomenico Andreoli
v2: - register_syscore_ops(&s3c24xx_irq_syscore_ops) does not need to be conditionally compiled out, it is already optimized out on !CONFIG_PM - fix also s3c2412 and s3c2416 affected by the same build issue v1: s3c2440.c fails to build if !CONFIG_PM because in such case s3c2410_pm_syscore_ops is not defined. Same error should happen also in s3c2410.c and s3c2442.c Signed-off-by: Domenico Andreoli <cavokz@gmail.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-10-21Merge branch 'depends/rmk/gpio' into next/boardArnd Bergmann
Conflicts: arch/arm/mach-at91/board-usb-a9260.c arch/arm/mach-at91/board-usb-a9263.c arch/arm/mach-tegra/board-paz00.h arch/arm/mach-tegra/board-seaboard.h
2011-10-21Merge branches 'amd/fixes', 'debug/dma-api', 'arm/omap', 'arm/msm', 'core', ↵Joerg Roedel
'iommu/fault-reporting' and 'api/iommu-ops-per-bus' into next Conflicts: drivers/iommu/amd_iommu.c drivers/iommu/iommu.c
2011-10-21iommu/core: Convert iommu_found to iommu_presentJoerg Roedel
With per-bus iommu_ops the iommu_found function needs to work on a bus_type too. This patch adds a bus_type parameter to that function and converts all call-places. The function is also renamed to iommu_present because the function now checks if an iommu is present for a given bus and does not check for a global iommu anymore. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2011-10-21crypto: twofish-x86_64-3way - fix ctr blocksize to 1Jussi Kivilinna
Signed-off-by: Jussi Kivilinna <jussi.kivilinna@mbnet.fi> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2011-10-21crypto: blowfish-x86_64 - fix ctr blocksize to 1Jussi Kivilinna
Signed-off-by: Jussi Kivilinna <jussi.kivilinna@mbnet.fi> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2011-10-21crypto: twofish - add 3-way parallel x86_64 assembler implementionJussi Kivilinna
Patch adds 3-way parallel x86_64 assembly implementation of twofish as new module. New assembler functions crypt data in three blocks chunks, improving cipher performance on out-of-order CPUs. Patch has been tested with tcrypt and automated filesystem tests. Summary of the tcrypt benchmarks: Twofish 3-way-asm vs twofish asm (128bit 8kb block ECB) encrypt: 1.3x speed decrypt: 1.3x speed Twofish 3-way-asm vs twofish asm (128bit 8kb block CBC) encrypt: 1.07x speed decrypt: 1.4x speed Twofish 3-way-asm vs twofish asm (128bit 8kb block CTR) encrypt: 1.4x speed Twofish 3-way-asm vs AES asm (128bit 8kb block ECB) encrypt: 1.0x speed decrypt: 1.0x speed Twofish 3-way-asm vs AES asm (128bit 8kb block CBC) encrypt: 0.84x speed decrypt: 1.09x speed Twofish 3-way-asm vs AES asm (128bit 8kb block CTR) encrypt: 1.15x speed Full output: http://koti.mbnet.fi/axh/kernel/crypto/tcrypt-speed-twofish-3way-asm-x86_64.txt http://koti.mbnet.fi/axh/kernel/crypto/tcrypt-speed-twofish-asm-x86_64.txt http://koti.mbnet.fi/axh/kernel/crypto/tcrypt-speed-aes-asm-x86_64.txt Tests were run on: vendor_id : AuthenticAMD cpu family : 16 model : 10 model name : AMD Phenom(tm) II X6 1055T Processor Also userspace test were run on: vendor_id : GenuineIntel cpu family : 6 model : 15 model name : Intel(R) Xeon(R) CPU E7330 @ 2.40GHz stepping : 11 Userspace test results: Encryption/decryption of twofish 3-way vs x86_64-asm on AMD Phenom II: encrypt: 1.27x decrypt: 1.25x Encryption/decryption of twofish 3-way vs x86_64-asm on Intel Xeon E7330: encrypt: 1.36x decrypt: 1.36x Signed-off-by: Jussi Kivilinna <jussi.kivilinna@mbnet.fi> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2011-10-21crypto: twofish-x86-asm - make assembler functions use twofish_ctx instead ↵Jussi Kivilinna
of crypto_tfm This needed by 3-way twofish patch to be able to easily use one block assembler functions. As glue code is shared between i586/x86_64 apply change to i586 assembler too. Also export assembler functions for 3-way parallel twofish module. CC: Joachim Fritschi <jfritschi@freenet.de> Signed-off-by: Jussi Kivilinna <jussi.kivilinna@mbnet.fi> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2011-10-21crypto: blowfish-x86_64 - add creditsJussi Kivilinna
Signed-off-by: Jussi Kivilinna <jussi.kivilinna@mbnet.fi> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2011-10-21crypto: blowfish-x86_64 - improve x86_64 blowfish 4-way performanceJussi Kivilinna
This patch adds improved F-macro for 4-way parallel functions. With new F-macro for 4-way parallel functions, blowfish sees ~15% improvement in speed tests on AMD Phenom II (~5% on Intel Xeon E7330). However when used in 1-way blowfish function new macro would be ~10% slower than original, so old F-macro is kept for 1-way functions. Patch cleans up old F-macro as it is no longer needed in 4-way part. Patch also does register macro renaming to reduce stack usage. Signed-off-by: Jussi Kivilinna <jussi.kivilinna@mbnet.fi> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2011-10-21ARM: S5P: fix offset calculation on gpio-interruptMarek Szyprowski
Offsets of the irq controller registers were calculated correctly only for first GPIO bank. This patch fixes calculation of the register offsets for all GPIO banks. Reported-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-10-21m68k: drop unused Kconfig symbolsPaul Bolle
Reported-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Paul Bolle <pebolle@tiscali.nl> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-10-21m68k: drop unused Kconfig symbolsPaul Bolle
Signed-off-by: Paul Bolle <pebolle@tiscali.nl> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2011-10-20sparc32: Correct the return value of memcpy.David S. Miller
Properly return the original destination buffer pointer. Signed-off-by: David S. Miller <davem@davemloft.net> Tested-by: Kjetil Oftedal <oftedal@gmail.com>
2011-10-20sparc32: Remove uses of %g7 in memcpy implementation.David S. Miller
This is setting things up so that we can correct the return value, so that it properly returns the original destination buffer pointer. Signed-off-by: David S. Miller <davem@davemloft.net> Tested-by: Kjetil Oftedal <oftedal@gmail.com>
2011-10-20sparc32: Remove non-kernel code from memcpy implementation.David S. Miller
Signed-off-by: David S. Miller <davem@davemloft.net> Tested-by: Kjetil Oftedal <oftedal@gmail.com>
2011-10-20ARM: smp: fix clipping of number of CPUsRussell King
Rather than clipping the number of CPUs using the compile-time NR_CPUS constant, use the runtime nr_cpu_ids value instead. This allows the nr_cpus command line option to work as expected. Cc: <stable@kernel.org> Reported-by: Mark Salter <msalter@redhat.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-10-20ARM: 7137/1: Fix error upon adding LL debugAfzal Mohammed
Upon adding new board LL debug support, if the resultant code addition would not cause PC relative offset of "hexbuf" from "adr r2, hexbuf" (+2) instruction to be representable in a shifted 8-bit value (hence indirectly putting higher aligment requirement on larger offsets), following error occurs, arch/arm/kernel/debug.S: Assembler messages: arch/arm/kernel/debug.S:138: Error: invalid constant (428) after fixup Fix it by bringing "hexbuf" closer so that "adr" can have the offset. Signed-off-by: Afzal Mohammed <afzal@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-10-20Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparcLinus Torvalds
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc: sparc: Add alignment flag to PCI expansion resources sparc: Avoid calling sigprocmask() sparc: Use set_current_blocked() sparc32,leon: SRMMU MMU Table probe fix
2011-10-20Merge branch 'imx/cleanup' into next/cleanupArnd Bergmann
2011-10-20Merge branch 'imx-cleanups-for-arnd' of ↵Arnd Bergmann
git://git.pengutronix.de/git/imx/linux-2.6 into imx/cleanup
2011-10-20Merge branch 'at91/trng' into next/driverArnd Bergmann
2011-10-20Merge branch 'samsung/devel' into next/devel2Arnd Bergmann
2011-10-20Merge branch 'tegra/devel' into next/develArnd Bergmann
2011-10-20Merge branch 'depends/rmk/smp' into tmpArnd Bergmann
2011-10-20Merge branch 'depends/rmk/debug' into tmpArnd Bergmann
2011-10-20Merge branches 'cross-platform/debug_ll' and 'cross-platform/cpu-mapping' ↵Arnd Bergmann
into next/cross-platform
2011-10-20MIPS: Fix build with C=1Aaro Koskinen
When trying to compile the 3.1-rc10 kernel for my MIPS board with C=1 (sparse checking), the build fails early with the error: CHK include/linux/version.h UPD include/linux/version.h CHK include/generated/utsrelease.h UPD include/generated/utsrelease.h Checking missing-syscalls for N32 CALL scripts/checksyscalls.sh Checking missing-syscalls for O32 CALL scripts/checksyscalls.sh CC kernel/bounds.s GEN include/generated/bounds.h CC arch/mips/kernel/asm-offsets.s GEN include/generated/asm-offsets.h CALL scripts/checksyscalls.sh HOSTCC scripts/genksyms/genksyms.o SHIPPED scripts/genksyms/lex.lex.c SHIPPED scripts/genksyms/keywords.hash.c SHIPPED scripts/genksyms/parse.tab.h HOSTCC scripts/genksyms/lex.lex.o SHIPPED scripts/genksyms/parse.tab.c HOSTCC scripts/genksyms/parse.tab.o HOSTLD scripts/genksyms/genksyms /bin/sh: Syntax error: "(" unexpected make[3]: *** [scripts/mod/empty.o] Error 2 make[2]: *** [scripts/mod] Error 2 make[1]: *** [scripts] Error 2 It seems the shell chokes because sparse is called with command line arguments such as: -D__INT8_C(c)='c' Converting these to form: -D'__INT8_C(c)'='c' seems to fix the problem. [ralf@linux-mips.org: This affects builds with gcc 4.5 and newer.] Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/2827/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-10-20MIPS: MSP71xx: Fix build error.Ralf Baechle
After the recent cleanup of the register_*_smp_ops() functions msp71xx wasn't fixed to include the now necessary header resulting in: /home/ralf/src/linux/upstream-linus/arch/mips/pmc-sierra/msp71xx/msp_setup.c: In function ‘prom_init’: /home/ralf/src/linux/upstream-linus/arch/mips/pmc-sierra/msp71xx/msp_setup.c:231:2: error: implicit declaration of function ‘register_vsmp_smp_ops’ [-Werror=implicit-function-declaration] cc1: all warnings being treated as errors Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-10-20MIPS: Don't install vmlinuz if compressed kernel has not been configured.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-10-20MIPS: Netlogic: Specify architecture CFLAGSJayachandran C
Use -march=xlr if available, otherwise fallback to mips64. This allows us to support compilation with MIPS toolchains which are not customized for XLR. [ralf@linux-mips.org: And more importantly it works around a gas bug in binutils 2.21 which otherwise may result in an assertion failure building arch/mips/kernel/genex.S. See http://sourceware.org/bugzilla/show_bug.cgi?id=12915 for details.] Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2534/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-10-20MIPS:Netlogic:Fix section mismatch warnings.Jayachandran C
Add __init and __cpuinit annotation to functions that need it. Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2535/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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