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2011-10-17ARM: 7115/4: move __exception and friends to asm/exception.hJamie Iles
The definition of __exception_irq_entry for CONFIG_FUNCTION_GRAPH_TRACER=y needs linux/ftrace.h, but this creates a circular dependency with it's current home in asm/system.h. Create asm/exception.h and update all current users. v4: - rebase to rmk/for-next v3: - remove redundant includes of linux/ftrace.h v2: - document the usage restricitions of __exception* Cc: Zoltan Devai <zdevai@gmail.com> Signed-off-by: Jamie Iles <jamie@jamieiles.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-10-17ARM: 7124/1: smp: Add a localtimer handler callable from C codeShawn Guo
In order to be able to handle localtimer directly from C code instead of assembly code, introduce handle_local_timer(), which is modeled after handle_IRQ(). Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-10-17ARM: 7123/1: smp: Add an IPI handler callable from C codeShawn Guo
In order to be able to handle IPI directly from C code instead of assembly code, introduce handle_IPI(), which is modeled after handle_IRQ(). Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-10-17ARM: 7100/1: smp_scu: remove __init annotation from scu_enable()Shawn Guo
When Cortex-A9 MPCore resumes from Dormant or Shutdown modes, SCU needs to be re-enabled. This patch removes __init annotation from function scu_enable(), so that platform resume procedure can call it to re-enable SCU. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-10-17ARM: 7061/1: gic: convert logical CPU numbers into physical numbersWill Deacon
The GIC driver must convert logical CPU numbers passed in from Linux into physical CPU numbers that are understood by the hardware. This patch uses the new cpu_logical_map macro for performing the conversion inside the GIC driver. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-10-17ARM: 7060/1: smp: populate logical CPU mapping during bootWill Deacon
To allow booting Linux on a CPU with physical ID != 0, we need to provide a mapping from the logical CPU number to the physical CPU number. This patch adds such a mapping and populates it during boot. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-10-17ARM: 7011/1: Add ARM cpu topology definitionVincent Guittot
The affinity between ARM processors is defined in the MPIDR register. We can identify which processors are in the same cluster, and which ones have performance interdependency. We can define the cpu topology of ARM platform, that is then used by sched_mc and sched_smt. The default state of sched_mc and sched_smt config is disable. When enabled, the behavior of the scheduler can be modified with sched_mc_power_savings and sched_smt_power_savings sysfs interfaces. Changes since v4 : * Remove unnecessary parentheses and blank lines Changes since v3 : * Update the format of printk message * Remove blank line Changes since v2 : * Update the commit message and some comments Changes since v1 : * Update the commit message * Add read_cpuid_mpidr in arch/arm/include/asm/cputype.h * Modify header of arch/arm/kernel/topology.c * Modify tests and manipulation of MPIDR's bitfields * Modify the place and dependancy of the config * Modify Noop functions Signed-off-by: Vincent Guittot <vincent.guittot@linaro.org> Reviewed-by: Amit Kucheria <amit.kucheria@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-10-16PM / Hibernate: Include storage keys in hibernation image on s390Martin Schwidefsky
For s390 there is one additional byte associated with each page, the storage key. This byte contains the referenced and changed bits and needs to be included into the hibernation image. If the storage keys are not restored to their previous state all original pages would appear to be dirty. This can cause inconsistencies e.g. with read-only filesystems. Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
2011-10-16Merge branch 'fixes' of ↵Linus Torvalds
http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm * 'fixes' of http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm: ARM: 7128/1: vic: Don't write to the read-only register VIC_IRQ_STATUS ARM: 7122/1: localtimer: add header linux/errno.h explicitly ARM: 7117/1: perf: fix HW_CACHE_* events on Cortex-A9 ARM: 7113/1: mm: Align bank start to MAX_ORDER_NR_PAGES
2011-10-15ARM: 7128/1: vic: Don't write to the read-only register VIC_IRQ_STATUSZoltan Devai
This is unneeded and causes an abort on the SPMP8000 platform. Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Zoltan Devai <zoss@devai.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-10-15ARM: 7122/1: localtimer: add header linux/errno.h explicitlyShawn Guo
Per the text in Documentation/SubmitChecklist as below, we should explicitly have header linux/errno.h in localtimer.h for ENXIO reference. 1: If you use a facility then #include the file that defines/declares that facility. Don't depend on other header files pulling in ones that you use. Otherwise, we may run into some compiling error like the following one, if any file includes localtimer.h without CONFIG_LOCAL_TIMERS defined. arch/arm/include/asm/localtimer.h: In function ‘local_timer_setup’: arch/arm/include/asm/localtimer.h:53:10: error: ‘ENXIO’ undeclared (first use in this function) Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-10-15ARM: 7117/1: perf: fix HW_CACHE_* events on Cortex-A9Will Deacon
Using COHERENT_LINE_{MISS,HIT} for cache misses and references respectively is completely wrong. Instead, use the L1D events which are a better and more useful approximation despite ignoring instruction traffic. Reported-by: Alasdair Grant <alasdair.grant@arm.com> Reported-by: Matt Horsnell <matt.horsnell@arm.com> Reported-by: Michael Williams <michael.williams@arm.com> Cc: stable@kernel.org Cc: Jean Pihet <j-pihet@ti.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-10-15Merge branch 'for-florian' of git://gitorious.org/linux-omap-dss2/linux into ↵Florian Tobias Schandinat
fbdev-next
2011-10-15Merge commit 'v3.1-rc9' into fbdev-nextFlorian Tobias Schandinat
2011-10-14x86: constify PCI raw ops structuresJan Beulich
As with any other such change, the goal is to prevent inadvertent writes to these structures (assuming DEBUG_RODATA is enabled), and to separate data (possibly frequently) written to from such never getting modified. Reviewed-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Jan Beulich <jbeulich@novell.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2011-10-14x86, intel: Use c->microcode for Atom errata checkAndi Kleen
Now that the cpu update level is available the Atom PSE errata check can use it directly without reading the MSR again. Signed-off-by: Andi Kleen <ak@linux.intel.com> Acked-by: H. Peter Anvin <hpa@zytor.com> Link: http://lkml.kernel.org/r/1318466795-7393-2-git-send-email-andi@firstfloor.org Signed-off-by: Ingo Molnar <mingo@elte.hu>
2011-10-14x86, intel: Output microcode revision in /proc/cpuinfoAndi Kleen
I got a request to make it easier to determine the microcode update level on Intel CPUs. This patch adds a new "microcode" field to /proc/cpuinfo. The microcode level is also outputed on fatal machine checks together with the other CPUID model information. I removed the respective code from the microcode update driver, it just reads the field from cpu_data. Also when the microcode is updated it fills in the new values too. I had to add a memory barrier to native_cpuid to prevent it being optimized away when the result is not used. This turns out to clean up further code which already got this information manually. This is done in followon patches. Signed-off-by: Andi Kleen <ak@linux.intel.com> Acked-by: H. Peter Anvin <hpa@zytor.com> Link: http://lkml.kernel.org/r/1318466795-7393-1-git-send-email-andi@firstfloor.org Signed-off-by: Ingo Molnar <mingo@elte.hu>
2011-10-14microblaze: Remove __ARCH_WANT_INTERRUPTS_ON_CTXSW usagePeter Zijlstra
As far as I can tell the only reason microblaze has __ARCH_WANT_INTERRUPTS_ON_CTXSW is because it initializes new task state with interrupts enabled so that on switch_to() interrupts get enabled. So change copy_thread() to clear MSR_IE instead of set it, this will ensure switch_to() will always keep IRQs disabled. The scheduler will disable IRQs when taking rq->lock in schedule() and enable IRQs in finish_lock_switch() after its done its magic. This leaves ARM the only __ARCH_WANT_INTERRUPTS_ON_CTXSW user. Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Signed-off-by: Michal Simek <monstr@monstr.eu>
2011-10-14microblaze: Use delay slot in __strnlen_user, __strncpy_userMichal Simek
Use delay slot to speedup if maxlen is zero. Signed-off-by: Michal Simek <monstr@monstr.eu>
2011-10-14microblaze: Remove NET_IP_ALIGN from system.hMichal Simek
Use default value (which is the same) from include/linux/skbuff.h. Signed-off-by: Michal Simek <monstr@monstr.eu>
2011-10-14microblaze: Add __ucmpdi2() helper functionMichal Simek
Add missing __ucmpdi2 helper function. Error log: kernel/built-in.o: In function `print_graph_duration': : undefined reference to `__ucmpdi2' kernel/built-in.o: In function `print_graph_duration': : undefined reference to `__ucmpdi2' Based on MIPS code. Signed-off-by: Michal Simek <monstr@monstr.eu>
2011-10-14microblaze: Raise SIGFPE/FPE_INTDIV for div by zeroEdgar E. Iglesias
It fixes the signal nr raised for divizion by zero from SIGILL to SIGFPE, in accordance to POSIX and other archs. This came up due to a failed test in the GCC testsuite. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2011-10-14microblaze: Switch ELF_ARCH code to 189Edgar E. Iglesias
Switch arch code to 189, the registered code in the upstream version of binutils. Continue to accept the experimental 0xbaab. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> Signed-off-by: Michal Simek <monstr@monstr.eu>
2011-10-14microblaze: Added DMA sync operationsEli Billauer
Added support gor dma_direct_sync_single_for_*() and dma_direct_sync_sg_for_*() Signed-off-by: Eli Billauer <eli.billauer@gmail.com> Signed-off-by: Michal Simek <monstr@monstr.eu>
2011-10-14microblaze: Moved __dma_sync() to dma-mapping.hEli Billauer
__dma_sync_page() was replaced by __dma_sync(), and parameters of calls to the new function were adjusted to match __dma_sync()'s format. Signed-off-by: Eli Billauer <eli.billauer@gmail.com> Signed-off-by: Michal Simek <monstr@monstr.eu>
2011-10-14microblaze: Add PVR for Microblaze v8.20.aMichal Simek
Microblaze v8.20.a has 0x15 version string. Signed-off-by: Michal Simek <monstr@monstr.eu>
2011-10-14microblaze: Fix access_ok macroMichal Simek
There is the problem with bit OR (|) because for some combination is addr | size | addr+size equal to seq. For standard kernel setting (kernel starts at 0xC0000000) is seq for user space 0xBFFFFFFF and everything below this limit is fine. But even address 0xBFFFFFFF is fine because it is below kernel space. Signed-off-by: Andrew Fedonczuk <andrew.fedonczuk@ericsson.com> Signed-off-by: Michal Simek <monstr@monstr.eu>
2011-10-14microblaze: Add loop unrolling for PAGE in copy_tofrom_userMichal Simek
Increase performance by loop unrolling. Signed-off-by: Michal Simek <monstr@monstr.eu>
2011-10-14microblaze: Simplify logic for unaligned byte copyingMichal Simek
Save jump instruction for unaligned byte copying. Signed-off-by: Michal Simek <monstr@monstr.eu>
2011-10-14microblaze: Change label names - copy_tofrom_userMichal Simek
Change label name to be prepared for loop unrolling. Signed-off-by: Michal Simek <monstr@monstr.eu>
2011-10-14microblaze: Separate fixup section definitionMichal Simek
Move fixups below appropriate code. Signed-off-by: Michal Simek <monstr@monstr.eu>
2011-10-14microblaze: Change label name in copy_tofrom_userMichal Simek
Use label 0: for zero length copying and fixups. Signed-off-by: Michal Simek <monstr@monstr.eu>
2011-10-14microblaze: Clear top bit from cnt32_to_63Michal Simek
Top bit is used as garbage and it must be clear explicitly. It is causing the problem with soft lookup code because it checks delays which are long when top bit is setup. Signed-off-by: Michal Simek <monstr@monstr.eu>
2011-10-14powerpc/fsl_msi: add support for "msi-address-64" propertyTimur Tabi
Add support for the msi-address-64 property of a PCI node. This property specifies the PCI address of MSIIR (message signaled interrupt index register). In commit 3da34aae ("powerpc/fsl: Support unique MSI addresses per PCIe Root Complex"), the msi_addr_hi/msi_addr_lo fields of struct fsl_msi were redefined from an actual address to just an offset, but the fields were not renamed accordingly. These fields are replace with a single field, msiir_offset, to reflect the new meaning. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-14Merge branch 'features/denx-mx28' into for-arnd-featuresSascha Hauer
2011-10-14Merge branch 'features/ahci' into for-arnd-featuresSascha Hauer
2011-10-14ARM: S3C2443: Remove redundant s3c_register_clocks call for init_clocksAxel Lin
Since commit af337f3e633a198034a99450416257ddf2307497 "ARM: S3C2443: Move parts of the clock code to common clock file", the init_clocks array is moved to arch/arm/plat-s3c24xx/s3c2443-clock.c. Now we call s3c_register_clocks for init_clocks in s3c2443_common_init_clocks. Thus we can remove the empty init_clocks array here and remove the redundant s3c_register_clocks call for init_clocks in s3c2443_init_clocks. Signed-off-by: Axel Lin <axel.lin@gmail.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-10-14ARM: S3C24XX: Add devname for hsmmc1 pclkHeiko Stuebner
S3C2443 uses hsmmc1 as its only hsmmc device and for S3C2416/S3C2450 it's the second hsmmc channel with the same PCLKCON bit. The hsmmc-if clocks on both systems already got a devname, as did the hsmmc pclk for hsmmc0 on the S3C2416. So to make it possible to identify the hsmmc1 pclk on S3C2416 add the correct devname for it. The sclk name on S3C2443 also is s3c-sdhci.1. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-10-14ARM: S3C24XX: use clk_get_rate to init fclk in common_setup_clocksHeiko Stuebner
Previously the fclk rate was calculated by dividing the pll through the divider value of the armdiv. With a real armdiv clk in place it's possible to simply read its value, which does essentially the same. This change makes the whole fdiv_fn function pointers supplied to s3c2443_common_init_clocks and s3c2443_common_setup_clocks obsolete, so remove it too. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-10-14ARM: S3C2443: Accommodate cpufreq frequency scheme in armdivHeiko Stuebner
Cpufreq uses frequencies in kHz and not Hz, so set_rate and round_rate would be called with a frequency of 266666000 instead of 266666666 but the clock functions check for rates smaller or equal to the targetrate. As the armdiv does not support steps this small we can accommodate this by simply also setting the last 3 digits of the calculated rate to zero. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-10-14ARM: S3C2443: handle unset armdiv values gracefullyHeiko Stuebner
The armdiv array may contain unset divider values. Check the relevant value to prevent division by zero errors. Also check for set nr_armdiv and armdivmask before meddling with clkdiv0. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-10-14ARM: S3C2443: Add get_rate operation for clk_armdivHeiko Stuebner
Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-10-14ARM: S3C2416: Add comment describing the armdiv/armclkHeiko St?bner
Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-10-14ARM: S3C2443: Move clk_arm and clk_armdiv to common codeHeiko St?bner
The system-layout of the armdiv and armclk is common to S3C2443/S3C2416/S3C2450 and only differs in the array of possible dividers. Therefore it is possible to reuse the clock definitions for all of these SoCs. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-10-14ARM: S3C24XX: Add infrastructure to transmit armdiv to common codeHeiko Stuebner
This is needed for making the armdiv clock common to S3C2443 and S3C2416/2450. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-10-14ARM: S3C2416: Add armdiv_mask constantHeiko Stuebner
The S3C2416/2450 has only 3 bits for the armdiv setting instead of the 4 bits of the S3C2443. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-10-14ARM: EXYNOS4: Add support for M-5MOLS camera on Nuri boardSylwester Nawrocki
Add voltage regulator and platform data definition for M-5MOLS sensor and MIPI-CSI receiver drivers. Add CAM power domain dependencies for FIMC device and set up camera port A GPIO. Configure I2C0 bus timings. Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: HeungJun Kim <riverful.kim@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-10-14ARM: EXYNOS4: Enable MFC on ORIGENSachin Kamat
This patch enables multi-format codec (MFC) support on ORIGEN board. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-10-14ARM: SAMSUNG: Add support s3c2416-adc for S3C2416/S3C2450Heiko Stuebner
The ADC of the S3C2416/2450 SoC is 10 or 12 bit wide, has its source selection in the register base+0x18 and its width selection in bit 03 of the ADCCON register. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-10-14ARM: SAMSUNG: Add support s3c2443-adc for S3C2443Heiko Stuebner
The S3C2443-adc is 10 bit wide and has its mux-select in an extra register at base+0x18 Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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