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2011-09-26[S390] Do not clobber personality flags on execMartin Schwidefsky
Analog to git commit 59e4c3a2fe9cb1681bb2cff508ff79466f7585ba do not clear the additional personality flags on exec. We need to inherit the personality bits in PER_MASK across exec. Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2011-09-26ARM: mach-iop33x: remove mach/memory.hNicolas Pitre
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-09-26ARM: mach-omap2: remove mach/memory.hNicolas Pitre
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org> Acked-by: Tony Lindgren <tony@atomide.com>
2011-09-26ARM: OMAP: move OMAP1 memory config from plat/memory.h to its mach/memory.hNicolas Pitre
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org> Acked-by: Tony Lindgren <tony@atomide.com>
2011-09-26ARM: mach-orion5x: remove mach/memory.hNicolas Pitre
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-09-26ARM: mach-kirkwood: remove mach/memory.hNicolas Pitre
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-09-26ARM: mach-dove: remove include/mach/memory.hNicolas Pitre
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-09-26ARM: prepare for removal of a bunch of <mach/memory.h> filesNicolas Pitre
When the CONFIG_NO_MACH_MEMORY_H symbol is selected by a particular machine class, the machine specific memory.h include file is no longer used and can be removed. In that case the equivalent information can be obtained dynamically at runtime by enabling CONFIG_ARM_PATCH_PHYS_VIRT or by specifying the physical memory address at kernel configuration time. If/when all instances of mach/memory.h are removed then this symbol could be removed. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-09-26ARM: mach-davinci: clean up debug-macro.SNicolas Pitre
This achieves two goals: 1) Get rid of davinci_uart_v2p() and davinci_uart_p2v() which were the last users of PLAT_PHYS_OFFSET. 2) Remove the probing of the M bit in the CP15 control reg and make the access to the .data variables completely position independent. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org> Reviewed-by: Kevin Hilman <khilman@ti.com> Tested-by: Kevin Hilman <khilman@ti.com>
2011-09-26ARM: mach-davinci: make DAVINCI_UART_INFO into a relative offsetNicolas Pitre
This is the first step to remove PLAT_PHYS_OFFSET usage from the debug UART code. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org> Reviewed-by: Kevin Hilman <khilman@ti.com> Tested-by: Kevin Hilman <khilman@ti.com>
2011-09-26ARM: mach-omap2: clean up debug-macro.SNicolas Pitre
This achieves two goals: 1) Get rid of omap_uart_v2p() and omap_uart_p2v() which were the last users of PLAT_PHYS_OFFSET. 2) Remove the probing of the M bit in the CP15 control reg and make the access to the .data variables completely position independent. There is a catch though: the busyuart macro needs to know where the LSR register is which might be at a different offset depending on the hardware. Given that this macro is given only two registers and that one of them must be preserved, the trick is to always pass the LSR register address around, and deduce the base address for the THR register by masking out the LSR offset in senduart instead. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org> Tested-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com>
2011-09-26ARM: mach-omap1: clean up debug-macro.SNicolas Pitre
This achieves two goals: 1) Get rid of omap_uart_v2p() and omap_uart_p2v() which were the last users of PLAT_PHYS_OFFSET. 2) Remove the probing of the M bit in the CP15 control reg and make the access to the .data variables completely position independent. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org> Tested-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com>
2011-09-26ARM: plat-omap: make OMAP_UART_INFO into a relative offsetNicolas Pitre
This is the first step to remove PLAT_PHYS_OFFSET usage from the debug UART code. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org> Tested-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com>
2011-09-26ARM: add an extra temp register to the low level debugging addruart macroNicolas Pitre
Some platforms (like OMAP not to name it) are doing rather complicated hacks just to determine the base UART address to use. Let's give their addruart macro some slack by providing an extra work register which will allow for much needed cleanups. This is basically a no-op as this commit is only adding the extra argument to the macro but no one is using it yet. Signed-off-by: nicolas Pitre <nicolas.pitre@linaro.org> Reviewed-by: Kevin Hilman <khilman@ti.com>
2011-09-26ARM: 7099/1: futex: preserve oldval in SMP __futex_atomic_opWill Deacon
The SMP implementation of __futex_atomic_op clobbers oldval with the status flag from the exclusive store. This causes it to always read as zero when performing the FUTEX_OP_CMP_* operation. This patch updates the ARM __futex_atomic_op implementations to take a tmp argument, allowing us to store the strex status flag without overwriting the register containing oldval. Cc: stable@kernel.org Reported-by: Minho Ban <mhban@samsung.com> Reviewed-by: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-09-26ARM: 7094/1: arm/tegra: Move EN_VDD_1V05_GPIO to board-harmony.hStephen Warren
This centralizes all GPIO naming in one header. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-09-26x86, perf: Clean up perf_event cpu codeKevin Winchester
The CPU support for perf events on x86 was implemented via included C files with #ifdefs. Clean this up by creating a new header file and compiling the vendor-specific files as needed. Signed-off-by: Kevin Winchester <kjwinchester@gmail.com> Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/r/1314747665-2090-1-git-send-email-kjwinchester@gmail.com Signed-off-by: Ingo Molnar <mingo@elte.hu>
2011-09-26Merge commit 'v3.1-rc7' into perf/coreIngo Molnar
Merge reason: Pick up the latest upstream fixes. Signed-off-by: Ingo Molnar <mingo@elte.hu>
2011-09-26ARM i.MX entry-macro.S: remove now unused codeSascha Hauer
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2011-09-26ARM i.MX boards: use CONFIG_MULTI_IRQ_HANDLERSascha Hauer
Also, add handle_irq callbacks to machine descriptors. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2011-09-26ARM i.MX tzic: add handle_irq functionSascha Hauer
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2011-09-26ARM i.MX avic: add handle_irq functionSascha Hauer
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2011-09-26ARM: dma-mapping: free allocated page if unable to mapRussell King
If the attempt to map a page for DMA fails (eg, because we're out of mapping space) then we must not hold on to the page we allocated for DMA - doing so will result in a memory leak. Cc: <stable@kernel.org> Reported-by: Bryan Phillippe <bp@darkforest.org> Tested-by: Bryan Phillippe <bp@darkforest.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-09-26Merge branch 'for_3_2/for-rmk/arm_cpu_pm' of ↵Russell King
git://gitorious.org/omap-sw-develoment/linux-omap-dev into devel-stable
2011-09-26powerpc/pci: Don't configure PCIe settings when PCI_PROBE_ONLY is setBenjamin Herrenschmidt
We don't want to configure PCI Express Max Payload Size or Max Read Request Size on systems that set that flag. The firmware will have done it for us, and under hypervisors such as pHyp we don't even see the parent switches and bridges and thus can make no assumption on what values are safe to use. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2011-09-26ARM: S3C64xx: Add LDOVDD supply for CODEC on CragganmoreMark Brown
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-09-26ARM: S5P: fix incorrect loop iterator usage on gpio-interruptMarek Szyprowski
Loop iterator value after terminating list_for_each_entry() is not NULL. This patch fixes incorrect iterator usage in GPIO interrupt code for SAMSUNG S5P platforms. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-09-26ARM: S3C2443: Fix bit-reset in setrate of clk_armdivHeiko Stuebner
The changed statement should set the old armdiv bits to 0 and not everything else, before setting the new value. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-09-25ARM: mach-shmobile: sh7372 sleep warning fixesMagnus Damm
Update the sh7372 sleep code to build parts of the code only when SUSPEND and/or CPU_IDLE are set. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
2011-09-25ARM: mach-shmobile: sh7372 A3SM supportMagnus Damm
This patch adds sh7372 A3SM power domain support. The sh7372 A3SM hardware power domain contains the ARM Cortex-A8 CPU Core including L2 cache. This sleep mode can be seen as a one step deeper sleep mode from the already existing Core Standby mode. To wake up from A3SM sleep only a few wakeup sources are supported - so the regular INTC controller will not be able to help us unfortunately. The code in this patch will enter A3SM sleep via the regular Suspend-to-RAM interface in the case of only wakeups supported by A3SM are enabled. If unsupported wakeups are enabled then Core Standby will be used instead. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
2011-09-25ARM: mach-shmobile: sh7372 generic suspend/resume supportMagnus Damm
Convert the sh7372 Core Standby code to make use of the new generic ARM cpu suspend/resume code. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
2011-09-25x86: TSC deadline definitionsLiu, Jinsong
This pre-defination is preparing for KVM tsc deadline timer emulation, but theirself are not kvm specific. Signed-off-by: Liu, Jinsong <jinsong.liu@intel.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-09-25KVM: Fix simultaneous NMIsAvi Kivity
If simultaneous NMIs happen, we're supposed to queue the second and next (collapsing them), but currently we sometimes collapse the second into the first. Fix by using a counter for pending NMIs instead of a bool; since the counter limit depends on whether the processor is currently in an NMI handler, which can only be checked in vcpu context (via the NMI mask), we add a new KVM_REQ_NMI to request recalculation of the counter. Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-09-25KVM: x86 emulator: convert push %sreg/pop %sreg to direct decodeAvi Kivity
Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-09-25KVM: x86 emulator: switch lds/les/lss/lfs/lgs to direct decodeAvi Kivity
Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-09-25KVM: x86 emulator: streamline decode of segment registersAvi Kivity
The opcodes push %seg pop %seg l%seg, %mem, %reg (e.g. lds/les/lss/lfs/lgs) all have an segment register encoded in the instruction. To allow reuse, decode the segment number into src2 during the decode stage instead of the execution stage. Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-09-25KVM: x86 emulator: simplify OpMem64 decodeAvi Kivity
Use the same technique as the other OpMem variants, and goto mem_common. Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-09-25KVM: x86 emulator: switch src decode to decode_operand()Avi Kivity
Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-09-25KVM: x86 emulator: qualify OpReg inhibit_byte_regs hackAvi Kivity
OpReg decoding has a hack that inhibits byte registers for movsx and movzx instructions. It should be replaced by something better, but meanwhile, qualify that the hack is only active for the destination operand. Note these instructions only use OpReg for the destination, but better to be explicit about it. Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-09-25KVM: x86 emulator: switch OpImmUByte decode to decode_imm()Avi Kivity
Similar to SrcImmUByte. Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-09-25KVM: x86 emulator: free up some flag bits near src, dstAvi Kivity
Op fields are going to grow by a bit, we need two free bits. Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-09-25KVM: x86 emulator: switch src2 to generic decode_operand()Avi Kivity
Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-09-25KVM: x86 emulator: expand decode flags to 64 bitsAvi Kivity
Unifiying the operands means not taking advantage of the fact that some operand types can only go into certain operands (for example, DI can only be used by the destination), so we need more bits to hold the operand type. Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-09-25KVM: x86 emulator: split dst decode to a generic decode_operand()Avi Kivity
Instead of decoding each operand using its own code, use a generic function. Start with the destination operand. Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-09-25KVM: x86 emulator: move memop, memopp into emulation contextAvi Kivity
Simplifies further generalization of decode. Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-09-25KVM: x86 emulator: convert group 3 instructions to direct decodeAvi Kivity
Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-09-25KVM: x86: Add module parameter for lapic periodic timer limitJan Kiszka
Certain guests, specifically RTOSes, request faster periodic timers than what we allow by default. Add a module parameter to adjust the limit for non-standard setups. Also add a rate-limited warning in case the guest requested more. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-09-25KVM: Clean up and extend rate-limited outputJan Kiszka
The use of printk_ratelimit is discouraged, replace it with pr*_ratelimited or __ratelimit. While at it, convert remaining guest-triggerable printks to rate-limited variants. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-09-25KVM: x86: Avoid guest-triggerable printks in APIC modelJan Kiszka
Convert remaining printks that the guest can trigger to apic_printk. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-09-25KVM: x86: Move kvm_trace_exit into atomic vmexit sectionJan Kiszka
This avoids that events causing the vmexit are recorded before the actual exit reason. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
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