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2021-03-31bus: mhi: core: Improve state strings for debug messagesBhaumik Bhatt
As of now abbreviations are being used for many state and execution environment strings. Improve and expand those such that debug messages are clear. Signed-off-by: Bhaumik Bhatt <bbhatt@codeaurora.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Loic Poulain <loic.poulain@linaro.org> Link: https://lore.kernel.org/r/1617067704-28850-8-git-send-email-bbhatt@codeaurora.org Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2021-03-31bus: mhi: core: Wait for MHI READY state in most scenariosBhaumik Bhatt
When moving from SYS_ERROR transition to a different execution environment, MHI host relies on the BHI register read to spawn the next image download or wait for READY -> M0 states. The device can at times move the execution environment to mission mode when a pass through is expected, which can result in a stall. Initiate a wait for MHI READY and write M0 such that the device can proceed with state change event updates for any new execution environment being entered. This allows us to remove conditionals in handling firmware load for PBL modes and keeps the execution environment out of the picture as it can change at any time. Signed-off-by: Bhaumik Bhatt <bbhatt@codeaurora.org> Reviewed-by: Loic Poulain <loic.poulain@linaro.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/1617067704-28850-7-git-send-email-bbhatt@codeaurora.org Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2021-03-31bus: mhi: core: Identify Flash Programmer as a mission mode use caseBhaumik Bhatt
MHI power up can go through an EDL to Flash Programmer path when the device has a blank NAND. In those cases, mhi_sync_power_up() can timeout waiting for a mission mode execution environment. Allow a successful power up instead by identifying Flash Programmer as a valid mission mode execution environment with a purpose to flash the device image contents. Signed-off-by: Bhaumik Bhatt <bbhatt@codeaurora.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Loic Poulain <loic.poulain@linaro.org> Link: https://lore.kernel.org/r/1617067704-28850-6-git-send-email-bbhatt@codeaurora.org Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2021-03-31bus: mhi: core: Add support for Flash Programmer execution environmentCarl Yin
MHI WWAN modems support downloading firmware to NAND or eMMC using Firehose protocol with process as follows: 1. Modem boots up, enters AMSS execution environment and the device later enters EDL (Emergency Download) mode through any mechanism host can use such as a diag command. 2. Modem enters SYS_ERROR, MHI host handles SYS_ERROR transition. 3. EDL image for device to enter 'Flash Programmer' execution environment is then flashed via BHI interface from host. 4. Modem enters MHI READY -> M0 and sends the Flash Programmer execution environment change to host. 5. Following that, EDL/FIREHOSE channels (34, 35) are made available from the host. 6. User space tool for downloading firmware image to modem over the EDL channels using Firehose protocol. Link to USB flashing tool: https://git.linaro.org/landing-teams/working/qualcomm/qdl.git/ Make the necessary changes to allow for this sequence to occur and allow using the Flash Programmer execution environment. Signed-off-by: Carl Yin <carl.yin@quectel.com> Co-developed-by: Bhaumik Bhatt <bbhatt@codeaurora.org> Signed-off-by: Bhaumik Bhatt <bbhatt@codeaurora.org> Reviewed-by: Loic Poulain <loic.poulain@linaro.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/1617067704-28850-5-git-send-email-bbhatt@codeaurora.org Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2021-03-31bus: mhi: core: Handle EDL mode entry appropriatelyBhaumik Bhatt
Device entering EDL or Emergency Download Mode will be in a SYS_ERROR MHI state. This requires MHI host to proceed with the EDL image download over BHI before device can enter an MHI READY state and proceed with further bootup. Allow this to be handled by relying on the execution environment check after SYS_ERROR processing to determine whether to wait for an MHI READY or download the EDL image over BHI after moving MHI PM state to Power on Reset internally. This way handling is contained well within the MHI core driver and helps pave the way for Flash Programmer execution environment functionality. Signed-off-by: Bhaumik Bhatt <bbhatt@codeaurora.org> Reviewed-by: Loic Poulain <loic.poulain@linaro.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/1617067704-28850-4-git-send-email-bbhatt@codeaurora.org Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2021-03-31bus: mhi: core: Wait for ready after an EDL firmware downloadBhaumik Bhatt
Currently, the firmware load handler returns after the EDL image is downloaded. Wait for an MHI READY transition instead as the specification expects so as to proceed with further bootup such as device entering Flash Programmer execution environment. Signed-off-by: Bhaumik Bhatt <bbhatt@codeaurora.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Loic Poulain <loic.poulain@linaro.org> Link: https://lore.kernel.org/r/1617067704-28850-3-git-send-email-bbhatt@codeaurora.org Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2021-03-31bus: mhi: core: Rely on accurate method to determine EDL modeBhaumik Bhatt
Relying on the current execution environment to determine if EDL image was downloaded should not be done as the execution environment can change at this point in error cases and we may misread it. Instead, MHI can rely on the local 'fw_name' variable as a safer alternative. Signed-off-by: Bhaumik Bhatt <bbhatt@codeaurora.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Loic Poulain <loic.poulain@linaro.org> Link: https://lore.kernel.org/r/1617067704-28850-2-git-send-email-bbhatt@codeaurora.org Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2021-03-29bus: qcom: Put child node before returnPan Bian
Put child node before return to fix potential reference count leak. Generally, the reference count of child is incremented and decremented automatically in the macro for_each_available_child_of_node() and should be decremented manually if the loop is broken in loop body. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Fixes: 335a12754808 ("bus: qcom: add EBI2 driver") Signed-off-by: Pan Bian <bianpan2016@163.com> Link: https://lore.kernel.org/r/20210121114907.109267-1-bianpan2016@163.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-24bus: ti-sysc: Use kzalloc for allocating only one thingZheng Yongjun
Use kzalloc rather than kcalloc(1,...) The semantic patch that makes this change is as follows: (http://coccinelle.lip6.fr/) // <smpl> @@ @@ - kcalloc(1, + kzalloc( ...) // </smpl> Signed-off-by: Zheng Yongjun <zhengyongjun3@huawei.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-24bus: ti-sysc: remove unneeded semicolonYang Li
Eliminate the following coccicheck warning: ./drivers/bus/ti-sysc.c:1595:2-3: Unneeded semicolon ./drivers/bus/ti-sysc.c:2833:3-4: Unneeded semicolon Reported-by: Abaci Robot <abaci@linux.alibaba.com> Signed-off-by: Yang Li <yang.lee@linux.alibaba.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-18Merge tag 'omap-for-v5.12/fixes-rc1-signed' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/fixes Fixes for omaps for v5.12-rc cycle Regression fixes for multiple issues found mostly caused by recent changes to drop legacy platform data and and starting to use the new prm driver reset controller: - Fix ocp interconnect bus access error reporting for omap_l3_noc by setting IRQF_NO_THREAD - Fix changed mmc slot order regression by adding mmc aliases for am335x - Fix dra7 reboot regression caused by invalid pcie reset map - Fix smartreflex init regression caused by dropped legacy data - Fix ti-sysc driver warning on unbind if reset is not deasserted - Fix flakey reset deassert for dra7 iva * tag 'omap-for-v5.12/fixes-rc1-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: soc: ti: omap-prm: Fix occasional abort on reset deassert for dra7 iva bus: ti-sysc: Fix warning on unbind if reset is not deasserted ARM: OMAP2+: Fix smartreflex init regression after dropping legacy data soc: ti: omap-prm: Fix reboot issue with invalid pcie reset map for dra7 ARM: dts: am33xx: add aliases for mmc interfaces bus: omap_l3_noc: mark l3 irqs as IRQF_NO_THREAD Link: https://lore.kernel.org/r/pull-1614868603-800959@atomide.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-03-16bus: mhi: core: Check state before processing power_downJeffrey Hugo
We cannot process a power_down if the power state is DISABLED. There is no valid mhi_ctxt in that case, so attepting to process the power_down will likely result in a null pointer dereference. If the power state is DISABLED, there is nothing to do anyways, so just bail early. Signed-off-by: Jeffrey Hugo <jhugo@codeaurora.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/1615409365-8165-1-git-send-email-jhugo@codeaurora.org Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2021-03-16bus: mhi: core: Return EAGAIN if MHI ring is fullFan Wu
Currently ENOMEM is returned when MHI ring is full. This error code is very misleading. Change to EAGAIN instead. Signed-off-by: Fan Wu <wufan@codeaurora.org> Signed-off-by: Jeffrey Hugo <jhugo@codeaurora.org> Reviewed-by: Hemant Kumar <hemantk@codeaurora.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/1615408803-7016-1-git-send-email-jhugo@codeaurora.org Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2021-03-15bus: mhi: core: remove redundant initialization of variables state and eeColin Ian King
The variables state and ee are being initialized with values that are never read and are being updated later with a new values. The initializations are redundant and can be removed. Signed-off-by: Colin Ian King <colin.king@canonical.com> Reviewed-by: Loic Poulain <loic.poulain@linaro.org> Reviewed-by: Manivannan Sadhasivam <mani@kernel.org> Addresses-Coverity: ("Unused value") Link: https://lore.kernel.org/r/20210311111727.8433-1-colin.king@canonical.com Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2021-03-12bus: ti-sysc: Warn about old dtb for dra7 and omap4/5Tony Lindgren
Let's warn if an old incomplete dtb is detected. We now assume the dtb is complete and does not depend on the legacy platform data. Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10bus: mhi: core: Fix check for syserr at power_upJeffrey Hugo
The check to see if we have reset the device after detecting syserr at power_up is inverted. wait_for_event_timeout() returns 0 on failure, and a positive value on success. The check is looking for non-zero as a failure, which is likely to incorrectly cause a device init failure if syserr was detected at power_up. Fix this. Fixes: e18d4e9fa79b ("bus: mhi: core: Handle syserr during power_up") Signed-off-by: Jeffrey Hugo <jhugo@codeaurora.org> Reviewed-by: Loic Poulain <loic.poulain@linaro.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/1613165243-23359-1-git-send-email-jhugo@codeaurora.org Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2021-03-10bus: mhi: core: Update debug prints to include local device stateBhaumik Bhatt
Update debug prints to include local device in the BHI interrupt handler. This helps show transitions better between MHI states. Signed-off-by: Bhaumik Bhatt <bbhatt@codeaurora.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Loic Poulain <loic.poulain@linaro.org> Link: https://lore.kernel.org/r/1614208985-20851-5-git-send-email-bbhatt@codeaurora.org Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2021-03-10bus: mhi: core: Process execution environment changes seriallyBhaumik Bhatt
In current design, whenever the BHI interrupt is fired, the execution environment is updated. This can cause race conditions and impede ongoing power up/down processing. For example, if a power down is in progress, MHI host updates to a local "disabled" execution environment. If a BHI interrupt fires later, that value gets replaced with one from the BHI EE register. This impacts the controller as it does not expect multiple RDDM execution environment change status callbacks as an example. Another issue would be that the device can enter mission mode and the execution environment is updated, while device creation for SBL channels is still going on due to slower PM state worker thread run, leading to multiple attempts at opening the same channel. Ensure that EE changes are handled only from appropriate places and occur one after another and handle only PBL modes or RDDM EE changes as critical events directly from the interrupt handler. Simplify handling by waiting for SYS ERROR before handling RDDM. This also makes sure that we use the correct execution environment to notify the controller driver when the device resets to one of the PBL execution environments. Signed-off-by: Bhaumik Bhatt <bbhatt@codeaurora.org> Reviewed-by: Loic Poulain <loic.poulain@linaro.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/1614208985-20851-4-git-send-email-bbhatt@codeaurora.org Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2021-03-10bus: mhi: core: Download AMSS image from appropriate functionBhaumik Bhatt
During full boot chain firmware download, the PM state worker downloads the AMSS image after a blocking wait for the SBL execution environment change when running in PBL transition itself. Improve this design by having the host download the AMSS image from the SBL transition of PM state worker thread when a DEV_ST_TRANSITION_SBL is queued instead of the blocking wait. Signed-off-by: Bhaumik Bhatt <bbhatt@codeaurora.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Loic Poulain <loic.poulain@linaro.org> Link: https://lore.kernel.org/r/1614208985-20851-3-git-send-email-bbhatt@codeaurora.org Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2021-03-10bus: mhi: core: Destroy SBL devices when moving to mission modeBhaumik Bhatt
Currently, client devices are created in SBL or AMSS (mission mode) and only destroyed after power down or SYS ERROR. When moving between certain execution environments, such as from SBL to AMSS, no clean-up is required. This presents an issue where SBL-specific channels are left open and client drivers now run in an execution environment where they cannot operate. Fix this by expanding the mhi_destroy_device() to do an execution environment specific clean-up if one is requested. Close the gap and destroy devices in such scenarios that allow SBL client drivers to clean up once device enters mission mode. Signed-off-by: Bhaumik Bhatt <bbhatt@codeaurora.org> Reviewed-by: Loic Poulain <loic.poulain@linaro.org> Reviewed-by: Hemant Kumar <hemantk@codeaurora.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/1614208985-20851-2-git-send-email-bbhatt@codeaurora.org Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2021-03-10bus: mhi: Early MHI resume failure in non M3 stateLoic Poulain
MHI suspend/resume are symmetric and balanced procedures. If device is not in M3 state on a resume, that means something happened behind our back. In this case resume is aborted and error reported, to let the controller handle the situation. This is mainly requested for system wide suspend-resume operation in PCI context which may lead to power-down/reset of the controller which will then lose its MHI context. In such cases, PCI driver is supposed to recover and reinitialize the device. Signed-off-by: Loic Poulain <loic.poulain@linaro.org> Reviewed-by: Bhaumik Bhatt <bbhatt@codeaurora.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/1614960841-20233-1-git-send-email-loic.poulain@linaro.org Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2021-03-10bus: mhi: core: Add missing checks for MMIO register entriesBhaumik Bhatt
As per documentation, fields marked as (required) in an MHI controller structure need to be populated by the controller driver before calling mhi_register_controller(). Ensure all required pointers and non-zero fields are present in the controller before proceeding with the registration. Signed-off-by: Bhaumik Bhatt <bbhatt@codeaurora.org> Reviewed-by: Jeffrey Hugo <jhugo@codeaurora.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/1615315490-36017-1-git-send-email-bbhatt@codeaurora.org Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2021-03-10bus: mhi: core: Rename debugfs directory nameLoic Poulain
Use MHI controller device name instead of the 'bus' device name as debugfs dir name (e.g. /sys/kernel/debug/mhi0). That aligns with sysfs device name. Signed-off-by: Loic Poulain <loic.poulain@linaro.org> Tested-by: Jeffrey Hugo <jhugo@codeaurora.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Jeffrey Hugo <jhugo@codeaurora.org> Link: https://lore.kernel.org/r/1613403753-1457-1-git-send-email-loic.poulain@linaro.org Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2021-03-10bus: mhi: core: Fix invalid error returning in mhi_queueLoic Poulain
mhi_queue returns an error when the doorbell is not accessible in the current state. This can happen when the device is in non M0 state, like M3, and needs to be waken-up prior ringing the DB. This case is managed earlier by triggering an asynchronous M3 exit via controller resume/suspend callbacks, that in turn will cause M0 transition and DB update. So, since it's not an error but just delaying of doorbell update, there is no reason to return an error. This also fixes a use after free error for skb case, indeed a caller queuing skb will try to free the skb if the queueing fails, but in that case queueing has been done. Fixes: a8f75cb348fd ("mhi: core: Factorize mhi queuing") Signed-off-by: Loic Poulain <loic.poulain@linaro.org> Reviewed-by: Jeffrey Hugo <jhugo@codeaurora.org> Reviewed-by: Bhaumik Bhatt <bbhatt@codeaurora.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/1614336782-5809-1-git-send-email-loic.poulain@linaro.org Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2021-03-10bus: mhi: pci_generic: Remove WQ_MEM_RECLAIM flag from state workqueueLoic Poulain
A recent change created a dedicated workqueue for the state-change work with WQ_HIGHPRI (no strong reason for that) and WQ_MEM_RECLAIM flags, but the state-change work (mhi_pm_st_worker) does not guarantee forward progress under memory pressure, and will even wait on various memory allocations when e.g. creating devices, loading firmware, etc... The work is then not part of a memory reclaim path... Moreover, this causes a warning in check_flush_dependency() since we end up in code that flushes a non-reclaim workqueue: [ 40.969601] workqueue: WQ_MEM_RECLAIM mhi_hiprio_wq:mhi_pm_st_worker [mhi] is flushing !WQ_MEM_RECLAIM events_highpri:flush_backlog [ 40.969612] WARNING: CPU: 4 PID: 158 at kernel/workqueue.c:2607 check_flush_dependency+0x11c/0x140 [ 40.969733] Call Trace: [ 40.969740] __flush_work+0x97/0x1d0 [ 40.969745] ? wake_up_process+0x15/0x20 [ 40.969749] ? insert_work+0x70/0x80 [ 40.969750] ? __queue_work+0x14a/0x3e0 [ 40.969753] flush_work+0x10/0x20 [ 40.969756] rollback_registered_many+0x1c9/0x510 [ 40.969759] unregister_netdevice_queue+0x94/0x120 [ 40.969761] unregister_netdev+0x1d/0x30 [ 40.969765] mhi_net_remove+0x1a/0x40 [mhi_net] [ 40.969770] mhi_driver_remove+0x124/0x250 [mhi] [ 40.969776] device_release_driver_internal+0xf0/0x1d0 [ 40.969778] device_release_driver+0x12/0x20 [ 40.969782] bus_remove_device+0xe1/0x150 [ 40.969786] device_del+0x17b/0x3e0 [ 40.969791] mhi_destroy_device+0x9a/0x100 [mhi] [ 40.969796] ? mhi_unmap_single_use_bb+0x50/0x50 [mhi] [ 40.969799] device_for_each_child+0x5e/0xa0 [ 40.969804] mhi_pm_st_worker+0x921/0xf50 [mhi] Fixes: 8f7039787687 ("bus: mhi: core: Move to using high priority workqueue") Signed-off-by: Loic Poulain <loic.poulain@linaro.org> Reviewed-by: Bhaumik Bhatt <bbhatt@codeaurora.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/1614161930-8513-1-git-send-email-loic.poulain@linaro.org Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2021-03-10bus: mhi: pci_generic: Add support for runtime PMLoic Poulain
When the device is idle it is possible to move it into the lowest MHI PM state (M3). In that mode, all MHI operations are suspended and the PCI device can be safely put into PCI D3 state. The device is then resumed from D3/M3 either because of host initiated MHI operation (e.g. buffer TX) or because the device (modem) has triggered wake-up via PME feature (e.g. on incoming data). Same procedures can be used for system wide or runtime suspend/resume. Signed-off-by: Loic Poulain <loic.poulain@linaro.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/1614971808-22156-6-git-send-email-loic.poulain@linaro.org Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2021-03-10bus: mhi: pci_generic: Use generic PCI power managementLoic Poulain
The PCI core can take care of proper PCI suspend/resume operations, but this is discarded when the driver saves PCI state by its own. This currently prevents the PCI core to enable PME (for modem initiated D3 exit) which is requested for proper runtime pm support. This change deletes explicit PCI state-saving and state-set from suspend callback, letting the PCI doing the appropriate work. Signed-off-by: Loic Poulain <loic.poulain@linaro.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/1614971808-22156-5-git-send-email-loic.poulain@linaro.org Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2021-03-10bus: mhi: pci_generic: No-Op for device_wake operationsLoic Poulain
The wake_db register presence is highly speculative and can fuze MHI devices. Indeed, currently the wake_db register address is defined at entry 127 of the 'Channel doorbell array', thus writing to this address is equivalent to ringing the doorbell for channel 127, causing trouble with some devics (e.g. SDX24 based modems) that get an unexpected channel 127 doorbell interrupt. This change fixes that issue by setting wake get/put as no-op for pci_generic devices. The wake device sideband mechanism seems really specific to each device, and is AFAIK not defined by the MHI spec. It also removes zeroing initialization of wake_db register during MMIO initialization, the register being set via wake_get/put accessors few cycles later during M0 transition. Signed-off-by: Loic Poulain <loic.poulain@linaro.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/1614971808-22156-4-git-send-email-loic.poulain@linaro.org Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2021-03-10bus: mhi: pci_generic: Add SDX24 based modem supportLoic Poulain
Add generic info for SDX24 based modems. Also add the FIREHOSE channels used by the flash-programmer firmware loaded in EDL mode. Signed-off-by: Loic Poulain <loic.poulain@linaro.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/1614971808-22156-3-git-send-email-loic.poulain@linaro.org Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2021-03-10bus: mhi: pci_generic: Introduce quectel EM1XXGR-L supportLoic Poulain
Add support for EM1XXGR-L modems, this modem series is based on SDX24 qcom chip. The modem is mainly based on MBIM protocol for both the data and control path. The drivers for these channels (mhi-net-mbim and mhi_uci) are not yet part of the kernel but will be integrated by different series. Signed-off-by: Loic Poulain <loic.poulain@linaro.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/1614971808-22156-2-git-send-email-loic.poulain@linaro.org Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2021-03-10bus: mhi: pci_generic: Parametrable element count for eventsLoic Poulain
Not all hardwares need to use the same number of event ring elements. This change makes this parametrable. Signed-off-by: Loic Poulain <loic.poulain@linaro.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/1614971808-22156-1-git-send-email-loic.poulain@linaro.org Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2021-03-10bus: ti-sysc: Check for old incomplete dtbTony Lindgren
Let's be nice and show an error on the SoCs about old imcomplete devicetree if the dtb is still using "simple-bus" instead of "simple-pm-bus" for the root OCP node. Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-08bus: ti-sysc: Detect more modules for debuggingTony Lindgren
We want to see what the interconnect target module names are for debugging. Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-08bus: ti-sysc: Probe for l4_wkup and l4_cfg interconnect devices firstTony Lindgren
We want to probe l4_wkup and l4_cfg interconnect devices first to avoid issues with missing resources. Otherwise we attempt to probe l4_per devices first causing pointless deferred probe and also annoyingh renumbering of the MMC devices for example. Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-08bus: ti-sysc: Fix initializing module_pa for modules without sysc registerTony Lindgren
We have interconnect target modules with no known registers using only clocks and resets, but we still want to detect them based on the module IO range. So let's call sysc_parse_and_check_child_range() earlier so we have module_pa properly initialized. Fixes: 2928135c93f8 ("bus: ti-sysc: Support modules without control registers") Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-08Merge branch 'fixes-rc2' into fixesTony Lindgren
2021-02-24Merge tag 'char-misc-5.12-rc1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc Pull char/misc driver updates from Greg KH: "Here is the large set of char/misc/whatever driver subsystem updates for 5.12-rc1. Over time it seems like this tree is collecting more and more tiny driver subsystems in one place, making it easier for those maintainers, which is why this is getting larger. Included in here are: - coresight driver updates - habannalabs driver updates - virtual acrn driver addition (proper acks from the x86 maintainers) - broadcom misc driver addition - speakup driver updates - soundwire driver updates - fpga driver updates - amba driver updates - mei driver updates - vfio driver updates - greybus driver updates - nvmeem driver updates - phy driver updates - mhi driver updates - interconnect driver udpates - fsl-mc bus driver updates - random driver fix - some small misc driver updates (rtsx, pvpanic, etc.) All of these have been in linux-next for a while, with the only reported issue being a merge conflict due to the dfl_device_id addition from the fpga subsystem in here" * tag 'char-misc-5.12-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (311 commits) spmi: spmi-pmic-arb: Fix hw_irq overflow Documentation: coresight: Add PID tracing description coresight: etm-perf: Support PID tracing for kernel at EL2 coresight: etm-perf: Clarify comment on perf options ACRN: update MAINTAINERS: mailing list is subscribers-only regmap: sdw-mbq: use MODULE_LICENSE("GPL") regmap: sdw: use no_pm routines for SoundWire 1.2 MBQ regmap: sdw: use _no_pm functions in regmap_read/write soundwire: intel: fix possible crash when no device is detected MAINTAINERS: replace my with email with replacements mhi: Fix double dma free uapi: map_to_7segment: Update example in documentation uio: uio_pci_generic: don't fail probe if pdev->irq equals to IRQ_NOTCONNECTED drivers/misc/vmw_vmci: restrict too big queue size in qp_host_alloc_queue firewire: replace tricky statement by two simple ones vme: make remove callback return void firmware: google: make coreboot driver's remove callback return void firmware: xilinx: Use explicit values for all enum values sample/acrn: Introduce a sample of HSM ioctl interface usage virt: acrn: Introduce an interface for Service VM to control vCPU ...
2021-02-20Merge tag 'arm-drivers-v5.12' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC driver updates from Arnd Bergmann: "Updates for SoC specific drivers include a few subsystems that have their own maintainers but send them through the soc tree: SCMI firmware: - add support for a completion interrupt Reset controllers: - new driver for BCM4908 - new devm_reset_control_get_optional_exclusive_released() function Memory controllers: - Renesas RZ/G2 support - Tegra124 interconnect support - Allow more drivers to be loadable modules TEE/optee firmware: - minor code cleanup The other half of this is SoC specific drivers that do not belong into any other subsystem, most of them living in drivers/soc: - Allwinner/sunxi power management work - Allwinner H616 support - ASpeed AST2600 system identification support - AT91 SAMA7G5 SoC ID driver - AT91 SoC driver cleanups - Broadcom BCM4908 power management bus support - Marvell mbus cleanups - Mediatek MT8167 power domain support - Qualcomm socinfo driver support for PMIC - Qualcomm SoC identification for many more products - TI Keystone driver cleanups for PRUSS and elsewhere" * tag 'arm-drivers-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (89 commits) soc: aspeed: socinfo: Add new systems soc: aspeed: snoop: Add clock control logic memory: tegra186-emc: Replace DEFINE_SIMPLE_ATTRIBUTE with DEFINE_DEBUGFS_ATTRIBUTE memory: samsung: exynos5422-dmc: Correct function names in kerneldoc memory: ti-emif-pm: Drop of_match_ptr from of_device_id table optee: simplify i2c access drivers: soc: atmel: fix type for same7 tee: optee: remove need_resched() before cond_resched() soc: qcom: ocmem: don't return NULL in of_get_ocmem optee: sync OP-TEE headers tee: optee: fix 'physical' typos drivers: optee: use flexible-array member instead of zero-length array tee: fix some comment typos in header files soc: ti: k3-ringacc: Use of_device_get_match_data() soc: ti: pruss: Refactor the CFG sub-module init soc: mediatek: pm-domains: Don't print an error if child domain is deferred soc: mediatek: pm-domains: Add domain regulator supply dt-bindings: power: Add domain regulator supply soc: mediatek: cmdq: Remove cmdq_pkt_flush() soc: mediatek: pm-domains: Add support for mt8167 ...
2021-02-20Merge tag 'arm-platform-removal-v5.12' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC platform removals from Arnd Bergmann: "There are a lot of platforms that have not seen any interesting code changes in the past five years or more. I made a list and asked around which ones are no longer in use, and received confirmation about six ARM platforms and the TI C6x architecture that have all reached the end of their life upstream, with no known users remaining: - efm32 - added in 2011, first Cortex-M, no notable changes after 2013 - picoxcell - added in 2011, abandoned after 2012 acquisition - prima2 - added in 20111, no notable changes since 2015 - tango - added in 2015, sporadic changes until 2017, but abandoned - u300 - added in 2009, no notable changes since 2013 - zx - added in 2015 for both 32, 2017 for 64 bit, no notable changes - arch/c6x - added in 2011, but work stalled soon after that A number of other platforms on the original list turned out to still have users. In some cases there are out-of-tree patches and users that plan to contribute them in the future, in other cases the code is complete and works reliably" Link: https://lore.kernel.org/lkml/CAK8P3a2DZ8xQp7R=H=wewHnT2=a_=M53QsZOueMVEf7tOZLKNg@mail.gmail.com/ * tag 'arm-platform-removal-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: ARM: remove u300 platform ARM: remove tango platform ARM: remove zte zx platform ARM: remove sirf prima2/atlas platforms c6x: remove architecture MAINTAINERS: Remove deleted platform efm32 ARM: drop efm32 platform ARM: Remove PicoXcell platform support ARM: dts: Remove PicoXcell platforms
2021-02-18bus: ti-sysc: Fix warning on unbind if reset is not deassertedTony Lindgren
We currently get thefollowing on driver unbind if a reset is configured and asserted: WARNING: CPU: 0 PID: 993 at drivers/reset/core.c:432 reset_control_assert ... (reset_control_assert) from [<c0fecda8>] (sysc_remove+0x190/0x1e4) (sysc_remove) from [<c0a2bb58>] (platform_remove+0x24/0x3c) (platform_remove) from [<c0a292fc>] (__device_release_driver+0x154/0x214) (__device_release_driver) from [<c0a2a210>] (device_driver_detach+0x3c/0x8c) (device_driver_detach) from [<c0a27d64>] (unbind_store+0x60/0xd4) (unbind_store) from [<c0546bec>] (kernfs_fop_write_iter+0x10c/0x1cc) Let's fix it by checking the reset status. Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-02-15Merge branch 'fixes-v5.11' into fixesTony Lindgren
2021-02-10Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netDavid S. Miller
2021-02-10mhi: Fix double dma freeLoic Poulain
mhi_deinit_chan_ctxt functionthat takes care of unitializing channel resources, including unmapping coherent MHI areas, can be called from different path in case of controller unregistering/removal: - From a client driver remove callback, via mhi_unprepare_channel - From mhi_driver_remove that unitialize all channels mhi_driver_remove() |-> driver->remove() | |-> mhi_unprepare_channel() | |-> mhi_deinit_chan_ctxt() |... |-> mhi_deinit_chan_ctxt() This leads to double dma freeing... Fix that by preventing deinit for already uninitialized channel. Link: https://lore.kernel.org/r/1612894264-15956-1-git-send-email-loic.poulain@linaro.org Fixes: a7f422f2f89e ("bus: mhi: Fix channel close issue on driver remove") Reported-by: Kalle Valo <kvalo@codeaurora.org> Tested-by: Kalle Valo <kvalo@codeaurora.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Loic Poulain <loic.poulain@linaro.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210210082538.2494-2-manivannan.sadhasivam@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-02-09bus: fsl-mc: list more commands as accepted through the ioctlIoana Ciornei
Add some new MC firmware commands that can be received through the userspace ioctl interface - *get_max_frame_length and *_get_counter. Acked-by: Laurentiu Tudor <laurentiu.tudor@nxp.com> Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Link: https://lore.kernel.org/r/20210208170949.3070898-4-ciorneiioana@gmail.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-02-09bus: fsl-mc: add the dpdbg device typeIoana Ciornei
A new object type was recently added in MC. This has to be added in the fsl-mc bus device type list so that it can be properly listed. Acked-by: Laurentiu Tudor <laurentiu.tudor@nxp.com> Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Link: https://lore.kernel.org/r/20210208170949.3070898-3-ciorneiioana@gmail.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-02-09bus: fsl-mc: Fix test for end of loopDan Carpenter
The "desc" pointer can't possibly be NULL here. If we can't find the correct "desc" then tt points to the last element of the fsl_mc_accepted_cmds[] array. Fix this by testing if "i == FSL_MC_NUM_ACCEPTED_CMDS" instead. Fixes: 2cf1e703f066 ("bus: fsl-mc: add fsl-mc userspace support") Acked-by: Laurentiu Tudor <laurentiu.tudor@nxp.com> Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Link: https://lore.kernel.org/r/20210208170949.3070898-2-ciorneiioana@gmail.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-02-05Merge tag 'mhi-for-v5.12' of ↵Greg Kroah-Hartman
git://git.kernel.org/pub/scm/linux/kernel/git/mani/mhi into char-misc-next Manivannan writes: MHI changes for v5.12 Loic improved the MHI PCI generic controller by adding support for DIAG channel, PCI error handling, suspend/recovery/resume, and health check. Loic also added support for resetting the MHI device as per the MHI specification. This includes writing to a specific register for default cases and looking for controller specific callback when provided. Along with this Loic, also added a new API which gets the number for free TREs (Transfer Ring Elements) from the MHI core. The client drivers can make use of this API and the current consumer is the "mhi-net" driver. For taking both the "mhi-net" driver change and the API change, we created "mhi-net-immutable" branch for this patch and merged the same into net-next and mhi-next. Carl added a patch which lets the controller driver to pass the custom IRQ flags for BHI and MHI event interrupts to the MHI core. The current consumer of this feature is the ath11k MHI controller driver. For taking both the changes, we created "mhi-ath11k-immutable" branch for this patch and merged into ath11k-next and mhi-next. Finally, Loic cleaned up the MHI queue APIs and fixed the shared MSI vector support. * tag 'mhi-for-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/mani/mhi: bus: mhi: pci_generic: Increase num of elements in hw event ring mhi: pci_generic: Print warning in case of firmware crash bus: mhi: core: Add helper API to return number of free TREs mhi: core: Factorize mhi queuing mhi: use irq_flags if controller driver configures it mhi: pci_generic: Fix shared MSI vector support mhi: unconstify mhi_event_config bus: mhi: Ensure correct ring update ordering with memory barrier mhi: pci_generic: Set irq moderation value to 1ms for hw channels mhi: pci_generic: Add diag channels mhi: pci_generic: Increase controller timeout value mhi: pci_generic: Add health-check mhi: pci_generic: Add PCI error handlers mhi: pci_generic: Add suspend/resume/recovery procedure mhi: pci_generic: Add support for reset mhi: pci_generic: Enable burst mode for hardware channels mhi: pci-generic: Increase number of hardware events bus: mhi: core: Add device hardware reset support
2021-02-05bus: mhi: pci_generic: Increase num of elements in hw event ringLoic Poulain
We met some sporadic modem crashes during high throughput testing, this has been root caused to a lack of elements in the event ring. Indeed, the modem is simply crashing when event ring becomes empty. It appears that the total number event ring elements is too low given the performances of the modem (IPA hardware accelerator). This change increases the number of elements in the hardware event ring to 2048, which is aligned with what is defined in downstream version: https://source.codeaurora.org/quic/la/kernel/msm-4.14/tree/arch/arm64/boot/dts/qcom/sm8150-mhi.dtsi?h=msm-4.14#n482 With this change, modem coes not crash anymore. Note: An event ring element is 16-Byte, so the total memory usage of a hardware event ring is now 32KB. Signed-off-by: Loic Poulain <loic.poulain@linaro.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/1612514195-8257-1-git-send-email-loic.poulain@linaro.org Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2021-02-05mhi: pci_generic: Print warning in case of firmware crashLoic Poulain
Print warning when MHI detects sys error. Signed-off-by: Loic Poulain <loic.poulain@linaro.org> Reviewed-by: Hemant Kumar <hemantk@codeaurora.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/1612370382-21643-1-git-send-email-loic.poulain@linaro.org Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2021-02-04bus: omap_l3_noc: mark l3 irqs as IRQF_NO_THREADGrygorii Strashko
The main purpose of l3 IRQs is to catch OCP bus access errors and identify corresponding code places by showing call stack, so it's important to handle L3 interconnect errors as fast as possible. On RT these IRQs will became threaded and will be scheduled much more late from the moment actual error occurred so showing completely useless information. Hence, mark l3 IRQs as IRQF_NO_THREAD so they will not be forced threaded on RT or if force_irqthreads = true. Fixes: 0ee7261c9212 ("drivers: bus: Move the OMAP interconnect driver to drivers/bus/") Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
generated by cgit (git 2.34.1) at 2025-09-20 05:49:04 +0000