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2022-03-15clk: ti: clkctrl: fix typos in commentsJulia Lawall
Various spelling mistakes in comments. Detected with the help of Coccinelle. Signed-off-by: Julia Lawall <Julia.Lawall@inria.fr> Link: https://lore.kernel.org/r/20220314115354.144023-15-Julia.Lawall@inria.fr Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-03-15clk: imx: Select MXC_CLK for i.MX93 clock driverAbel Vesa
Most of the i.MX clock generic API is built by selecting MXC_CLK. Without it, the i.MX93 clock driver will fail to build: aarch64-linux-gnu-ld: drivers/clk/imx/clk-imx93.o: in function `imx93_clocks_probe': clk-imx93.c:(.text+0xa8): undefined reference to `imx_obtain_fixed_clk_hw' So fix this by selecting MXC_CLK for the CLK_IMX93. Fixes: 24defbe194b6 ("clk: imx: add i.MX93 clk") Signed-off-by: Abel Vesa <abel.vesa@nxp.com> Reported-by: kernel test robot <lkp@intel.com> Link: https://lore.kernel.org/r/20220315082446.3120850-1-abel.vesa@nxp.com Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-03-15clk: ti: Drop legacy compatibility clocks for dra7Tony Lindgren
We no longer have users for the compatibility clocks and we can drop them. These are old duplicate clocks for what we using. Depends-on: 31aa7056bbec ("ARM: dts: Don't use legacy clock defines for dra7 clkctrl") Depends-on: 9206a3af4fc0 ("clk: ti: Move dra7 clock devices out of the legacy section") Cc: devicetree@vger.kernel.org Cc: Rob Herring <robh+dt@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com> Link: https://lore.kernel.org/r/20220203085618.16043-4-tony@atomide.com Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-03-15clk: ti: Drop legacy compatibility clocks for am4Tony Lindgren
We no longer have users for the compatibility clocks and we can drop them. These are old duplicate clocks for what we using. Cc: devicetree@vger.kernel.org Cc: Rob Herring <robh+dt@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com> Link: https://lore.kernel.org/r/20220203085618.16043-3-tony@atomide.com Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-03-15clk: ti: Drop legacy compatibility clocks for am3Tony Lindgren
We no longer have users for the compatibility clocks and we can drop them. These are old duplicate clocks for what we using. Cc: devicetree@vger.kernel.org Cc: Rob Herring <robh+dt@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com> Link: https://lore.kernel.org/r/20220203085618.16043-2-tony@atomide.com Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-03-15clk: clk-apple-nco: Allow and fix module buildingMartin Povišer
Signed-off-by: Martin Povišer <povik+lin@cutebit.org> Link: https://lore.kernel.org/r/20220312135722.20770-1-povik+lin@cutebit.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-03-14Merge 5.17-rc8 into staging-nextGreg Kroah-Hartman
We need the staging fixes in here as well. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-03-11clk: clk-apple-nco: Add driver for Apple NCOMartin Povišer
Add a common clock driver for NCO blocks found on Apple SoCs where they are typically the generators of audio clocks. Signed-off-by: Martin Povišer <povik+lin@cutebit.org> Link: https://lore.kernel.org/r/20220208183411.61090-3-povik+lin@cutebit.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-03-11clk: microchip: Add driver for Microchip PolarFire SoCDaire McNamara
Add support for clock configuration on Microchip PolarFire SoC Reviewed-by: Geert Uytterhoeven <geert@linux-m68k.org> Tested-by: Geert Uytterhoeven <geert@linux-m68k.org> Co-developed-by: Padmarao Begari <padmarao.begari@microchip.com> Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com> Signed-off-by: Daire McNamara <daire.mcnamara@microchip.com> Co-developed-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20220222121143.3316880-2-conor.dooley@microchip.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-03-11clk: uniphier: Fix fixed-rate initializationKunihiko Hayashi
Fixed-rate clocks in UniPhier don't have any parent clocks, however, initial data "init.flags" isn't initialized, so it might be determined that there is a parent clock for fixed-rate clock. This sets init.flags to zero as initialization. Cc: <stable@vger.kernel.org> Fixes: 734d82f4a678 ("clk: uniphier: add core support code for UniPhier clock driver") Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Link: https://lore.kernel.org/r/1646808918-30899-1-git-send-email-hayashi.kunihiko@socionext.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-03-11clk: COMMON_CLK_LAN966X should depend on SOC_LAN966Geert Uytterhoeven
The LAN966x Generic Clock Controller is only present on Microchip LAN966x SoCs. Hence add a dependency on SOC_LAN966, to prevent asking the user about this driver when configuring a kernel without LAN966x SoC support. Fixes: 54104ee023333e3b ("clk: lan966x: Add lan966x SoC clock driver") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/eb102eae05e5667b9bd342a0c387f7f262d24bda.1645716471.git.geert+renesas@glider.be Reviewed-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-03-11clk: Use of_device_get_match_data()Minghao Chi (CGEL ZTE)
Use of_device_get_match_data() to simplify the code. Reported-by: Zeal Robot <zealci@zte.com.cn> Signed-off-by: Minghao Chi (CGEL ZTE) <chi.minghao@zte.com.cn> Link: https://lore.kernel.org/r/20220303014856.2059307-1-chi.minghao@zte.com.cn Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-03-11clk: bcm2835: Remove unused variableMaxime Ripard
Since commit 8ca011ef4af4 ("clk: bcm-2835: Remove rounding up the dividers"), the rem variable is still set but no longer used. Remove it. Fixes: 8ca011ef4af4 ("clk: bcm-2835: Remove rounding up the dividers") Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20220222140732.253819-1-maxime@cerno.tech Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-03-11clk: tegra: tegra124-emc: Fix missing put_device() call in emc_ensure_emc_driverMiaoqian Lin
The reference taken by 'of_find_device_by_node()' must be released when not needed anymore. Add the corresponding 'put_device()' in the error handling path. Fixes: 2db04f16b589 ("clk: tegra: Add EMC clock driver") Signed-off-by: Miaoqian Lin <linmq006@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20220112104501.30655-1-linmq006@gmail.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-03-11clk: bcm: rpi: Run some clocks at the minimum rate allowedMaxime Ripard
The core clock and M2MC clocks are shared between some devices (Unicam controllers and the HVS, and the HDMI controllers, respectively) that will have various, varying, requirements depending on their current work load. Since those loads can require a fairly high clock rate in extreme conditions (up to ~600MHz), we can end up running those clocks at their maximum frequency even though we no longer require such a high rate. Fortunately, those devices don't require an exact rate but a minimum rate, and all the drivers are using clk_set_min_rate. Thus, we can just rely on the fact that the clk_request minimum (which is the aggregated minimum of all the clock users) is what we want at all times. Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20220225143534.405820-11-maxime@cerno.tech Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-03-11clk: bcm: rpi: Set a default minimum rateMaxime Ripard
The M2MC clock provides the state machine clock for both HDMI controllers. However, if no HDMI monitor is plugged in at boot, its clock rate will be left at 0 by the firmware and will make any register access end up in a CPU stall, even though the clock was enabled. We had some code in the HDMI controller to deal with this before, but it makes more sense to have it in the clock driver. Move it there. Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20220225143534.405820-10-maxime@cerno.tech Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-03-11clk: bcm: rpi: Add variant structureMaxime Ripard
We only export a bunch of firmware clocks, and some of them require special treatment. This has been do so far using some tests on the clock id in various places, but this is fairly hard to extend and doesn't scale very well. Since we'll need some more cases in the next patches, let's switch to a variant structure that defines the behaviour we need to have for a given clock. Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20220225143534.405820-9-maxime@cerno.tech Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-03-11clk: Add clk_drop_rangeMaxime Ripard
In order to reset the range on a clock, we need to call clk_set_rate_range with a minimum of 0 and a maximum of ULONG_MAX. Since it's fairly inconvenient, let's introduce a clk_drop_range() function that will do just this. Suggested-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20220225143534.405820-8-maxime@cerno.tech Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-03-11clk: Always set the rate on clk_set_range_rateMaxime Ripard
When we change a clock minimum or maximum using clk_set_rate_range(), clk_set_min_rate() or clk_set_max_rate(), the current code will only trigger a new rate change if the rate is outside of the new boundaries. However, a clock driver might want to always keep the clock rate to one of its boundary, for example the minimum to keep the power consumption as low as possible. Since they don't always get called though, clock providers don't have the opportunity to implement this behaviour. Let's trigger a clk_set_rate() on the previous requested rate every time clk_set_rate_range() is called. That way, providers that care about the new boundaries have a chance to adjust the rate, while providers that don't care about those new boundaries will return the same rate than before, which will be ignored by clk_set_rate() and won't result in a new rate change. Suggested-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20220225143534.405820-7-maxime@cerno.tech Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-03-11clk: Use clamp instead of open-coding our ownMaxime Ripard
The code in clk_set_rate_range() will, if the current rate is outside of the new range, force it to the minimum or maximum. Since it's running under the condition that the rate is either lower than the minimum, or higher than the maximum, this is equivalent to using clamp, while being less readable. Let's switch to using clamp instead. Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20220225143534.405820-6-maxime@cerno.tech Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-03-11clk: Always clamp the rounded rateMaxime Ripard
The current core while setting the min and max rate properly in the clk_request structure will not make sure that the requested rate is within these boundaries, leaving it to each and every driver to make sure it is. It's not clear if this was on purpose or not, but this introduces some inconsistencies within the API. For example, a user setting a range and then calling clk_round_rate() with a value outside of that range will get the same value back (ignoring any driver adjustements), effectively ignoring the range that was just set. Another one, arguably worse, is that it also makes clk_round_rate() and clk_set_rate() behave differently if there's a range and the rate being used for both is outside that range. As we have seen, the rate will be returned unchanged by clk_round_rate(), but clk_set_rate() will error out returning -EINVAL. Let's make sure the framework will always clamp the rate to the current range found on the clock, which will fix both these inconsistencies. Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20220225143534.405820-5-maxime@cerno.tech Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-03-11clk: Enforce that disjoints limits are invalidMaxime Ripard
If we were to have two users of the same clock, doing something like: clk_set_rate_range(user1, 1000, 2000); clk_set_rate_range(user2, 3000, 4000); The second call would fail with -EINVAL, preventing from getting in a situation where we end up with impossible limits. However, this is never explicitly checked against and enforced, and works by relying on an undocumented behaviour of clk_set_rate(). Indeed, on the first clk_set_rate_range will make sure the current clock rate is within the new range, so it will be between 1000 and 2000Hz. On the second clk_set_rate_range(), it will consider (rightfully), that our current clock is outside of the 3000-4000Hz range, and will call clk_core_set_rate_nolock() to set it to 3000Hz. clk_core_set_rate_nolock() will then call clk_calc_new_rates() that will eventually check that our rate 3000Hz rate is outside the min 3000Hz max 2000Hz range, will bail out, the error will propagate and we'll eventually return -EINVAL. This solely relies on the fact that clk_calc_new_rates(), and in particular clk_core_determine_round_nolock(), won't modify the new rate allowing the error to be reported. That assumption won't be true for all drivers, and most importantly we'll break that assumption in a later patch. It can also be argued that we shouldn't even reach the point where we're calling clk_core_set_rate_nolock(). Let's make an explicit check for disjoints range before we're doing anything. Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20220225143534.405820-4-maxime@cerno.tech Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-03-11clk: Introduce Kunit Tests for the frameworkMaxime Ripard
Let's test various parts of the rate-related clock API with the kunit testing framework. Cc: kunit-dev@googlegroups.com Tested-by: Daniel Latypov <dlatypov@google.com> Suggested-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20220225143534.405820-3-maxime@cerno.tech Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-03-11clk: Fix clk_hw_get_clk() when dev is NULLMaxime Ripard
Any registered clk_core structure can have a NULL pointer in its dev field. While never actually documented, this is evidenced by the wide usage of clk_register and clk_hw_register with a NULL device pointer, and the fact that the core of_clk_hw_register() function also passes a NULL device pointer. A call to clk_hw_get_clk() on a clk_hw struct whose clk_core is in that case will result in a NULL pointer derefence when it calls dev_name() on that NULL device pointer. Add a test for this case and use NULL as the dev_id if the device pointer is NULL. Fixes: 30d6f8c15d2c ("clk: add api to get clk consumer from clk_hw") Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20220225143534.405820-2-maxime@cerno.tech Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-03-11clk: cleanup commentsTom Rix
For spdx Space instead of tab before spdx tag Removed repeated works the, to, two Replacements much much to a much 'to to' to 'to do' aready to already Comunications to Communications freqency to frequency Signed-off-by: Tom Rix <trix@redhat.com> Link: https://lore.kernel.org/r/20220222195153.3817625-1-trix@redhat.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-03-11clk: socfpga: cleanup spdx tagsTom Rix
Replace tabs with spaces in SPDX tag Signed-off-by: Tom Rix <trix@redhat.com> Link: https://lore.kernel.org/r/20220217173453.3262672-1-trix@redhat.com Acked-by: Dinh Nguyen <dinguyen@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-03-11clk: actions: Make sentinel elements more obviousJonathan Neuschäfer
The sentinel elements of various tables in drivers/clk/actions can be a bit hard to recognize. Make them easier to see by changing the style from { 0, 0 } to { /* sentinel */ }. Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Link: https://lore.kernel.org/r/20220218000922.134857-6-j.neuschaefer@gmx.net Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-03-11clk: clps711x: Terminate clk_div_table with sentinel elementJonathan Neuschäfer
In order that the end of a clk_div_table can be detected, it must be terminated with a sentinel element (.div = 0). Fixes: 631c53478973d ("clk: Add CLPS711X clk driver") Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Link: https://lore.kernel.org/r/20220218000922.134857-5-j.neuschaefer@gmx.net Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-03-11clk: hisilicon: Terminate clk_div_table with sentinel elementJonathan Neuschäfer
In order that the end of a clk_div_table can be detected, it must be terminated with a sentinel element (.div = 0). Fixes: 6c81966107dc0 ("clk: hisilicon: Add clock driver for hi3559A SoC") Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Link: https://lore.kernel.org/r/20220218000922.134857-4-j.neuschaefer@gmx.net Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-03-11clk: loongson1: Terminate clk_div_table with sentinel elementJonathan Neuschäfer
In order that the end of a clk_div_table can be detected, it must be terminated with a sentinel element (.div = 0). Fixes: b4626a7f4892 ("CLK: Add Loongson1C clock support") Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Link: https://lore.kernel.org/r/20220218000922.134857-3-j.neuschaefer@gmx.net Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-03-11clk: actions: Terminate clk_div_table with sentinel elementJonathan Neuschäfer
In order that the end of a clk_div_table can be detected, it must be terminated with a sentinel element (.div = 0). In owl-s900.s, the { 0, 8 } element was probably meant to be just that, so this patch changes { 0, 8 } to { 0, 0 }. Fixes: d47317ca4ade1 ("clk: actions: Add S700 SoC clock support") Fixes: d85d20053e195 ("clk: actions: Add S900 SoC clock support") Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-by: Manivannan Sadhasivam <mani@kernel.org> Link: https://lore.kernel.org/r/20220218000922.134857-2-j.neuschaefer@gmx.net Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-03-10clk: ti: Update component clocks to use ti_dt_clk_name()Tony Lindgren
Let's update all the TI component clocks to use ti_dt_clk_name() instead of devicetree node name if available. Signed-off-by: Tony Lindgren <tony@atomide.com> Link: https://lore.kernel.org/r/20220204071449.16762-9-tony@atomide.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-03-10clk: ti: Update pll and clockdomain clocks to use ti_dt_clk_name()Tony Lindgren
Let's update the TI pll and clockdomain clocks to use ti_dt_clk_name() instead of devicetree node name if available. Signed-off-by: Tony Lindgren <tony@atomide.com> Link: https://lore.kernel.org/r/20220204071449.16762-8-tony@atomide.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-03-10clk: ti: Add ti_dt_clk_name() helper to use clock-output-namesTony Lindgren
Let's create the clock alias based on the clock-output-names property if available. Also the component clock drivers can use ti_dt_clk_name() in the following patches. Signed-off-by: Tony Lindgren <tony@atomide.com> Link: https://lore.kernel.org/r/20220204071449.16762-7-tony@atomide.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-03-10clk: ti: Use clock-output-names for clkctrlTony Lindgren
Use clock-output-names devicetree property for clkctrl clocks if available. Signed-off-by: Tony Lindgren <tony@atomide.com> Link: https://lore.kernel.org/r/20220204071449.16762-6-tony@atomide.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-03-10clk: ti: Add ti_find_clock_provider() to use clock-output-namesTony Lindgren
Let's add ti_find_clock_provider() so we can use clock-output-names to name the clock provider instead of relying on non-standard devicetree node names. Signed-off-by: Tony Lindgren <tony@atomide.com> Link: https://lore.kernel.org/r/20220204071449.16762-5-tony@atomide.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-03-10clk: ti: Optionally parse IO address from parent clock nodeTony Lindgren
If no reg property is specified for a TI clock, let's try to use the parent clock node IO address. This way we can avoid duplicate devicetree reg properties that cause warnings for unique_unit_address. Signed-off-by: Tony Lindgren <tony@atomide.com> Link: https://lore.kernel.org/r/20220204071449.16762-4-tony@atomide.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-03-10clk: ti: Preserve node in ti_dt_clocks_register()Tony Lindgren
In preparation for making use of the clock-output-names, we want to keep node around in ti_dt_clocks_register(). This change should not needed as a fix currently. Signed-off-by: Tony Lindgren <tony@atomide.com> Link: https://lore.kernel.org/r/20220204071449.16762-3-tony@atomide.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-03-10clk: ti: Constify clkctrl_nameTony Lindgren
We can constify clkctrl_name in preparation for making use of the clock-output-names property. Signed-off-by: Tony Lindgren <tony@atomide.com> Link: https://lore.kernel.org/r/20220204071449.16762-2-tony@atomide.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-03-10clk: starfive: Add JH7100 audio clock driverEmil Renner Berthing
Add a driver for the audio clocks on the Starfive JH7100 RISC-V SoC. Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Link: https://lore.kernel.org/r/20220126173953.1016706-8-kernel@esmil.dk Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-03-10clk: starfive: jh7100: Support more clock typesEmil Renner Berthing
Unlike the system clocks there are audio clocks that combine both multiplexer/divider and gate/multiplexer/divider, so add support for that. Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Link: https://lore.kernel.org/r/20220126173953.1016706-7-kernel@esmil.dk Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-03-10clk: starfive: jh7100: Make hw clock implementation reusableEmil Renner Berthing
The JH7100 has additional audio and video clocks at different memory ranges, but they use the same register layout. Add a header and export the starfive_jh7100_clk_ops function so the clock implementation can be reused by drivers handling these clocks. Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Link: https://lore.kernel.org/r/20220126173953.1016706-6-kernel@esmil.dk Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-03-10clk: starfive: jh7100: Handle audio_div clock properlyEmil Renner Berthing
It turns out the audio_div clock is a fractional divider where the lowest byte of the ctrl register is the integer part of the divider and the 2nd byte is the number of 100th added to the divider. The children of this clock is used by the audio peripherals for their sample rate clock, so round to the closest possible rate rather than always rounding down like regular dividers. Fixes: 4210be668a09 ("clk: starfive: Add JH7100 clock generator driver") Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Link: https://lore.kernel.org/r/20220126173953.1016706-3-kernel@esmil.dk Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-03-10clk: starfive: jh7100: Don't round divisor up twiceEmil Renner Berthing
The problem is best illustrated by an example. Suppose a consumer wants a 4MHz clock rate from a divider with a 10MHz parent. It would then call clk_round_rate(clk, 4000000) which would call into our determine_rate() callback that correctly rounds up and finds that a divisor of 3 gives the highest possible frequency below the requested 4MHz and returns 10000000 / 3 = 3333333Hz. However the consumer would then call clk_set_rate(clk, 3333333) but since 3333333 doesn't divide 10000000 evenly our set_rate() callback would again round the divisor up and set it to 4 which results in an unnecessarily low rate of 2.5MHz. Fix it by using DIV_ROUND_CLOSEST in the set_rate() callback. Fixes: 4210be668a09 ("clk: starfive: Add JH7100 clock generator driver") Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Link: https://lore.kernel.org/r/20220126173953.1016706-2-kernel@esmil.dk Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-03-09clk: imx: remove redundant re-assignment of pll->baseColin Ian King
There are two identical assignments of pll->base to the same value, the second assignment is redundant and can be removed. Cleans up cppcheck warning: drivers/clk/imx/clk-sscg-pll.c:528:12: style: Variable 'pll->base' is reassigned a value before the old one has been used. [redundantAssignment] Signed-off-by: Colin Ian King <colin.i.king@gmail.com> Link: https://lore.kernel.org/r/20220303090508.1125175-1-colin.i.king@gmail.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-03-09clk: qcom: Add display clock controller driver for SM6125Martin Botka
Add support for the display clock controller found on SM6125 based devices. This allows display drivers to probe and control their clocks. Signed-off-by: Martin Botka <martin.botka@somainline.org> Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220303131812.302302-4-marijn.suijten@somainline.org
2022-03-09clk: qcom: Fix sorting of SDX_GCC_65 in Makefile and KconfigMarijn Suijten
In order to keep at least the list of `CONFIG_SM_` drivers sorted alphabetically, SDX_GCC_65 should have been moved one line up. This in turn makes it easier and cleaner to add the followup SM_DISPCC_6125 driver in the right place, right before SM_DISPCC_8250. Fixes: d79afa201328 ("clk: qcom: Add SDX65 GCC support") Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220303131812.302302-2-marijn.suijten@somainline.org
2022-03-09clk: qcom: gcc: Add emac GDSC support for SM8150Bhupesh Sharma
Add the EMAC GDSC defines and driver structures for SM8150. Cc: Stephen Boyd <sboyd@kernel.org> Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220303084824.284946-4-bhupesh.sharma@linaro.org
2022-03-09clk: qcom: gcc: sm8150: Fix some identation issuesBhupesh Sharma
Fix identation issues with usb30 gdsc structs in gcc-sm8150. Cc: Stephen Boyd <sboyd@kernel.org> Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220303084824.284946-3-bhupesh.sharma@linaro.org
2022-03-09clk: qcom: gcc: Add UFS_CARD and UFS_PHY GDSCs for SM8150Bhupesh Sharma
Add the UFS_CARD and UFS_PHY GDSC defines & driver structures for SM8150. Cc: Stephen Boyd <sboyd@kernel.org> Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220303082140.240745-2-bhupesh.sharma@linaro.org
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