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path: root/drivers/clk
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2019-08-08clk: mvebu: ap806: Fix clock name for the clusterGregory CLEMENT
Actually, the clocks exposed for the cluster are not the CPU clocks, but the PLL clock used as entry clock for the CPU clocks. The CPU clock will be managed by a driver submitting in the following patches. Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> Link: https://lkml.kernel.org/r/20190710134346.30239-5-gregory.clement@bootlin.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-08-08clk: mvebu: add CPU clock driver for Armada 7K/8KGregory CLEMENT
The CPU frequency is managed at the AP level for the Armada 7K/8K. The CPU frequency is modified by cluster: the CPUs of the same cluster have the same frequency. This patch adds the clock driver that will be used by CPUFreq, it is based on the work of Omri Itach <omrii@marvell.com>. Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> Link: https://lkml.kernel.org/r/20190710134346.30239-4-gregory.clement@bootlin.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-08-08clk: mvebu: add helper file for Armada AP and CP clocksGregory CLEMENT
Clock drivers for Armada AP and Armada CP use the same function to generate unique clock name. A third drivers is coming with the same need, so it's time to move this function in a common file. Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> Link: https://lkml.kernel.org/r/20190710134346.30239-3-gregory.clement@bootlin.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-08-08clk: qcom: define probe by index API as common APIGovind Singh
Extend the probe by index API in common code to be used by other qcom clock controller. Signed-off-by: Govind Singh <govinds@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-08-08clk: reset: Modify reset-controller driveryong.liang
Set reset signal by a register and clear reset signal by another register for 8183. Signed-off-by: yong.liang <yong.liang@mediatek.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-08-08clk: qcom: Add WCSS gcc clock control for QCS404Govind Singh
Add support for the WCSS QDSP gcc clock control used on qcs404 based devices. This would allow wcss remoteproc driver to control the required gcc clocks to bring the subsystem out of reset. Signed-off-by: Govind Singh <govinds@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-08-08clk: Use seq_puts() in possible_parent_show()Markus Elfring
A string which did not contain a data format specification should be put into a sequence. Thus use the corresponding function “seq_puts”. This issue was detected by using the Coccinelle software. Signed-off-by: Markus Elfring <elfring@users.sourceforge.net> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-08-08clk: Assert prepare_lock in clk_core_get_boundariesLeonard Crestez
This function iterates the clk consumer list on clk_core so it must be called under prepare_lock. This is already done by all callers but add a lockdep assert to check anyway. Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Link: https://lkml.kernel.org/r/29453ee8e820457d87a8faf9d496390e59c6826f.1562073871.git.leonard.crestez@nxp.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-08-08clk: Add clk_min/max_rate entries in debugfsLeonard Crestez
Add two files to expose min/max clk rates as determined by clk_core_get_boundaries, taking all consumer requests into account. This information does not appear to be otherwise exposed to userspace. Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Link: https://lkml.kernel.org/r/68e96af2df96512300604d797ade2088d7e6e496.1562073871.git.leonard.crestez@nxp.com [sboyd@kernel.org: Drop if statements for JSON printing] Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-08-08clk: renesas: rcar-usb2-clock-sel: Use devm_platform_ioremap_resource() helperGeert Uytterhoeven
Use the devm_platform_ioremap_resource() helper instead of open-coding the same operation. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
2019-08-07clk: qcom: msm8916: Don't build by defaultMarc Gonzalez
QCOM_A53PLL and QCOM_CLK_APCS_MSM8916 stand out as the only options built by default. Let's bring them back in line with the rest. Signed-off-by: Marc Gonzalez <marc.w.gonzalez@free.fr> Link: https://lkml.kernel.org/r/d654907d-a3a2-a00f-d6f5-3a34ae25ebcf@free.fr Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Acked-by: Georgi Djakov <georgi.djakov@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-08-07clk: ti: dm814x: Add of_node_put() to prevent memory leakNishka Dasgupta
In function dm814x_adpll_early_init, variable np takes the value returned by of_find_node_by_name, which gets a node but does not put it. If np is not put before return, it may cause a memory leak. Hence put np before return. Issue found with Coccinelle. Signed-off-by: Nishka Dasgupta <nishkadg.linux@gmail.com> Link: https://lkml.kernel.org/r/20190804163328.6693-1-nishkadg.linux@gmail.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-08-07clk: st: clk-flexgen: Add of_node_put() in st_of_flexgen_setup()Nishka Dasgupta
In function st_of_flexgen_setup, variable pnode takes the return value of of_get_parent, which gets a node but does not put it. If pnode is not put before the function returns, it may cause a memory leak. Hence put pnode after its last occurrence. Issue found with Coccinelle. Signed-off-by: Nishka Dasgupta <nishkadg.linux@gmail.com> Link: https://lkml.kernel.org/r/20190804163151.6511-1-nishkadg.linux@gmail.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-08-07clk: davinci: pll: Add of_node_put() in of_davinci_pll_init()Nishka Dasgupta
The variable child in the function of_davinci_pll_init takes the value of of_get_child_by_name, which gets a node but does not put it. If child is not put before the function returns it may cause a memory leak. Hence put child before two return statements. Issue found with Coccinelle. Signed-off-by: Nishka Dasgupta <nishkadg.linux@gmail.com> Link: https://lkml.kernel.org/r/20190804162824.6338-1-nishkadg.linux@gmail.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-08-07clk: versatile: Add of_node_put() in cm_osc_setup()Nishka Dasgupta
In function cm_osc_setup, variable parent takes the value returned by of_get_parent, which gets a node but does not put it. If parent is not put before it goes out of scope, it may cause a memory leak. Hence put parent before the function terminates. Issue found with Coccinelle. Signed-off-by: Nishka Dasgupta <nishkadg.linux@gmail.com> Link: https://lkml.kernel.org/r/20190804163445.6862-1-nishkadg.linux@gmail.com Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-08-07clk: qcom: gcc: Add global clock controller driver for SM8150Deepak Katragadda
Add the clocks supported in global clock controller which clock the peripherals like BLSPs, SDCC, USB, MDSS etc. Register all the clocks to the clock framework for the clients to be able to request for them. Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org> Signed-off-by: Taniya Das <tdas@codeaurora.org> [vkoul: port to upstream and tidy-up port to new parent scheme Add comments for critical clocks]] Signed-off-by: Vinod Koul <vkoul@kernel.org> Link: https://lkml.kernel.org/r/20190722074348.29582-6-vkoul@kernel.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-08-07clk: qcom: clk-alpha-pll: Add support for Trion PLLsDeepak Katragadda
Add programming sequence support for managing the Trion PLLs. Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org> Signed-off-by: Taniya Das <tdas@codeaurora.org> [vkoul: port to upstream and tidy-up use upstream way of specifying PLLs] Signed-off-by: Vinod Koul <vkoul@kernel.org> Link: https://lkml.kernel.org/r/20190722074348.29582-4-vkoul@kernel.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-08-07clk: qcom: clk-alpha-pll: Remove post_div_table checksVinod Koul
We want users to code properly and fix the post_div_table missing and not rely on core to check. So remove the post_div_table check. Signed-off-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lkml.kernel.org/r/20190722074348.29582-3-vkoul@kernel.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-08-07clk: qcom: clk-alpha-pll: Remove unnecessary castVinod Koul
Commit 8f9fab480c7a ("linux/kernel.h: fix overflow for DIV_ROUND_UP_ULL") fixed the overflow for DIV_ROUND_UP_ULL, so we no longer need the cast for DIV_ROUND_UP_ULL, so remove the unnecessary u64 casts. Signed-off-by: Vinod Koul <vkoul@kernel.org> Link: https://lkml.kernel.org/r/20190722074348.29582-2-vkoul@kernel.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-08-07clk: ingenic/jz4740: Fix "pll half" divider not read/written properlyPaul Cercueil
The code was setting the bit 21 of the CPCCR register to use a divider of 2 for the "pll half" clock, and clearing the bit to use a divider of 1. This is the opposite of how this register field works: a cleared bit means that the /2 divider is used, and a set bit means that the divider is 1. Restore the correct behaviour using the newly introduced .div_table field. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Link: https://lkml.kernel.org/r/20190701113606.4130-1-paul@crapouillou.net Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-08-07clk: Si5341/Si5340: remove redundant assignment to n_denColin Ian King
The variable n_den is initialized however that value is never read as n_den is re-assigned a little later in the two paths of a following if-statement. Remove the redundant assignment. Addresses-Coverity: ("Unused value") Signed-off-by: Colin Ian King <colin.king@canonical.com> Link: https://lkml.kernel.org/r/20190701165020.19840-1-colin.king@canonical.com Acked-by: Mike Looijmans <mike.looijmans@topic.nl> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-08-07clk: qoriq: Fix -Wunused-const-variableNathan Huckleberry
drivers/clk/clk-qoriq.c:138:38: warning: unused variable 'p5020_cmux_grp1' [-Wunused-const-variable] static const struct clockgen_muxinfo p5020_cmux_grp1 drivers/clk/clk-qoriq.c:146:38: warning: unused variable 'p5020_cmux_grp2' [-Wunused-const-variable] static const struct clockgen_muxinfo p5020_cmux_grp2 In the definition of the p5020 chip, the p2041 chip's info was used instead. The p5020 and p2041 chips have different info. This is most likely a typo. Link: https://github.com/ClangBuiltLinux/linux/issues/525 Cc: clang-built-linux@googlegroups.com Signed-off-by: Nathan Huckleberry <nhuck@google.com> Link: https://lkml.kernel.org/r/20190627220642.78575-1-nhuck@google.com Reviewed-by: Nick Desaulniers <ndesaulniers@google.com> Acked-by: Scott Wood <oss@buserror.net> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-08-07clk: aspeed: Add SDIO gateJoel Stanley
The clock divisor comes with an enable bit (gate). This was not implemented as we didn't have access to SD hardware when writing the driver. Now that we can test it, add the gate as a parent to the divisor. There is no reason to expose the gate separately, so users will enable it by turning on the ASPEED_CLK_SDIO divisor. Signed-off-by: Joel Stanley <joel@jms.id.au> [aj: Minor style cleanup] Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Link: https://lkml.kernel.org/r/20190710141009.20651-1-andrew@aj.id.au Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-08-03clk: imx8mq: Mark AHB clock as criticalAbel Vesa
Initially, the TMU_ROOT clock was marked as critical, which automatically made the AHB clock to stay always on. Since the TMU_ROOT clock is not marked as critical anymore, following commit: "clk: imx8mq: Remove CLK_IS_CRITICAL flag for IMX8MQ_CLK_TMU_ROOT" all the clocks that derive from ipg_root clock (and implicitly ahb clock) would also have to enable, along with their own gate, the AHB clock. But considering that AHB is actually a bus that has to be always on, we mark it as critical in the clock provider driver and then all the clocks that derive from it can be controlled through the dedicated per IP gate which follows after the ipg_root clock. Signed-off-by: Abel Vesa <abel.vesa@nxp.com> Tested-by: Daniel Baluta <daniel.baluta@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-03clk: imx8mn: Keep uart clocks on for early consoleAnson Huang
Call imx_register_uart_clocks() API to keep uart clocks enabled when earlyprintk or earlycon is active. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-03clk: imx: Remove unused function statementAnson Huang
imx_register_uart_clocks_hws() function is NOT implemented at all, remove it. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-03clk: imx7ulp: Make sure earlycon's clock is enabledAnson Huang
Earlycon's clock could be disabled during kernel boot up, if earlycon is enabled and its clock is gated, then kernel boot up will fail. Make sure earlycon's clock is enabled during kernel boot up. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-03clk: imx8mm: Switch to platform driverAbel Vesa
There is no strong reason for this to use CLK_OF_DECLARE instead of being a platform driver. Plus, this will now be aligned with the other i.MX8M clock drivers which are platform drivers. In order to make the clock provider a platform driver all the data and code needs to be outside of .init section. Signed-off-by: Abel Vesa <abel.vesa@nxp.com> Acked-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-03clk: imx: imx8mm: fix audio pll settingPeng Fan
The AUDIO PLL max support 650M, so the original clk settings violate spec. This patch makes the output 786432000 -> 393216000, and 722534400 -> 361267200 to aligned with NXP vendor kernel without any impact on audio functionality and go within 650MHz PLL limit. Cc: <stable@vger.kernel.org> Fixes: ba5625c3e272 ("clk: imx: Add clock driver support for imx8mm") Signed-off-by: Peng Fan <peng.fan@nxp.com> Acked-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-03clk: imx8mm: GPT1 clock mux option #5 should be sys_pll1_80mAnson Huang
i.MX8MM's GPT1 clock mux option #5 should be sys_pll1_80m, NOT sys_pll1_800m, correct it. Fixes: ba5625c3e272 ("clk: imx: Add clock driver support for imx8mm") Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-03clk: imx8mm: Fix typo of pwm3 clock's mux option #4Anson Huang
i.MX8MM has no sys3_pll2_out clock, PWM3 clock's mux option #4 should be sys_pll3_out, sys3_pll2_out is a typo, fix it. Fixes: ba5625c3e272 ("clk: imx: Add clock driver support for imx8mm") Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-03clk: imx: Remove unused clk based APIAbel Vesa
Now that the i.MX6 and i.MX7 clock drivers have been switched to clk_hw based, we can remove the clk based API that is not used by any i.MX clock driver. The following APIs are going away now: - imx_clk_busy_divider - imx_clk_busy_mux - imx_clk_fixup_divider - imx_clk_fixup_mux - imx_clk_mux_ldb - imx_clk_gate_dis_flags - imx_clk_gate_flags Signed-off-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-03clk: imx8mq: set correct parent for usb ctrl clocksLi Jun
Per latest imx8mq datasheet of CCM, the parent of usb1_ctrl_root_clk and usb2_ctrl_root_clk is usb_bus. Signed-off-by: Li Jun <jun.li@nxp.com> Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-03clk: imx8: Add DSP related clocksDaniel Baluta
i.MX8QXP contains Hifi4 DSP. There are four clocks associated with DSP: * dsp_lpcg_core_clk * dsp_lpcg_ipg_clk * dsp_lpcg_adb_aclk * ocram_lpcg_ipg_clk Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com> Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-03clk: imx8mq: Remove CLK_IS_CRITICAL flag for IMX8MQ_CLK_TMU_ROOTAnson Huang
IMX8MQ_CLK_TMU_ROOT is ONLY used for thermal module, the driver should manage this clock, so no need to have CLK_IS_CRITICAL flag set. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Acked-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-03clk: imx: Add support for i.MX8MN clock driverAnson Huang
This patch adds i.MX8MN clock driver support. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-03clk: imx8mm: rename 'share_count_dcss' to 'share_count_disp'Fancy Fang
Rename 'share_count_dcss' to 'share_count_disp', since the DCSS module does not exist on imx8mm platform. So rename it to avoid any unnecessary confusion. Signed-off-by: Fancy Fang <chen.fang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-03clk: imx8mm: correct the usb1_ctrl parent to be usb_busLi Jun
Per latest imx8mm datasheet of CCM, the parent of usb1_ctrl_root_clk should be usb_bus. Signed-off-by: Li Jun <jun.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-03clk: imx: Add API for clk unregister when driver probe failAnson Huang
For i.MX clock drivers probe fail case, clks should be unregistered in the return path, this patch adds a common API for i.MX clock drivers to unregister clocks when fail. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-03clk: imx8mm: Make 1416X/1443X PLL macro definitions common for usageAnson Huang
1416X/1443X PLL are used on i.MX8MM and i.MX8MN and maybe other i.MX8M series SoC later, the macro definitions of these PLLs' initialization should be common for usage. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-07-29clk: meson: remove clk input helperAlexandre Mergnat
The clk input function which allows clock controllers to register a bypass clock from a clock producer is no longer needed anymore since meson clock controllers have migrated to a new parent allocation method. Signed-off-by: Alexandre Mergnat <amergnat@baylibre.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2019-07-29clk: meson: remove ee input bypass clocksAlexandre Mergnat
During probe, bypass clocks (i.e. ee-in-xtal) are made from device-tree inputs to provide input clocks which can be access through global name. The cons of this method are the duplicated clocks, means more string comparison. Specify parent directly with device-tree clock name. Remove the bypass clock registration from the ee probe function. Signed-off-by: Alexandre Mergnat <amergnat@baylibre.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2019-07-29clk: meson: clk-regmap: migrate to new parent description methodAlexandre Mergnat
This clock controller use the string comparison method to describe parent relation between the clocks, which is not optimized. Migrate to the new way by using .parent_hws where possible (ie. when all clocks are local to the controller) and use .parent_data otherwise. Signed-off-by: Alexandre Mergnat <amergnat@baylibre.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2019-07-29clk: meson: meson8b: migrate to the new parent description methodAlexandre Mergnat
This clock controller use the string comparison method to describe parent relation between the clocks, which is not optimized. Migrate to the new way by using .parent_hws where possible (ie. when all clocks are local to the controller) and use .parent_data otherwise. Signed-off-by: Alexandre Mergnat <amergnat@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Tested-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2019-07-29clk: meson: axg: migrate to the new parent description methodAlexandre Mergnat
This clock controller use the string comparison method to describe parent relation between the clocks, which is not optimized. Migrate to the new way by using .parent_hws where possible (ie. when all clocks are local to the controller) and use .parent_data otherwise. Signed-off-by: Alexandre Mergnat <amergnat@baylibre.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2019-07-29clk: meson: gxbb: migrate to the new parent description methodAlexandre Mergnat
This clock controller use the string comparison method to describe parent relation between the clocks, which is not optimized. Migrate to the new way by using .parent_hws where possible (ie. when all clocks are local to the controller) and use .parent_data otherwise. Signed-off-by: Alexandre Mergnat <amergnat@baylibre.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2019-07-29clk: meson: g12a: migrate to the new parent description methodAlexandre Mergnat
This clock controller use the string comparison method to describe parent relation between the clocks, which is not optimized. Migrate to the new way by using .parent_hws where possible (ie. when all clocks are local to the controller) and use .parent_data otherwise. Signed-off-by: Alexandre Mergnat <amergnat@baylibre.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2019-07-29clk: meson: remove ao input bypass clocksAlexandre Mergnat
During probe, bypass clocks (i.e. ao-in-xtal) are made from device-tree inputs to provide input clocks which can be access through global name. The cons of this method are the duplicated clocks, means more string comparison. Specify parent directly with device-tree clock name. Function to regiter bypass clocks is removed. Input parameters from meson aoclk data structure are deprecated and then deleted since all aoclk files are migrated. Signed-off-by: Alexandre Mergnat <amergnat@baylibre.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2019-07-29clk: meson: axg-aoclk: migrate to the new parent description methodAlexandre Mergnat
This clock controller use the string comparison method to describe parent relation between the clocks, which is not optimized. Migrate to the new way by using .parent_hws where possible (when parent clocks are localy declared in the controller) and use .parent_data otherwise. Remove clk input helper and all bypass clocks (declared in probe function) which are no longer used since we are able to use device-tree clock name directly. Signed-off-by: Alexandre Mergnat <amergnat@baylibre.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2019-07-29clk: meson: gxbb-aoclk: migrate to the new parent description methodAlexandre Mergnat
This clock controller use the string comparison method to describe parent relation between the clocks, which is not optimized. Migrate to the new way by using .parent_hws where possible (when parent clocks are localy declared in the controller) and use .parent_data otherwise. Remove clk input helper and all bypass clocks (declared in probe function) which are no longer used since we are able to use device-tree clock name directly. Signed-off-by: Alexandre Mergnat <amergnat@baylibre.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
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