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2022-12-12Merge branches 'clk-bindings', 'clk-renesas', 'clk-amlogic', 'clk-allwinner' ↵Stephen Boyd
and 'clk-ti' into clk-next * clk-bindings: dt-bindings: clock: ti,cdce925: Convert to DT schema * clk-renesas: (26 commits) clk: renesas: r8a779f0: Fix Ethernet Switch clocks clk: renesas: r8a779g0: Add Z0 clock support clk: renesas: r8a779g0: Add CMT clocks clk: renesas: r8a779g0: Add TMU and SASYNCRT clocks clk: renesas: r8a779f0: Fix SCIF parent clocks clk: renesas: r8a779f0: Fix HSCIF parent clocks clk: renesas: r9a06g032: Repair grave increment error clk: renesas: rzg2l: Don't assume all CPG_MOD clocks support PM clk: renesas: rzg2l: Fix typo in struct rzg2l_cpg_priv kerneldoc clk: renesas: r8a779a0: Fix SD0H clock name clk: renesas: r8a779g0: Add RPC-IF clock clk: renesas: r8a779g0: Add SDHI clocks clk: renesas: r8a779f0: Add SASYNCPER internal clock clk: renesas: r8a779f0: Fix SD0H clock name clk: renesas: r9a07g043: Drop WDT2 clock and reset entry clk: renesas: r9a07g044: Drop WDT2 clock and reset entry clk: renesas: r8a779g0: Add TPU clock clk: renesas: r8a779g0: Add PWM clock clk: renesas: r8a779g0: Add SCIF clocks clk: renesas: r9a07g044: Add MTU3a clock and reset entry ... * clk-amlogic: clk: meson: pll: add pcie lock retry workaround clk: meson: pll: adjust timeout in meson_clk_pll_wait_lock() * clk-allwinner: clk: sunxi-ng: f1c100s: Add IR mod clock clk: sunxi-ng: v3s: Correct the header guard of ccu-sun8i-v3s.h * clk-ti: clk: ti: fix typo in ti_clk_retry_init() code comment clk: ti: dra7-atl: don't allocate `parent_names' variable clk: ti: change ti_clk_register[_omap_hw]() API
2022-12-12Merge branches 'clk-x86', 'clk-xilinx', 'clk-cleanup', 'clk-mstar' and ↵Stephen Boyd
'clk-ingenic' into clk-next - Make MxL's CGU driver secure compatible - Support for CPU PLL on MStar/SigmaStar SoCs - Ingenic JZ4755 SoC clk support - Support audio clks on X1000 SoCs * clk-x86: clk: mxl: syscon_node_to_regmap() returns error pointers clk: mxl: Fix a clk entry by adding relevant flags clk: mxl: Add option to override gate clks clk: mxl: Remove redundant spinlocks clk: mxl: Switch from direct readl/writel based IO to regmap based IO * clk-xilinx: clk: xilinx: Drop duplicate depends on COMMON_CLK * clk-cleanup: clk: nomadik: correct struct name kernel-doc warning clk: lmk04832: fix kernel-doc warnings clk: lmk04832: drop superfluous #include clk: lmk04832: drop unnecessary semicolons clk: lmk04832: declare variables as const when possible clk: socfpga: Fix memory leak in socfpga_gate_init() clk: st: Fix memory leak in st_of_quadfs_setup() clk: samsung: Fix memory leak in _samsung_clk_register_pll() clk: visconti: Fix memory leak in visconti_register_pll() clk: Remove a useless include clk: samsung: Fix reference to CLK_OF_DECLARE in comment clk: stm32mp1: Staticize ethrx_src clk: keystone: syscon-clk: Use dev_err_probe() helper clk: bulk: Use dev_err_probe() helper in __clk_bulk_get() clk: cdce925: simplify using devm_regulator_get_enable() * clk-mstar: clk: mstar: msc313 cpupll clk driver * clk-ingenic: clk: Add Ingenic JZ4755 CGU driver dt-bindings: clock: Add Ingenic JZ4755 CGU header dt-bindings: ingenic: Add support for the JZ4755 CGU clk: ingenic: Minor cosmetic fixups for X1000 clk: ingenic: Add X1000 audio clocks dt-bindings: ingenic,x1000-cgu: Add audio clocks clk: ingenic: Add .set_rate_hook() for PLL clocks clk: ingenic: Make PLL clock enable_bit and stable_bit optional clk: ingenic: Make PLL clock "od" field optional
2022-12-12Merge tag 'soc-drivers-6.2' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC driver updates from Arnd Bergmann: "There are few major updates in the SoC specific drivers, mainly the usual reworks and support for variants of the existing SoC. While this remains Arm centric for the most part, the branch now also contains updates to risc-v and loongarch specific code in drivers/soc/. Notable changes include: - Support for the newly added Qualcomm Snapdragon variants (MSM8956, MSM8976, SM6115, SM4250, SM8150, SA8155 and SM8550) in the soc ID, rpmh, rpm, spm and powerdomain drivers. - Documentation for the somewhat controversial qcom,board-id properties that are required for booting a number of machines - A new SoC identification driver for the loongson-2 (loongarch) platform - memory controller updates for stm32, tegra, and renesas. - a new DT binding to better describe LPDDR2/3/4/5 chips in the memory controller subsystem - Updates for Tegra specific drivers across multiple subsystems, improving support for newer SoCs and better identification - Minor fixes for Broadcom, Freescale, Apple, Renesas, Sifive, TI, Mediatek and Marvell SoC drivers" * tag 'soc-drivers-6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (137 commits) soc: qcom: socinfo: Add SM6115 / SM4250 SoC IDs to the soc_id table dt-bindings: arm: qcom,ids: Add SoC IDs for SM6115 / SM4250 and variants soc: qcom: socinfo: Add SM8150 and SA8155 SoC IDs to the soc_id table dt-bindings: arm: qcom,ids: Add SoC IDs for SM8150 and SA8155 dt-bindings: soc: qcom: apr: document generic qcom,apr compatible soc: qcom: Select REMAP_MMIO for ICC_BWMON driver soc: qcom: Select REMAP_MMIO for LLCC driver soc: qcom: rpmpd: Add SM4250 support dt-bindings: power: rpmpd: Add SM4250 support dt-bindings: soc: qcom: aoss: Add compatible for SM8550 soc: qcom: llcc: Add configuration data for SM8550 dt-bindings: arm: msm: Add LLCC compatible for SM8550 soc: qcom: llcc: Add v4.1 HW version support soc: qcom: socinfo: Add SM8550 ID soc: qcom: rpmh-rsc: Avoid unnecessary checks on irq-done response soc: qcom: rpmh-rsc: Add support for RSC v3 register offsets soc: qcom: rpmhpd: Add SM8550 power domains dt-bindings: power: rpmpd: Add SM8550 to rpmpd binding soc: qcom: socinfo: Add MSM8956/76 SoC IDs to the soc_id table dt-bindings: arm: qcom,ids: Add SoC IDs for MSM8956 and MSM8976 ...
2022-12-09clk: nomadik: correct struct name kernel-doc warningRandy Dunlap
Use the correct struct name for the kernel-doc notation to prevent a kernel-doc warning: clk-nomadik.c:148: warning: expecting prototype for struct clk_pll1. Prototype was for struct clk_pll instead Fixes: ef6eb322ce57 ("clk: nomadik: implement the Nomadik clocks properly") Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Reported-by: kernel test robot <lkp@intel.com> Cc: Mauro Carvalho Chehab <mchehab@kernel.org> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: linux-arm-kernel@lists.infradead.org Cc: Michael Turquette <mturquette@baylibre.com> Cc: Stephen Boyd <sboyd@kernel.org> Cc: linux-clk@vger.kernel.org Link: https://lore.kernel.org/r/20221209002016.14776-1-rdunlap@infradead.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-12-08clk: lmk04832: fix kernel-doc warningsLiam Beguin
Fix syntax generating the following kernel-doc warnings: drivers/clk/clk-lmk04832.c:189: warning: cannot understand function prototype: 'struct lmk04832_device_info ' drivers/clk/clk-lmk04832.c:193: warning: Function parameter or member 'pid' not described in 'lmk04832_device_info' drivers/clk/clk-lmk04832.c:193: warning: Function parameter or member 'maskrev' not described in 'lmk04832_device_info' drivers/clk/clk-lmk04832.c:193: warning: Function parameter or member 'num_channels' not described in 'lmk04832_device_info' drivers/clk/clk-lmk04832.c:193: warning: Function parameter or member 'vco0_range' not described in 'lmk04832_device_info' drivers/clk/clk-lmk04832.c:193: warning: Function parameter or member 'vco1_range' not described in 'lmk04832_device_info' drivers/clk/clk-lmk04832.c:420: warning: No description found for return value of 'lmk04832_check_vco_ranges' drivers/clk/clk-lmk04832.c:459: warning: No description found for return value of 'lmk04832_calc_pll2_params' Signed-off-by: Liam Beguin <liambeguin@gmail.com> Link: https://lore.kernel.org/r/20221120030257.531153-5-liambeguin@gmail.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-12-08clk: lmk04832: drop superfluous #includeLiam Beguin
iwyu warnings: (new ones prefixed by >>) >> drivers/clk/clk-lmk04832.c:15:1: iwyu: warning: superfluous #include <linux/debugfs.h> >> drivers/clk/clk-lmk04832.c:20:1: iwyu: warning: superfluous #include <linux/uaccess.h> Reported-by: kernel test robot <lkp@intel.com> Link: https://lore.kernel.org/all/202107110620.926Sm95z-lkp@intel.com/ Signed-off-by: Liam Beguin <liambeguin@gmail.com> Link: https://lore.kernel.org/r/20221120030257.531153-4-liambeguin@gmail.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-12-08clk: lmk04832: drop unnecessary semicolonsLiam Beguin
Semicolons on the closing brace of a function definition are unnecessary, remove them. Signed-off-by: Liam Beguin <liambeguin@gmail.com> Link: https://lore.kernel.org/r/20221120030257.531153-3-liambeguin@gmail.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-12-08clk: lmk04832: declare variables as const when possibleLiam Beguin
Fix the following warning reported by the kernel test robot. cppcheck possible warnings: (new ones prefixed by >>, may not real problems) >> drivers/clk/clk-lmk04832.c:357:15: warning: Variable 'pll2_p' can be declared with const [constVariable] unsigned int pll2_p[] = {8, 2, 2, 3, 4, 5, 6, 7}; Reported-by: kernel test robot <lkp@intel.com> Link: https://lore.kernel.org/all/202203312017.5YW13Jr4-lkp@intel.com/ Signed-off-by: Liam Beguin <liambeguin@gmail.com> Link: https://lore.kernel.org/r/20221120030257.531153-2-liambeguin@gmail.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-12-08clk: socfpga: Fix memory leak in socfpga_gate_init()Xiu Jianfeng
Free @socfpga_clk and @ops on the error path to avoid memory leak issue. Fixes: a30a67be7b6e ("clk: socfpga: Don't have get_parent for single parent ops") Signed-off-by: Xiu Jianfeng <xiujianfeng@huawei.com> Link: https://lore.kernel.org/r/20221123031622.63171-1-xiujianfeng@huawei.com Acked-by: Dinh Nguyen <dinguyen@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-12-08clk: microchip: enable the MPFS clk driver by default if SOC_MICROCHIP_POLARFIREConor Dooley
With the intent of removing driver selects from Kconfig.socs in arch/riscv, essential drivers that were being selected there could instead by enabled by defaulting them to the value of the SoC's Kconfig symbol. Do so here & drop the depend on RISC-V - the SOC_ symbols are only defined there anyway. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20221123161921.81195-1-conor@kernel.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-12-07clk: st: Fix memory leak in st_of_quadfs_setup()Xiu Jianfeng
If st_clk_register_quadfs_pll() fails, @lock should be freed before goto @err_exit, otherwise will cause meory leak issue, fix it. Signed-off-by: Xiu Jianfeng <xiujianfeng@huawei.com> Link: https://lore.kernel.org/r/20221122133614.184910-1-xiujianfeng@huawei.com Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-12-07clk: samsung: Fix memory leak in _samsung_clk_register_pll()Xiu Jianfeng
If clk_register() fails, @pll->rate_table may have allocated memory by kmemdup(), so it needs to be freed, otherwise will cause memory leak issue, this patch fixes it. Fixes: 3ff6e0d8d64d ("clk: samsung: Add support to register rate_table for samsung plls") Signed-off-by: Xiu Jianfeng <xiujianfeng@huawei.com> Link: https://lore.kernel.org/r/20221123032015.63980-1-xiujianfeng@huawei.com Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-12-07clk: Add trace events for rate requestsMaxime Ripard
It is currently fairly difficult to follow what clk_rate_request are issued, and how they have been modified once done. Indeed, there's multiple paths that can be taken, some functions are recursive and will just forward the request to its parent, etc. Adding a lot of debug prints is just not very convenient, so let's add trace events for the clock requests, one before they are submitted and one after they are returned. That way we can simply toggle the tracing on without modifying the kernel code and without affecting performances or the kernel logs too much. Reviewed-by: Steven Rostedt (Google) <rostedt@goodmis.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20221018-clk-rate-request-tracing-v2-2-5170b363c413@cerno.tech Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-12-07clk: Store clk_core for clk_rate_requestMaxime Ripard
The struct clk_rate_request is meant to store the context around a rate request such as the parent, boundaries, and so on. However, it doesn't store the clock the rate request is submitted to, which makes debugging difficult. Let's add a pointer to the relevant clk_core instance in order to improve the debugging of rate requests in a subsequent patch. Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20221018-clk-rate-request-tracing-v2-1-5170b363c413@cerno.tech Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-12-07clk: socfpga: remove the setting of clk-phase for sdmmc_clkDinh Nguyen
Now that the SDMMC driver supports setting the clk-phase, we can remove the need to do it in the clock driver. Acked-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> Link: https://lore.kernel.org/r/20221114230217.202634-5-dinguyen@kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2022-12-06clk: qcom: rpmh: add support for SM6350 rpmh IPA clockLuca Weiss
The IPA core clock is required for SM6350. Define it. Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> [elder@linaro.org: rebased with Dmitry's changes] Signed-off-by: Alex Elder <elder@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221202221240.225720-1-elder@linaro.org
2022-12-06clk: qcom: mmcc-msm8974: use parent_hws/_data instead of parent_namesDmitry Baryshkov
Convert the clock driver to specify parent data rather than parent names, to actually bind using 'clock-names' specified in the DTS rather than global clock names. Use parent_hws where possible to refer parent clocks directly, skipping the lookup. Note, the system names for xo clocks were changed from "xo" to "xo_board" to follow the example of other platforms. This switches the clocks to use DT-provided "xo_board" clock instead of manually registered "xo" clock and allows us to drop qcom_cc_register_board_clk() call from the driver at some point. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221204124508.1415713-9-dmitry.baryshkov@linaro.org
2022-12-06clk: qcom: mmcc-msm8974: move clock parent tables downDmitry Baryshkov
Move clock parent tables down, after the PLL declarataions, so that we can use pll hw clock fields in the next commit. Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221204124508.1415713-8-dmitry.baryshkov@linaro.org
2022-12-06clk: qcom: mmcc-msm8974: use ARRAY_SIZE instead of specifying num_parentsDmitry Baryshkov
Use ARRAY_SIZE() instead of manually specifying num_parents. This makes adding/removing entries to/from parent_data easy and errorproof. Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221204124508.1415713-7-dmitry.baryshkov@linaro.org
2022-12-06clk: qcom: gcc-msm8974: use parent_hws/_data instead of parent_namesDmitry Baryshkov
Convert the clock driver to specify parent data rather than parent names, to actually bind using 'clock-names' specified in the DTS rather than global clock names. Use parent_hws where possible to refer parent clocks directly, skipping the lookup. Note, the system names for xo clocks were changed from "xo" to "xo_board" to follow the example of other platforms. This switches the clocks to use DT-provided "xo_board" clock instead of manually registered "xo" clock and allows us to drop qcom_cc_register_board_clk() call from the driver at some point. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221204124508.1415713-6-dmitry.baryshkov@linaro.org
2022-12-06clk: qcom: gcc-msm8974: move clock parent tables downDmitry Baryshkov
Rearrage clock parent tables and PLL declarations (pull parents down and gpll4 up), so that we can use pll hw clock fields in the next commit. Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221204124508.1415713-5-dmitry.baryshkov@linaro.org
2022-12-06clk: qcom: gcc-msm8974: use ARRAY_SIZE instead of specifying num_parentsDmitry Baryshkov
Use ARRAY_SIZE() instead of manually specifying num_parents. This makes adding/removing entries to/from parent_data easy and errorproof. Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221204124508.1415713-4-dmitry.baryshkov@linaro.org
2022-12-05clk: qcom: gcc-ipq4019: switch to devm_clk_notifier_registerRobert Marko
Switch to using devres-managed version of clk_notifier_register(). This allows us to drop driver's remove() callback. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221205113545.575702-1-robert.marko@sartura.hr
2022-12-02clk: qcom: rpmh: remove usage of platform nameDmitry Baryshkov
Now that all clocks have individual names, remove the names of SoCs from the RPMH clock definitions. Replace it with the common clk_rpmh_ prefix. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Alex Elder <elder@linaro.org> Reviewed-by: Bjorn Andersson <andersson@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221202185843.721673-9-dmitry.baryshkov@linaro.org
2022-12-02clk: qcom: rpmh: rename VRM clock dataDmitry Baryshkov
RPMH VRM clocks are frequently shared between several platforms. It makes little sense to encode the SoC name into the clock name, if the same clock is used for other SoCs. Rework the VRM clock definitions to add resource-specific suffix. Keep the userspace-visible clock name, but encode the part of cmd resource and the divider into the variable name. This also make it obvious which variant is used, making the code less error-prone. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Alex Elder <elder@linaro.org> Reviewed-by: Bjorn Andersson <andersson@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221202185843.721673-8-dmitry.baryshkov@linaro.org
2022-12-02clk: qcom: rpmh: rename ARC clock dataDmitry Baryshkov
RPMH ARC clocks are frequently shared between several platforms. It makes little sense to encode the SoC name into the clock name, if the same clock is used for other SoCs. Rework the ARC clock definitions to remove the SoC name. Keep the userspace-visible clock name, but encode the divider into the variable name. This also makes it obvious which divider is used by the platform, making the code less error-prone. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Alex Elder <elder@linaro.org> Reviewed-by: Bjorn Andersson <andersson@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221202185843.721673-7-dmitry.baryshkov@linaro.org
2022-12-02clk: qcom: rpmh: support separate symbol name for the RPMH clocksDmitry Baryshkov
Both ARC and VRM clocks have minor differences between platforms. However using SoC names directly results in duplication, confusion and occasional errors. Next patches are going to drop the SoC names and encode these differences into the clock names. To keep the system clock names (visible to userspace) intact, add separate symbol names that are used in the code. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Alex Elder <elder@linaro.org> Reviewed-by: Bjorn Andersson <andersson@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221202185843.721673-6-dmitry.baryshkov@linaro.org
2022-12-02clk: qcom: rpmh: remove platform names from BCM clocksDmitry Baryshkov
There are no platform-specific parts in the BCM clocks, drop the platform name from the clock definitions, replacing it with clk_rpmh to have the common prefix. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Alex Elder <elder@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Bjorn Andersson <andersson@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221202185843.721673-5-dmitry.baryshkov@linaro.org
2022-12-02clk: qcom: rpmh: drop all _ao namesDmitry Baryshkov
In preparation for the further cleanup, remove the active only names, they can be easily generated from the standard ones. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Alex Elder <elder@linaro.org> Reviewed-by: Abel Vesa <abel.vesa@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Bjorn Andersson <andersson@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221202185843.721673-4-dmitry.baryshkov@linaro.org
2022-12-02clk: qcom: rpmh: reuse common duplicate clocksDmitry Baryshkov
After the grouping it is obvious that some of the clock definitions are pure duplicates. Rename them to use a single common name for the clock. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Alex Elder <elder@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Bjorn Andersson <andersson@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221202185843.721673-3-dmitry.baryshkov@linaro.org
2022-12-02clk: qcom: rpmh: group clock definitions togetherDmitry Baryshkov
In preparations to the further changes, group all RPMH clock definitions to ease review. Group the clocks by their type to make similar/duplicate clocks stand out. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Alex Elder <elder@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Bjorn Andersson <andersson@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221202185843.721673-2-dmitry.baryshkov@linaro.org
2022-12-02clk: qcom: rpm: drop the platform from clock definitionsDmitry Baryshkov
A single clock definition can be used on different platforms. Thus the platform part of the clock name is not correct (and can be misleading). Remove the platform-specific part of the defined clock. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Bjorn Andersson <andersson@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221202070814.482470-5-dmitry.baryshkov@linaro.org
2022-12-02clk: qcom: rpm: drop the _clk suffix completelyDmitry Baryshkov
Drop the _clk suffix from other clocks too. This does not produce any user-visible changes, just syntax sugar. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Bjorn Andersson <andersson@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221202070814.482470-4-dmitry.baryshkov@linaro.org
2022-12-02clk: qcom: rpm: drop separate active-only namesDmitry Baryshkov
To simplify code reviews remove duplication between normal and active-only clock names. Get a single clock name and generate both names internally. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Bjorn Andersson <andersson@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221202070814.482470-3-dmitry.baryshkov@linaro.org
2022-12-02clk: qcom: rpm: remove unused active-only clock namesDmitry Baryshkov
The RPM_FIXED and RPM_XO_BUFFER clocks do not have the active-only counterparts. Drop corresponding unused arguments. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Bjorn Andersson <andersson@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221202070814.482470-2-dmitry.baryshkov@linaro.org
2022-12-01clk: qcom: Add GCC driver for SM8550Abel Vesa
Add Global Clock controller (GCC) driver for SM8550 SoC, which includes the gcc resets and gdsc. This patch is based on an initial downstream driver. Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221130112852.2977816-6-abel.vesa@linaro.org
2022-12-01clk: qcom: Add LUCID_OLE PLL type for SM8550Abel Vesa
Add a LUCID_OLE PLL type for SM8550 SoC from Qualcomm. Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221130112852.2977816-5-abel.vesa@linaro.org
2022-12-01clk: qcom: gdsc: Increase status poll timeoutAbel Vesa
The SM8550 GCC GDSCs need a higher timeout value when polling for status, so increase it to 1500us, while leaving the delay between disable-enable sequence for votable gdscs to stay the same. Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221130112852.2977816-4-abel.vesa@linaro.org
2022-12-01clk: qcom: gcc-msm8939: Add rates to the GP clocksLin, Meng-Bo
Similar to msm8916, msm8939 has (at least) 6 "General Purpose" clocks that can be muxed to SoC pins. These clocks are: GP_CLK{0, 1} : GPIO_{31, 32} (Belongs to CAMSS according to Linux) GP_CLK_{1-3}{A, B} : GPIO_{49-51, 97, 12, 13} (Belongs to GCC itself) GP_MN : GPIO_110 (Doesn't seem to be described in gcc, ignored in this patch) Those clocks may be used as e.g. PWM sources for external peripherals. Add more frequencies to the table for those clocks so it's possible for arbitrary peripherals to make use of them. Reference: https://lore.kernel.org/r/20220612145955.385787-5-nikita@trvn.ru Signed-off-by: Lin, Meng-Bo <linmengbo0689@protonmail.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221117171343.24216-1-linmengbo0689@protonmail.com
2022-12-01clk: qcom: hfpll: use devm_platform_get_and_ioremap_resource()Minghao Chi
Convert platform_get_resource(), devm_ioremap_resource() to a single call to devm_platform_get_and_ioremap_resource(), as this is exactly what this function does. Signed-off-by: Minghao Chi <chi.minghao@zte.com.cn> Signed-off-by: ye xingchen <ye.xingchen@zte.com.cn> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/202211171403340042731@zte.com.cn
2022-12-01clk: qcom: ipq8074: populate fw_name for all parentsRobert Marko
It appears that having only .name populated in parent_data for clocks which are only globally searchable currently will not work as the clk core won't copy that name if there is no .fw_name present as well. So, populate .fw_name for all parent clocks in parent_data. Fixes: ae55ad32e273 ("clk: qcom: ipq8074: convert to parent data") Co-developed-by: Christian Marangi <ansuelsmth@gmail.com> Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Signed-off-by: Robert Marko <robimarko@gmail.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221116214655.1116467-1-robimarko@gmail.com
2022-12-01clk: qcom: krait-cc: convert to parent_data APIChristian Marangi
Modernize the krait-cc driver to parent-data API and refactor to drop any use of parent_names. From Documentation all the required clocks should be declared in DTS so fw_name can be correctly used to get the parents for all the muxes. .name is also declared to save compatibility with old DT. While at it also drop some hardcoded index and introduce an enum to make index values more clear. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221109005631.3189-5-ansuelsmth@gmail.com
2022-12-01clk: qcom: krait-cc: convert to devm_clk_hw_registerChristian Marangi
clk_register is now deprecated. Convert the driver to devm_clk_hw_register. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221109005631.3189-4-ansuelsmth@gmail.com
2022-12-01clk: qcom: krait-cc: handle secondary mux sourcing out of acpu_auxChristian Marangi
Some bootloader may leave the system in an even more undefined state with the secondary mux of L2 or other cores sourcing out of the acpu_aux parent. This results in the clk set to the PXO rate or a PLL8 rate. The current logic to reset the mux and set them to a defined state only handle if the mux are configured to source out of QSB. Change this and force a new and defined state if the current clk is lower than the aux rate. This way we can handle any wrong configuration where the mux is sourcing out of QSB (rate 225MHz, currently set to a virtual rate of 1), PXO rate (rate 25MHz) or PLL8 (needs to be configured to run at 384Mhz). Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221109005631.3189-3-ansuelsmth@gmail.com
2022-12-01clk: qcom: krait-cc: also enable secondary mux and div clkChristian Marangi
clk-krait ignore any rate change if clk is not flagged as enabled. Correctly enable the secondary mux and div clk to correctly change rate instead of silently ignoring the request. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221109005631.3189-2-ansuelsmth@gmail.com
2022-12-01clk: qcom: krait-cc: fix wrong parent order for secondary muxChristian Marangi
The secondary mux parent order is swapped. This currently doesn't cause problems as the secondary mux is used for idle clk and as a safe clk source while reprogramming the hfpll. Each mux have 2 or more output but he always have a safe source to switch while reprogramming the connected pll. We use a clk notifier to switch to the correct parent before clk core can apply the correct rate. The parent to switch is hardcoded in the mux struct. For the secondary mux the safe source to use is the qsb parent as it's the only fixed clk as the acpus_aux is a pll that can source from pxo or from pll8. The hardcoded safe parent for the secondary mux is set to index 0 that in the secondary mux map is set to 2. But the index 0 is actually acpu_aux in the parent list. Fix the swapped parents to correctly handle idle frequency and output a sane clk_summary report. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221109005631.3189-1-ansuelsmth@gmail.com
2022-12-01clk: qcom: krait-cc: use devm variant for clk notifier registerChristian Marangi
Use devm variant for clk notifier register and correctly handle free resource on driver remove. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221108215827.30475-1-ansuelsmth@gmail.com
2022-12-01clk: qcom: clk-krait: fix wrong div2 functionsChristian Marangi
Currently div2 value is applied to the wrong bits. This is caused by a bug in the code where the shift is done only for lpl, for anything else the mask is not shifted to the correct bits. Fix this by correctly shift if lpl is not supported. Fixes: 4d7dc77babfe ("clk: qcom: Add support for Krait clocks") Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221108215625.30186-1-ansuelsmth@gmail.com
2022-12-01clk: qcom: kpss-xcc: register it as clk providerChristian Marangi
krait-cc use this driver for the secondary mux. Register it as a clk provider to correctly use this clk in other drivers. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221108211734.3707-1-ansuelsmth@gmail.com
2022-12-01clk: qcom: ipq8074: add missing networking resetsRobert Marko
Downstream QCA 5.4 kernel defines networking resets which are not present in the mainline kernel but are required for the networking drivers. So, port the downstream resets and avoid using magic values for mask, construct mask for resets which require multiple bits to be set/cleared. Signed-off-by: Robert Marko <robimarko@gmail.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221107132901.489240-3-robimarko@gmail.com
generated by cgit (git 2.34.1) at 2025-09-23 16:35:13 +0000