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path: root/drivers/clk
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2022-10-04clk: qcom: gcc-sm6375: Ensure unsigned long typeStephen Boyd
This PLL frequency needs a UL postfix to avoid compiler warnings on 32-bit architectures. Fixes: 184fdd873d83 ("clk: qcom: Add global clock controller driver for SM6375") Cc: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-10-04clk: qcom: gcc-sm6375: Remove unused variablesKonrad Dybcio
gcc_parent_data_15 and gcc_parent_map_15 are not used in this driver. Remove them. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Link: https://lore.kernel.org/r/20221003211438.25691-1-konrad.dybcio@somainline.org Fixes: 184fdd873d83 ("clk: qcom: Add global clock controller driver for SM6375") Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-10-03clk: qcom: kpss-xcc: convert to parent data APIChristian Marangi
Convert the driver to parent data API. From the Documentation pll8_vote and pxo should be declared in the DTS so fw_name can be used instead of parent_names. .name is changed to the legacy pxo_board following how it's declared in other drivers. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Link: https://lore.kernel.org/r/20220914144743.17369-2-ansuelsmth@gmail.com Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-10-03clk: allow building lan966x as a moduleClément Léger
Set the COMMON_CLK_LAN966X option as a tristate and switch from builtin_platform_driver() to module_platform_driver() to allow building and using this driver as a module. Signed-off-by: Clément Léger <clement.leger@bootlin.com> Link: https://lore.kernel.org/r/20220617103306.489466-1-clement.leger@bootlin.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-10-03clk: clk-xgene: simplify if-if to if-elseYihao Han
Replace `if (!pclk->param.csr_reg)` with `else` for simplification and add curly brackets according to the kernel coding style: "Do not unnecessarily use braces where a single statement will do." ... "This does not apply if only one branch of a conditional statement is a single statement; in the latter case use braces in both branches" Please refer to: https://www.kernel.org/doc/html/v5.17-rc8/process/coding-style.html Signed-off-by: Yihao Han <hanyihao@vivo.com> Link: https://lore.kernel.org/r/20220408130617.14963-1-hanyihao@vivo.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-10-03clk: ast2600: BCLK comes from EPLLJoel Stanley
This correction was made in the u-boot SDK recently. There are no in-tree users of this clock so the impact is minimal. Fixes: d3d04f6c330a ("clk: Add support for AST2600 SoC") Link: https://github.com/AspeedTech-BMC/u-boot/commit/8ad54a5ae15f27fea5e894cc2539a20d90019717 Signed-off-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20220421040426.171256-1-joel@jms.id.au Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-10-03clk: clocking-wizard: Depend on HAS_IOMEMStephen Boyd
This driver uses devm_platform_ioremap_resource() and thus depends on HAS_IOMEM. Add the Kconfig dependency to avoid build issues. Reported-by: kernel test robot <lkp@intel.com> Cc: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> Fixes: c822490f52da ("clk: clocking-wizard: Move clocking-wizard out") Link: https://lore.kernel.org/r/20221003202608.2611295-1-sboyd@kernel.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-10-03clk: clocking-wizard: Use dev_err_probe() helperYang Yingliang
dev_err() can be replace with dev_err_probe() which will check if error code is -EPROBE_DEFER. Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Link: https://lore.kernel.org/r/20220913031442.980720-1-yangyingliang@huawei.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-10-03Merge tag 'acpi-6.1-rc1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm Pull ACPI updates from Rafael Wysocki: "ACPI and PNP updates for 6.1-rc1. These rearrange the ACPI device object initialization code (to get rid of a redundant parent pointer from struct acpi_device among other things), unify the _UID handling, drop support for some _OSI strings that should not be necessary any more, add new IDs to support more hardware and some more quirks, fix a few issues and clean up code all over. Specifics: - Reimplement acpi_get_pci_dev() using the list of physical devices associated with the given ACPI device object (Rafael Wysocki) - Rename ACPI device object reference counting functions (Rafael Wysocki) - Rearrange ACPI device object initialization code (Rafael Wysocki) - Drop parent field from struct acpi_device (Rafael Wysocki) - Extend the the int3472-tps68470 driver to support multiple consumers of a single TPS68470 along with the requisite framework-level support (Daniel Scally) - Filter out non-memory resources in is_memory(), add a helper function to find all memory type resources of an ACPI device object and use that function in 3 places (Heikki Krogerus) - Add IRQ override quirks for Asus Vivobook K3402ZA/K3502ZA and ASUS model S5402ZA (Tamim Khan, Kellen Renshaw) - Fix acpi_dev_state_d0() kerneldoc (Sakari Ailus) - Fix up suspend-to-idle support on ASUS Rembrandt laptops (Mario Limonciello) - Clean up ACPI platform devices support code (Andy Shevchenko, John Garry) - Clean up ACPI bus management code (Andy Shevchenko, ye xingchen) - Add support for multiple DMA windows with different offsets to the ACPI device enumeration code and use it on LoongArch (Jianmin Lv) - Clean up the ACPI LPSS (Intel SoC) driver (Andy Shevchenko) - Add a quirk for Dell Inspiron 14 2-in-1 for StorageD3Enable (Mario Limonciello) - Drop unused dev_fmt() and redundant 'HMAT' prefix from the HMAT parsing code (Liu Shixin) - Make ACPI FPDT parsing code avoid calling acpi_os_map_memory() on invalid physical addresses (Hans de Goede) - Silence missing-declarations warning related to Apple device properties management (Lukas Wunner) - Disable frequency invariance in the CPPC library if registers used by cppc_get_perf_ctrs() are accessed via PCC (Jeremy Linton) - Add ACPI disabled check to acpi_cpc_valid() (Perry Yuan) - Fix Tx acknowledge in the PCC address space handler (Huisong Li) - Use wait_for_completion_timeout() for PCC mailbox operations (Huisong Li) - Release resources on PCC address space setup failure path (Rafael Mendonca) - Remove unneeded result variables from APEI code (ye xingchen) - Print total number of records found during BERT log parsing (Dmitry Monakhov) - Drop support for 3 _OSI strings that should not be necessary any more and update documentation on custom _OSI strings so that adding new ones is not encouraged any more (Mario Limonciello) - Drop unneeded result variable from ec_write() (ye xingchen) - Remove the leftover struct acpi_ac_bl from the ACPI AC driver (Hanjun Guo) - Reorder symbols to get rid of a few forward declarations in the ACPI fan driver (Uwe Kleine-König) - Add Toshiba Satellite/Portege Z830 ACPI backlight quirk (Arvid Norlander) - Add ARM DMA-330 controller to the supported list in the ACPI AMBA driver (Vijayenthiran Subramaniam) - Drop references to non-functional 01.org/linux-acpi web site from MAINTAINERS and Kconfig help texts (Rafael Wysocki) - Replace strlcpy() with unused retval with strscpy() in the ACPI support code (Wolfram Sang) - Do not initialize ret in main() in the pfrut utility (Shi junming) - Drop useless ACPI DSDT override documentation (Rafael Wysocki) - Fix a few typos and wording mistakes in the ACPI device enumeration documentation (Jean Delvare) - Introduce acpi_dev_uid_to_integer() to convert a _UID string into an integer value (Andy Shevchenko) - Use acpi_dev_uid_to_integer() in several places to unify _UID handling (Andy Shevchenko) - Drop unused pnpid32_to_pnpid() declaration from PNP code (Gaosheng Cui)" * tag 'acpi-6.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (79 commits) ACPI: LPSS: Deduplicate skipping device in acpi_lpss_create_device() ACPI: LPSS: Replace loop with first entry retrieval ACPI: x86: s2idle: Add another ID to s2idle_dmi_table ACPI: x86: s2idle: Fix a NULL pointer dereference MAINTAINERS: Drop records pointing to 01.org/linux-acpi ACPI: Kconfig: Drop link to https://01.org/linux-acpi ACPI: docs: Drop useless DSDT override documentation ACPI: DPTF: Drop stale link from Kconfig help ACPI: x86: s2idle: Add a quirk for ASUSTeK COMPUTER INC. ROG Flow X13 ACPI: x86: s2idle: Add a quirk for Lenovo Slim 7 Pro 14ARH7 ACPI: x86: s2idle: Add a quirk for ASUS ROG Zephyrus G14 ACPI: x86: s2idle: Add a quirk for ASUS TUF Gaming A17 FA707RE ACPI: x86: s2idle: Add module parameter to prefer Microsoft GUID ACPI: x86: s2idle: If a new AMD _HID is missing assume Rembrandt ACPI: x86: s2idle: Move _HID handling for AMD systems into structures platform/x86: int3472: Add board data for Surface Go2 IR camera platform/x86: int3472: Support multiple gpio lookups in board data platform/x86: int3472: Support multiple clock consumers ACPI: bus: Add iterator for dependent devices ACPI: scan: Add acpi_dev_get_next_consumer_dev() ...
2022-10-03clk: nxp: fix typo in commentJulia Lawall
Spelling mistake (triple letters) in comment. Detected with the help of Coccinelle. Signed-off-by: Julia Lawall <Julia.Lawall@inria.fr> Link: https://lore.kernel.org/r/20220521111145.81697-42-Julia.Lawall@inria.fr Acked-by: Vladimir Zapolskiy <vz@mleia.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-10-03clk: pxa: add a check for the return value of kzalloc()Xiaoke Wang
kzalloc() is a memory allocation function which can return NULL when some internal memory errors happen. So it is better to check it to prevent potential wrong memory access. Signed-off-by: Xiaoke Wang <xkernel.wang@foxmail.com> Link: https://lore.kernel.org/r/tencent_2B9817738F38B02844C245946EFF3B407E09@qq.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-10-03clk: vc5: Add support for IDT/Renesas VersaClock 5P49V6975Matthias Fend
Update IDT VersaClock 5 driver to support 5P49V6975. The 5P49V6975 is a member of the VersaClock 6E family and supports four fractional dividers (FODs), five clock outputs and an internal oscillator. Signed-off-by: Matthias Fend <matthias.fend@emfend.at> Link: https://lore.kernel.org/r/20220511053455.360335-2-matthias.fend@emfend.at Reviewed-by: Luca Ceresoli <luca@lucaceresoli.net> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Luca Ceresoli <luca@lucaceresoli.net> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-09-30clk: mvebu: armada-37xx-tbg: Remove the unneeded result variableye xingchen
Return the value of_clk_add_hw_provider() directly instead of storing it in another redundant variable. Reported-by: Zeal Robot <zealci@zte.com.cn> Signed-off-by: ye xingchen <ye.xingchen@zte.com.cn> Link: https://lore.kernel.org/r/20220906072322.337253-1-ye.xingchen@zte.com.cn Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-09-30clk: ti: dra7-atl: Fix reference leak in of_dra7_atl_clk_probeMiaoqian Lin
pm_runtime_get_sync() will increment pm usage counter. Forgetting to putting operation will result in reference leak. Add missing pm_runtime_put_sync in some error paths. Fixes: 9ac33b0ce81f ("CLK: TI: Driver for DRA7 ATL (Audio Tracking Logic)") Signed-off-by: Miaoqian Lin <linmq006@gmail.com> Link: https://lore.kernel.org/r/20220602030838.52057-1-linmq006@gmail.com Reviewed-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-09-30clk: Renesas versaclock7 ccf device driverAlex Helms
Renesas Versaclock7 is a family of configurable clock generator ICs with fractional and integer dividers. This driver has basic support for the RC21008A device, a clock synthesizer with a crystal input and 8 outputs. The supports changing the FOD and IOD rates, and each output can be gated. Signed-off-by: Alex Helms <alexander.helms.jy@renesas.com> Link: https://lore.kernel.org/r/20220912183613.22213-3-alexander.helms.jy@renesas.com Tested-by: Saeed Nowshadi <saeed.nowshadi@amd.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-09-30clk: ti: Balance of_node_get() calls for of_find_node_by_name()Liang He
In ti_find_clock_provider(), of_find_node_by_name() will call of_node_put() for the 'from' argument, possibly putting the node one too many times. Let's maintain the of_node_get() from the previous search and only put when we're exiting the function early. This should avoid a misbalanced reference count on the node. Fixes: 51f661ef9a10 ("clk: ti: Add ti_find_clock_provider() to use clock-output-names") Signed-off-by: Liang He <windhl@126.com> Link: https://lore.kernel.org/r/20220915031121.4003589-1-windhl@126.com [sboyd@kernel.org: Rewrite commit text, maintain reference instead of get again] Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-09-30clk: imx: scu: fix memleak on platform_device_add() failsLin Yujun
No error handling is performed when platform_device_add() fails. Add error processing before return, and modified the return value. Fixes: 77d8f3068c63 ("clk: imx: scu: add two cells binding support") Signed-off-by: Lin Yujun <linyujun809@huawei.com> Link: https://lore.kernel.org/r/20220914033206.98046-1-linyujun809@huawei.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-09-30clk: vc5: Use regmap_{set,clear}_bits() where appropriateLars-Peter Clausen
regmap_set_bits() and regmap_clear_bits() are variations of regmap_update_bits() that can be used if all bits of the mask have to be set to either 1 or 0 respectively. Update the versaclk driver to use regmap_set_bits() and regmap_clear_bits() where appropriate. This results in slightly more compact code and also makes the intention of the code clearer which can help with review. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Link: https://lore.kernel.org/r/20220719094637.844946-2-lars@metafoo.de Reviewed-by: Luca Ceresoli <luca@lucaceresoli.net> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-09-30clk: vc5: Check IO access resultsLars-Peter Clausen
The devices of the versaclk clock generator family use an I2C control bus. IO access on an I2C bus can fail for various reasons. The driver currently ignores the return value of most IO operations. This results in silent failure. To avoid this check the return value and in case of an error abort the operation and propagate the error code to the caller. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Link: https://lore.kernel.org/r/20220719094637.844946-1-lars@metafoo.de Reviewed-by: Luca Ceresoli <luca@lucaceresoli.net> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-09-30clk: mediatek: add driver for MT8365 SoCFabien Parent
Add clock drivers for MT8365 SoC. Signed-off-by: Fabien Parent <fparent@baylibre.com> Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com> Link: https://lore.kernel.org/r/20220822152652.3499972-5-msp@baylibre.com Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-09-30clk: mediatek: Export required common code symbolsMarkus Schneider-Pargmann
To make clk-mt8365 compilable as a module there are a few function symbols missing. This patch adds the required EXPORT_SYMBOL_GPL to the functions. Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com> Link: https://lore.kernel.org/r/20220822152652.3499972-4-msp@baylibre.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-09-30clk: mediatek: Provide mtk_devm_alloc_clk_dataMarkus Schneider-Pargmann
Provide a helper that replaces the kzalloc with devm_kzalloc so error handling gets easier. Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com> Link: https://lore.kernel.org/r/20220822152652.3499972-3-msp@baylibre.com Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-09-30clkdev: Simplify devm_clk_hw_register_clkdev() functionAndy Shevchenko
Use devm_add_action_or_reset() instead of devres_alloc() and devres_add(), which works the same. This will simplify the code. There is no functional changes. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20220623115719.52683-3-andriy.shevchenko@linux.intel.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-09-30clkdev: Remove never used devm_clk_release_clkdev()Andy Shevchenko
For the entire history of the devm_clk_release_clkdev() existence (since 2018) it was never used. Remove it for good. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20220623115719.52683-2-andriy.shevchenko@linux.intel.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-09-30clk: Remove never used devm_of_clk_del_provider()Andy Shevchenko
For the entire history of the devm_of_clk_del_provider) existence (since 2017) it was never used. Remove it for good. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20220623115719.52683-1-andriy.shevchenko@linux.intel.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-09-30clk: bcm: rpi: Add support for VEC clockDom Cobley
Platform driver clk-bcm2835 gets an inaccurate clock for VEC (107MHz). Export VEC clock trough clk-raspberrypi which uses the right PLL to get an accurate 108MHz. Signed-off-by: Dom Cobley <popcornmix@gmail.com> [iivanov: Adapted on top of v5.17-rc6] Signed-off-by: Ivan T. Ivanov <iivanov@suse.de> Link: https://lore.kernel.org/r/20220829152154.147250-4-iivanov@suse.de Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-09-30clk: bcm: rpi: Handle pixel clock in firmwareIvan T. Ivanov
The clk-bcm2835 handling of the pixel clock does not function correctly when the HDMI power domain is disabled. The firmware supports it correctly, so add it to the firmware clock driver. Acked-by: Maxime Ripard <maxime@cerno.tech> Acked-by: Dave Stevenson <dave.stevenson@raspberrypi.com> Signed-off-by: Ivan T. Ivanov <iivanov@suse.de> Link: https://lore.kernel.org/r/20220829152154.147250-3-iivanov@suse.de Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-09-30clk: bcm: rpi: Add support HEVC clockIvan T. Ivanov
Export clock required for RPiVid video decoder hardware. Cc: Dom Cobley <popcornmix@gmail.com> Acked-by: Maxime Ripard <maxime@cerno.tech> Signed-off-by: Ivan T. Ivanov <iivanov@suse.de> Link: https://lore.kernel.org/r/20220829152154.147250-2-iivanov@suse.de Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-09-30clk: bcm2835: fix bcm2835_clock_rate_from_divisor declarationStefan Wahren
The return value of bcm2835_clock_rate_from_divisor is always unsigned and also all caller expect this. So fix the declaration accordingly. Fixes: 41691b8862e2 ("clk: bcm2835: Add support for programming the audio domain clocks") Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Link: https://lore.kernel.org/r/20220904141037.38816-1-stefan.wahren@i2se.com Reviewed-by: Ivan T. Ivanov <iivanov@suse.de> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-09-30clk: bcm2835: Round UART input clock upIvan T. Ivanov
It was reported that RPi3[1] and RPi Zero 2W boards have issues with the Bluetooth. It turns out that when switching from initial to operation speed host and device no longer can talk each other because host uses incorrect UART baud rate. The UART driver used in this case is amba-pl011. Original fix, see below Github link[2], was inside pl011 module, but somehow it didn't look as the right place to fix. Beside that this original rounding function is not exactly perfect for all possible clock values. So I deiced to move the hack to the platform which actually need it. The UART clock is initialised to be as close to the requested frequency as possible without exceeding it. Now that there is a clock manager that returns the actual frequencies, an expected 48MHz clock is reported as 47999625. If the requested baud rate == requested clock/16, there is no headroom and the slight reduction in actual clock rate results in failure. If increasing a clock by less than 0.1% changes it from ..999.. to ..000.., round it up. [1] https://bugzilla.suse.com/show_bug.cgi?id=1188238 [2] https://github.com/raspberrypi/linux/commit/ab3f1b39537f6d3825b8873006fbe2fc5ff057b7 Cc: Phil Elwell <phil@raspberrypi.com> Signed-off-by: Ivan T. Ivanov <iivanov@suse.de> Reviewed-by: Stefan Wahren <stefan.wahren@i2se.com> Link: https://lore.kernel.org/r/20220912081306.24662-1-iivanov@suse.de Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-09-30clk: bcm2835: Make peripheral PLLC criticalMaxime Ripard
When testing for a series affecting the VEC, it was discovered that turning off and on the VEC clock is crashing the system. It turns out that, when disabling the VEC clock, it's the only child of the PLLC-per clock which will also get disabled. The source of the crash is PLLC-per being disabled. It's likely that some other device might not take a clock reference that it actually needs, but it's unclear which at this point. Let's make PLLC-per critical so that we don't have that crash. Reported-by: Noralf Trønnes <noralf@tronnes.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20220926084509.12233-1-maxime@cerno.tech Reviewed-by: Stefan Wahren <stefan.wahren@i2se.com> Acked-by: Noralf Trønnes <noralf@tronnes.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-09-30clk: baikal-t1: Convert to platform device driverSerge Semin
In accordance with the way the MIPS platform is normally design there are only six clock sources which need to be available on the kernel start in order to one end up booting correctly: + CPU PLL: needed by the r4k and MIPS GIC timer drivers. The former one is initialized by the arch code, while the later one is implemented in the mips-gic-timer.c driver as the OF-declared timer. + PCIe PLL: required as a parental clock source for the APB/timer domains. + APB clock: needed in order to access all the SoC CSRs at least for the timer OF-declared drivers. + APB Timer{0-2} clocks: these are the DW APB timers which drivers dw_apb_timer_of.c are implemented as the OF-declared timers. So as long as the clocks above are available early the kernel will normally work. Let's convert the Baikal-T1 CCU drivers to the platform device drivers keeping that in mind. Generally speaking the conversion isn't that complicated since the driver infrastructure has been designed as flexible enough for that. First we need to add a new PLL/Divider clock features flag which indicates the corresponding clock source as a basic one and that clock sources will be available on the kernel early boot stages. Second the internal PLL/Divider descriptors need to be initialized with -EPROBE_DEFER value as the corresponding clock source is unavailable at the early stages. They will be allocated and initialized on the Baikal-T1 clock platform driver probe procedure. Finally the already available PLL/Divider init functions need to be split up into two ones: init procedure performed in the framework of the OF-declared clock initialization (of_clk_init()), and the probe procedure called by the platform devices bus driver. Note the later method will just continue the system clocks initialization started in the former one. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Link: https://lore.kernel.org/r/20220929225402.9696-9-Sergey.Semin@baikalelectronics.ru [sboyd@kernel.org: Remove module things because the Kconfig is still bool] Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-09-30clk: baikal-t1: Add DDR/PCIe directly controlled resets supportSerge Semin
Aside with a set of the trigger-like resets Baikal-T1 CCU provides two additional blocks with directly controlled reset signals. In particular it concerns DDR full and initial resets and various PCIe sub-domains resets. Let's add the direct reset assertion/de-assertion of the corresponding flags support into the Baikal-T1 CCU driver then. It will be required at least for the PCIe platform driver. Obviously the DDR controller isn't supposed to be fully reset in the kernel, so the corresponding controls are added just for the sake of the interface implementation completeness. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Link: https://lore.kernel.org/r/20220929225402.9696-8-Sergey.Semin@baikalelectronics.ru Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-09-30clk: baikal-t1: Move reset-controls code into a dedicated moduleSerge Semin
Before adding the directly controlled resets support it's reasonable to move the existing resets control functionality into a dedicated object for the sake of the CCU dividers clock driver simplification. After the new functionality was added clk-ccu-div.c would have got to a mixture of the weakly dependent clocks and resets methods. Splitting the methods up into the two objects will make the code easier to read and maintain. It shall also improve the code scalability (though hopefully we won't need this part that much in the future). The reset control functionality is now implemented in the framework of a single unit since splitting it up doesn't make much sense due to relatively simple reset operations. The ccu-rst.c has been designed to be looking like ccu-div.c or ccu-pll.c with two globally available methods for the sake of the code unification and better code readability. This commit doesn't provide any change in the CCU reset implementation semantics. As before the driver will support the trigger-like CCU resets only, which are responsible for the AXI-bus, APB-bus and SATA-ref blocks reset. The assert/de-assert-capable reset controls support will be added in the next commit. Note the CCU Clock dividers and resets functionality split up was possible due to not having any side-effects (at least we didn't found ones) of the regmap-based concurrent access of the common CCU dividers/reset CSRs. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Link: https://lore.kernel.org/r/20220929225402.9696-6-Sergey.Semin@baikalelectronics.ru Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-09-30clk: baikal-t1: Add SATA internal ref clock bufferSerge Semin
It turns out the internal SATA reference clock signal will stay unavailable for the SATA interface consumer until the buffer on it's way is ungated. So aside with having the actual clock divider enabled we need to ungate a buffer placed on the signal way to the SATA controller (most likely some rudiment from the initial SoC release). Seeing the switch flag is placed in the same register as the SATA-ref clock divider at a non-standard ffset, let's implement it as a separate clock controller with the set-rate propagation to the parental clock divider wrapper. As such we'll be able to disable/enable and still change the original clock source rate. Fixes: 353afa3a8d2e ("clk: Add Baikal-T1 CCU Dividers driver") Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Link: https://lore.kernel.org/r/20220929225402.9696-5-Sergey.Semin@baikalelectronics.ru Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-09-30clk: baikal-t1: Add shared xGMAC ref/ptp clocks internal parentSerge Semin
Baikal-T1 CCU reference manual says that both xGMAC reference and xGMAC PTP clocks are generated by two different wrappers with the same constant divider thus each producing a 156.25 MHz signal. But for some reason both of these clock sources are gated by a single switch-flag in the CCU registers space - CCU_SYS_XGMAC_BASE.BIT(0). In order to make the clocks handled independently we need to define a shared parental gate so the base clock signal would be switched off only if both of the child-clocks are disabled. Note the ID is intentionally set to -2 since we are going to add a one more internal clock identifier in the next commit. Fixes: 353afa3a8d2e ("clk: Add Baikal-T1 CCU Dividers driver") Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Link: https://lore.kernel.org/r/20220929225402.9696-4-Sergey.Semin@baikalelectronics.ru Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-09-30clk: baikal-t1: Fix invalid xGMAC PTP clock dividerSerge Semin
Most likely due to copy-paste mistake the divider has been set to 10 while according to the SoC reference manual it's supposed to be 8 thus having PTP clock frequency of 156.25 MHz. Fixes: 353afa3a8d2e ("clk: Add Baikal-T1 CCU Dividers driver") Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Link: https://lore.kernel.org/r/20220929225402.9696-3-Sergey.Semin@baikalelectronics.ru Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-09-30clk: vc5: Fix 5P49V6901 outputs disabling when enabling FODSerge Semin
We have discovered random glitches during the system boot up procedure. The problem investigation led us to the weird outcomes: when none of the Renesas 5P49V6901 ports are explicitly enabled by the kernel driver, the glitches disappeared. It was a mystery since the SoC external clock domains were fed with different 5P49V6901 outputs. The driver code didn't seem like bogus either. We almost despaired to find out a root cause when the solution has been found for a more modern revision of the chip. It turned out the 5P49V6901 clock generator stopped its output for a short period of time during the VC5_OUT_DIV_CONTROL register writing. The same problem was found for the 5P49V6965 revision of the chip and was successfully fixed in commit fc336ae622df ("clk: vc5: fix output disabling when enabling a FOD") by enabling the "bypass_sync" flag hidden inside "Unused Factory Reserved Register". Even though the 5P49V6901 registers description and programming guide doesn't provide any intel regarding that flag, setting it up anyway in the officially unused register completely eliminated the denoted glitches. Thus let's activate the functionality submitted in commit fc336ae622df ("clk: vc5: fix output disabling when enabling a FOD") for the Renesas 5P49V6901 chip too in order to remove the ports implicit inter-dependency. Fixes: dbf6b16f5683 ("clk: vc5: Add support for IDT VersaClock 5P49V6901") Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Reviewed-by: Luca Ceresoli <luca@lucaceresoli.net> Link: https://lore.kernel.org/r/20220929225402.9696-2-Sergey.Semin@baikalelectronics.ru Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-09-30clk: davinci: cfgchip: Use dev_err_probe() helperYang Yingliang
dev_err() can be replace with dev_err_probe() which will check if error code is -EPROBE_DEFER. Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Link: https://lore.kernel.org/r/20220913032228.985852-1-yangyingliang@huawei.com Reviewed-by: David Lechner <david@lechnology.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-09-30clk: davinci: pll: fix spelling typo in commentJiangshan Yi
Fix spelling typo in comment. Reported-by: k2ci <kernel-bot@kylinos.cn> Signed-off-by: Jiangshan Yi <yijiangshan@kylinos.cn> Link: https://lore.kernel.org/r/20220905065833.1831473-1-13667453960@163.com Reviewed-by: David Lechner <david@lechnology.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-09-30clk: mmp: pxa168: control shared SDH bits with separate clockDoug Brown
The PXA168 has a peculiar setup with the AXI clock enable control for the SDHC controllers. The bits in the SDH0 register control the AXI clock enable for both SDH0 and SDH1. Likewise, the bits in the SDH2 register control both SDH2 and SDH3. This is modeled with two new parentless clocks that control the shared bits. Previously, SDH0 had to be enabled in order for SDH1 to be used, and when SDH1 was enabled, unused bits in the SDH1 register were being controlled. This fixes those issues. A future commit will add support for these new shared clocks to be enabled by the PXA168 SDHC driver. Signed-off-by: Doug Brown <doug@schmorgal.com> Link: https://lore.kernel.org/r/20220612192937.162952-13-doug@schmorgal.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-09-30clk: mmp: pxa168: add clocks for SDH2 and SDH3Doug Brown
The PXA168 has four SDHC peripherals. This commit adds the last two. Signed-off-by: Doug Brown <doug@schmorgal.com> Link: https://lore.kernel.org/r/20220612192937.162952-11-doug@schmorgal.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-09-30clk: mmp: pxa168: fix GPIO clock enable bitsDoug Brown
According to the datasheet, only bit 0 of APBC_GPIO should be controlled for the clock enable. Bit 1 is marked as reserved (always write 0). Signed-off-by: Doug Brown <doug@schmorgal.com> Link: https://lore.kernel.org/r/20220612192937.162952-9-doug@schmorgal.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-09-30clk: mmp: pxa168: add muxes for more peripheralsDoug Brown
The TWSI, KPC, PWM, and DFC peripherals didn't have their muxes modeled in the code, but the PXA168 datasheet shows that they are indeed muxed: - TWSI can be 31.2 MHz or 62.4 MHz - KPC can be 32 kHz, 16 kHz, or 26 MHz - PWM can be 13 MHz or 32 kHz - DFC can be 156 MHz or 78 MHz Signed-off-by: Doug Brown <doug@schmorgal.com> Link: https://lore.kernel.org/r/20220612192937.162952-8-doug@schmorgal.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-09-30clk: mmp: pxa168: fix incorrect parent clocksDoug Brown
The UART, SDHC, LCD, and CCIC peripherals' muxed parent clocks didn't match the information provided by the PXA168 datasheet: - The UART clocks can be 58.5 MHz or the UART PLL. Previously, the first mux option was being calculated as 117 MHz, confirmed on hardware to be incorrect. - The SDHC clocks can be 48 MHz, 52 MHz, or 78 MHz. Previously, 48 MHz and 52 MHz were swapped. 78 MHz wasn't listed as an option. - The LCD clock can be 624 MHz or 312 Mhz. Previously, it was being calculated as 312 MHz or 52 MHz. - The CCIC clock can be 156 MHz or 78 MHz. Previously, it was being calculated as 312 MHz or 52 MHz. Signed-off-by: Doug Brown <doug@schmorgal.com> Link: https://lore.kernel.org/r/20220612192937.162952-7-doug@schmorgal.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-09-30clk: mmp: pxa168: fix const-correctnessDoug Brown
While working on this series of patches, checkpatch recommended that an extra const should be added to the mux parent arrays. Signed-off-by: Doug Brown <doug@schmorgal.com> Link: https://lore.kernel.org/r/20220612192937.162952-6-doug@schmorgal.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-09-30clk: mmp: pxa168: add new clocks for peripheralsDoug Brown
This commit adds three new clocks that previously didn't exist, but are needed in order to match the clock parenting as described in the PXA168 datasheet. Signed-off-by: Doug Brown <doug@schmorgal.com> Link: https://lore.kernel.org/r/20220612192937.162952-5-doug@schmorgal.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-09-30clk: mmp: pxa168: fix incorrect dividersDoug Brown
These two clocks had multipliers and dividers that didn't match their names. A subsequent commit goes through all of the existing peripherals and ensure the correct clocks are being used everywhere. Signed-off-by: Doug Brown <doug@schmorgal.com> Link: https://lore.kernel.org/r/20220612192937.162952-3-doug@schmorgal.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-09-30clk: mmp: pxa168: add additional register definesDoug Brown
In preparation for adding additional peripherals over time, this commit adds a bunch of extra APBC_* defines based on information from the datasheet. It also reorganizes the list of defines to be ordered sequentially by address (grouped by type). Signed-off-by: Doug Brown <doug@schmorgal.com> Link: https://lore.kernel.org/r/20220612192937.162952-2-doug@schmorgal.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-09-30clk: sprd: Add clocks support for UMS512Cixi Geng
Add the list of clocks for the Unisoc UMS512, along with clock initialization. Signed-off-by: Cixi Geng <cixi.geng1@unisoc.com> Link: https://lore.kernel.org/r/20220909152421.278662-3-gengcixi@gmail.com Reviewed-by: Baolin Wang <baolin.wang@linux.alibaba.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
generated by cgit (git 2.34.1) at 2025-09-24 12:51:46 +0000