summaryrefslogtreecommitdiff
path: root/drivers/dma
AgeCommit message (Collapse)Author
2021-04-12dmaengine: tegra20: Fix runtime PM imbalance on errorDinghao Liu
pm_runtime_get_sync() will increase the runtime PM counter even it returns an error. Thus a pairing decrement is needed to prevent refcount leak. Fix this by replacing this API with pm_runtime_resume_and_get(), which will not change the runtime PM counter on error. Signed-off-by: Dinghao Liu <dinghao.liu@zju.edu.cn> Acked-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20210409082805.23643-1-dinghao.liu@zju.edu.cn Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-04-12dmaengine: Fix a double free in dma_async_device_registerLv Yunlong
In the first list_for_each_entry() macro of dma_async_device_register, it gets the chan from list and calls __dma_async_device_channel_register (..,chan). We can see that chan->local is allocated by alloc_percpu() and it is freed chan->local by free_percpu(chan->local) when __dma_async_device_channel_register() failed. But after __dma_async_device_channel_register() failed, the caller will goto err_out and freed the chan->local in the second time by free_percpu(). The cause of this problem is forget to set chan->local to NULL when chan->local was freed in __dma_async_device_channel_register(). My patch sets chan->local to NULL when the callee failed to avoid double free. Fixes: d2fb0a0438384 ("dmaengine: break out channel registration") Signed-off-by: Lv Yunlong <lyl2019@mail.ustc.edu.cn> Reviewed-by: Dave Jiang <dave.jiang@intel.com> Link: https://lore.kernel.org/r/20210331014458.3944-1-lyl2019@mail.ustc.edu.cn Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-04-12dmaengine: dw: Make it dependent to HAS_IOMEMAndy Shevchenko
Some architectures do not provide devm_*() APIs. Hence make the driver dependent on HAVE_IOMEM. Fixes: dbde5c2934d1 ("dw_dmac: use devm_* functions to simplify code") Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Link: https://lore.kernel.org/r/20210324141757.24710-1-andriy.shevchenko@linux.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-04-12dmaengine: idxd: fix wq size store permission stateDave Jiang
WQ size can only be changed when the device is disabled. Current code allows change when device is enabled but wq is disabled. Change the check to detect device state. Fixes: c52ca478233c ("dmaengine: idxd: add configuration component of driver") Signed-off-by: Dave Jiang <dave.jiang@intel.com> Link: https://lore.kernel.org/r/161782558755.107710.18138252584838406025.stgit@djiang5-desk3.ch.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-04-12dmaengine: idxd: fix opcap sysfs attribute outputDave Jiang
The operation capability register is 256bits. The current output only prints out the first 64bits. Fix to output the entire 256bits. The current code omits operation caps from IAX devices. Fixes: c52ca478233c ("dmaengine: idxd: add configuration component of driver") Reported-by: Lucas Van <lucas.van@intel.com> Signed-off-by: Dave Jiang <dave.jiang@intel.com> Link: https://lore.kernel.org/r/161645624963.2003736.829798666998490151.stgit@djiang5-desk3.ch.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-04-12dmaengine: idxd: Fix clobbering of SWERR overflow bit on writebackDave Jiang
Current code blindly writes over the SWERR and the OVERFLOW bits. Write back the bits actually read instead so the driver avoids clobbering the OVERFLOW bit that comes after the register is read. Fixes: bfe1d56091c1 ("dmaengine: idxd: Init and probe for Intel data accelerators") Reported-by: Sanjay Kumar <sanjay.k.kumar@intel.com> Signed-off-by: Dave Jiang <dave.jiang@intel.com> Link: https://lore.kernel.org/r/161352082229.3511254.1002151220537623503.stgit@djiang5-desk3.ch.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-23dmaengine: socfpga: use ARCH_INTEL_SOCFPGA also for 32-bit ARM SoCsKrzysztof Kozlowski
ARCH_SOCFPGA is being renamed to ARCH_INTEL_SOCFPGA so adjust the 32-bit ARM drivers to rely on new symbol. Acked-By: Vinod Koul <vkoul@kernel.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2021-03-16dmaengine: dw-edma: Add pcim_iomap_table return checkGustavo Pimentel
Currently, is missing a null check on a pcim_iomap_table() return value and this can lead to a null pointer dereference if the desired BAR wasn't mapped previously. Fix this by adding a null check and returning -ENOMEM. Addresses-Coverity: ("Dereference null return") Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com> Link: https://lore.kernel.org/r/bc5e6b8632c84660bb6dae454980e9419992ed14.1613674948.git.gustavo.pimentel@synopsys.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-16dmaengine: dw-edma: Revert fix scatter-gather address calculationGustavo Pimentel
Reverting the applied patch because it caused a regression on ARC700 platform (32 bits). Fixes: 05655541c950 ("dmaengine: dw-edma: Fix scatter-gather address calculation") Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com> Link: https://lore.kernel.org/r/1778422e389fe40032e216b59b1b992c61ec9887.1613674948.git.gustavo.pimentel@synopsys.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-16dmaengine: dw-edma: Change DMA abbreviation from lower into upper caseGustavo Pimentel
To keep code consistent, some comments with dma keyword written in lower case are now in upper case. Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com> Link: https://lore.kernel.org/r/8c4b3db90767972a2b4cbb6fa818cf0e9c3d6fe3.1613674948.git.gustavo.pimentel@synopsys.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-16dmaengine: dw-edma: Fix crash on loading/unloading driverGustavo Pimentel
When the driver is compiled as a module and loaded if we try to unload it, the Kernel shows a crash log. This Kernel crash is due to the dma_async_device_unregister() call done after deleting the channels, this patch fixes this issue. Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com> Link: https://lore.kernel.org/r/4aa850c035cf7ee488f1d3fb6dee0e37be0dce0a.1613674948.git.gustavo.pimentel@synopsys.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-16dmaengine: dw-edma: Move struct dentry variable from static definition into ↵Gustavo Pimentel
dw_edma struct Move struct dentry variable from static definition (dw-edma-v0-debugfs.c) into dw_edma struct (dw-edma-core.h) Also the variable was renamed from base_dir to debugfs. Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com> Link: https://lore.kernel.org/r/07c1167b671e7b175700e2e7061cf0b3dd8c6adb.1613674948.git.gustavo.pimentel@synopsys.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-16dmaengine: dw-edma: Change linked list and data blocks offset and sizesGustavo Pimentel
Changes the linked list and data blocks offset and sizes to follow the recommendation given by the hardware team for the IPK solution. Although the previous data blocks offset and sizes are still valid and functional, using them that might present some issues related to the IPK solution, since this solution is based on FPGA and might be subjected to timmings constrains. Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com> Link: https://lore.kernel.org/r/f682e7f7f06dc6b2efdd431481d6fb4d762c2c05.1613674948.git.gustavo.pimentel@synopsys.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-16dmaengine: dw-edma: Improve the linked list and data blocks definitionGustavo Pimentel
In the previous implementation, the driver assumed that there existed only two memory spaces that would equally distribute the amount of read/write channels. This might not be the case on some other implementations, therefore this patch change this requirement so that each write/read channel has its own linked list and data space well defined, which allows different sizes and locations. Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com> Link: https://lore.kernel.org/r/2e316cb983f8a1e09ce929029f87619dc92a52de.1613674948.git.gustavo.pimentel@synopsys.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-16dmaengine: dw-edma: Reorder variables to keep consistencyGustavo Pimentel
In the driver code structure, I tried to keep the code style consistency by writing the write channels instructions first, and then follow by the read channels instructions, mimicking the hardware implementation. However, this code style failed in some cases. This patch fixes that and no functional changes are expected. Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com> Link: https://lore.kernel.org/r/9bd1f86f19df8bb5de502fb85a0c5dc07978a9ba.1613674948.git.gustavo.pimentel@synopsys.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-16dmaengine: dw-edma: Improve number of channels checkGustavo Pimentel
It was added some extra checks to ensure that the driver doesn't try to use more DMA channels than actually are available in hardware. Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com> Link: https://lore.kernel.org/r/cfb2b0a4f97ae9dc83ebe5ea59d6a51d69ea3654.1613674948.git.gustavo.pimentel@synopsys.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-16dmaengine: dw-edma: Add device_prep_interleave_dma() supportGustavo Pimentel
Add device_prep_interleave_dma() support to Synopsys DMA driver. This feature implements a similar data transfer mechanism to the scatter-gather implementation. Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com> Link: https://lore.kernel.org/r/73dc36264910654e266ae25814d892a0476e4427.1613674948.git.gustavo.pimentel@synopsys.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-16dmaengine: dw-edma: Add PCIe VSEC data retrieval supportGustavo Pimentel
The latest eDMA IP development implements a Vendor-Specific Extended Capability that contains the eDMA BAR, offset, map format, and the number of read/write channels available. Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com> Link: https://lore.kernel.org/r/0b880b8893ff457ffc1b5071a1c7f47e61ceea1c.1613674948.git.gustavo.pimentel@synopsys.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-16dmaengine: dw-edma: Add support for the HDMA featureGustavo Pimentel
Add support for the HDMA feature. This new feature enables the current eDMA IP to use a deeper prefetch of the linked list, which reduces the algorithm execution latency observed when loading the elements of the list, causing more stable and higher data transfer. Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com> Link: https://lore.kernel.org/r/5f40f89ef7d6255a12d5b23f34e6e59dcd28861e.1613674948.git.gustavo.pimentel@synopsys.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-16dmaengine: dw-edma: Fix comments offset characters' alignmentGustavo Pimentel
Fix comments offset characters' alignment to follow the same structure of similar comments. Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com> Link: https://lore.kernel.org/r/8e0e1e46e1c1a78fe62d08c4ee09fb96254a9393.1613674948.git.gustavo.pimentel@synopsys.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-16dmaengine: dw-edma: Add writeq() and readq() for 64 bits architecturesGustavo Pimentel
Add writeq() and readq() for 64 bits architures support. Supporting these two functions will allow the write or the read of eDMA 64 bits registers at once instead of having two consecutive operations. Also, this improvement will allow the PCI optimization transaction messages, which will generate a 64 bits message instead of two messages of 32 bits. Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com> Link: https://lore.kernel.org/r/3f1120f7c6003b38ec8b851fc68936007c4d9fd8.1613674948.git.gustavo.pimentel@synopsys.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-16dmaengine: xilinx: Introduce synchronize() callbackLars-Peter Clausen
The Xilinx dmaengine driver uses a tasklet to process completed descriptors and execute their callbacks. Currently consumers of the DMA channel have to no method of synchronization against this tasklet when using the Xilinx dmaengine drivers. This can lead to race conditions when the consumer frees resources that are accessed in the callback before the tasklet has finished running. It is not enough to just call dmaengine_terminal_all() since on a multi-processor system the tasklet can run concurrently to it and might call the callback after dmaengine_terminate_all() has already finished. To mitigate this issue implement the synchronize() callback for the driver, which will wait until the tasklet has finished. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Link: https://lore.kernel.org/r/20210313125311.4823-1-lars@metafoo.de Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-16dmaengine: xilinx: dpdma: Fix race condition in done IRQLaurent Pinchart
The active descriptor pointer is accessed from different contexts, including different interrupt handlers, and its access must be protected by the channel's lock. This wasn't done in the done IRQ handler. Fix it. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Link: https://lore.kernel.org/r/20210307040629.29308-3-laurent.pinchart@ideasonboard.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-16dmaengine: xilinx: dpdma: Fix descriptor issuing on video groupLaurent Pinchart
When multiple channels are part of a video group, the transfer is triggered only when all channels in the group are ready. The logic to do so is incorrect, as it causes the descriptors for all channels but the last one in a group to not being pushed to the hardware. Fix it. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Link: https://lore.kernel.org/r/20210307040629.29308-2-laurent.pinchart@ideasonboard.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-02-23Merge tag 'dmaengine-5.12-rc1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine Pull dmaengine updates from Vinod Koul: "We have couple of drivers removed a new driver and bunch of new device support and few updates to drivers for this round. New drivers/devices: - Intel LGM SoC DMA driver - Actions Semi S500 DMA controller - Renesas r8a779a0 dma controller - Ingenic JZ4760(B) dma controller - Intel KeemBay AxiDMA controller Removed: - Coh901318 dma driver - Zte zx dma driver - Sirfsoc dma driver Updates: - mmp_pdma, mmp_tdma gained module support - imx-sdma become modern and dropped platform data support - dw-axi driver gained slave and cyclic dma support" * tag 'dmaengine-5.12-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine: (58 commits) dmaengine: dw-axi-dmac: remove redundant null check on desc dmaengine: xilinx_dma: Alloc tx descriptors GFP_NOWAIT dmaengine: dw-axi-dmac: Virtually split the linked-list dmaengine: dw-axi-dmac: Set constraint to the Max segment size dmaengine: dw-axi-dmac: Add Intel KeemBay AxiDMA BYTE and HALFWORD registers dmaengine: dw-axi-dmac: Add Intel KeemBay AxiDMA handshake dmaengine: dw-axi-dmac: Add Intel KeemBay AxiDMA support dmaengine: drivers: Kconfig: add HAS_IOMEM dependency to DW_AXI_DMAC dmaengine: dw-axi-dmac: Add Intel KeemBay DMA register fields dt-binding: dma: dw-axi-dmac: Add support for Intel KeemBay AxiDMA dmaengine: dw-axi-dmac: Support burst residue granularity dmaengine: dw-axi-dmac: Support of_dma_controller_register() dmaegine: dw-axi-dmac: Support device_prep_dma_cyclic() dmaengine: dw-axi-dmac: Support device_prep_slave_sg dmaengine: dw-axi-dmac: Add device_config operation dmaengine: dw-axi-dmac: Add device_synchronize() callback dmaengine: dw-axi-dmac: move dma_pool_create() to alloc_chan_resources() dmaengine: dw-axi-dmac: simplify descriptor management dt-bindings: dma: Add YAML schemas for dw-axi-dmac dmaengine: ti: k3-psil: optimize struct psil_endpoint_config for size ...
2021-02-22Merge tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-armLinus Torvalds
Pull ARM updates from Russell King: - Generalise byte swapping assembly - Update debug addresses for STI - Validate start of physical memory with DTB - Do not clear SCTLR.nTLSMD in decompressor - amba/locomo/sa1111 devices remove method return type is void - address markers for KASAN in page table dump * tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm: ARM: 9065/1: OABI compat: fix build when EPOLL is not enabled ARM: 9055/1: mailbox: arm_mhuv2: make remove callback return void amba: Make use of bus_type functions amba: Make the remove callback return void vfio: platform: simplify device removal amba: reorder functions amba: Fix resource leak for drivers without .remove ARM: 9054/1: arch/arm/mm/mmu.c: Remove duplicate header ARM: 9053/1: arm/mm/ptdump:Add address markers for KASAN regions ARM: 9051/1: vdso: remove unneded extra-y addition ARM: 9050/1: Kconfig: Select ARCH_HAVE_NMI_SAFE_CMPXCHG where possible ARM: 9049/1: locomo: make locomo bus's remove callback return void ARM: 9048/1: sa1111: make sa1111 bus's remove callback return void ARM: 9047/1: smp: remove unused variable ARM: 9046/1: decompressor: Do not clear SCTLR.nTLSMD for ARMv7+ cores ARM: 9045/1: uncompress: Validate start of physical memory against passed DTB ARM: 9042/1: debug: no uncompress debugging while semihosting ARM: 9041/1: sti LL_UART: add STiH418 SBC UART0 support ARM: 9040/1: use DEBUG_UART_PHYS and DEBUG_UART_VIRT for sti LL_UART ARM: 9039/1: assembler: generalize byte swapping macro into rev_l
2021-02-08dmaengine: dw-axi-dmac: remove redundant null check on descColin Ian King
The pointer desc is being null checked twice, the second null check is redundant because desc has not been re-assigned between the checks. Remove the redundant second null check on desc. Fixes: ef6fb2d6f1ab ("dmaengine: dw-axi-dmac: simplify descriptor management") Signed-off-by: Colin Ian King <colin.king@canonical.com> Tested-by: Sia Jee Heng <jee.heng.sia@intel.com> Reviewed-by: Sia Jee Heng <jee.heng.sia@intel.com> Addresses-Coverity: ("Logically dead code") Link: https://lore.kernel.org/r/20210203134652.22618-1-colin.king@canonical.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-02-08dmaengine dw: Revert "dmaengine: dw: Enable runtime PM"Cezary Rojewski
This reverts commit 842067940a3e3fc008a60fee388e000219b32632. For some solutions e.g. sound/soc/intel/catpt, DW DMA is part of a compound device (in that very example, domains: ADSP, SSP0, SSP1, DMA0 and DMA1 are part of a single entity) rather than being a standalone one. Driver for said device may enlist DMA to transfer data during suspend or resume sequences. Manipulating RPM explicitly in dw's DMA request and release channel functions causes suspend() to also invoke resume() for the exact same device. Similar situation occurs for resume() sequence. Effectively renders device dysfunctional after first suspend() attempt. Revert the change to address the problem. Fixes: 842067940a3e ("dmaengine: dw: Enable runtime PM") Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com> Acked-by: Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://lore.kernel.org/r/20210203191924.15706-1-cezary.rojewski@intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-02-03dmaengine: idxd: check device state before issue commandDave Jiang
Add device state check before executing command. Without the check the command can be issued while device is in halt state and causes the driver to block while waiting for the completion of the command. Reported-by: Sanjay Kumar <sanjay.k.kumar@intel.com> Signed-off-by: Dave Jiang <dave.jiang@intel.com> Tested-by: Sanjay Kumar <sanjay.k.kumar@intel.com> Fixes: 0d5c10b4c84d ("dmaengine: idxd: add work queue drain support") Link: https://lore.kernel.org/r/161219313921.2976211.12222625226450097465.stgit@djiang5-desk3.ch.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-02-02amba: Make the remove callback return voidUwe Kleine-König
All amba drivers return 0 in their remove callback. Together with the driver core ignoring the return value anyhow, it doesn't make sense to return a value here. Change the remove prototype to return void, which makes it explicit that returning an error value doesn't work as expected. This simplifies changing the core remove callback to return void, too. Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> # for drivers/memory Acked-by: Mark Brown <broonie@kernel.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Suzuki K Poulose <suzuki.poulose@arm.com> # for hwtracing/coresight Acked-By: Vinod Koul <vkoul@kernel.org> # for dmaengine Acked-by: Guenter Roeck <linux@roeck-us.net> # for watchdog Acked-by: Wolfram Sang <wsa@kernel.org> # for I2C Acked-by: Takashi Iwai <tiwai@suse.de> # for sound Acked-by: Vladimir Zapolskiy <vz@mleia.com> # for memory/pl172 Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Link: https://lore.kernel.org/r/20210126165835.687514-5-u.kleine-koenig@pengutronix.de Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2021-02-01dmaengine: xilinx_dma: Alloc tx descriptors GFP_NOWAITRichard Fitzgerald
Use GFP_NOWAIT allocation in xilinx_dma_alloc_tx_descriptor(). This is necessary for compatibility with ALSA, which calls dmaengine_prep_dma_cyclic() from an atomic context. Signed-off-by: Richard Fitzgerald <rf@opensource.cirrus.com> Link: https://lore.kernel.org/r/20210129170800.31857-1-rf@opensource.cirrus.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-02-01dmaengine: dw-axi-dmac: Virtually split the linked-listSia Jee Heng
AxiDMA driver exposed the dma_set_max_seg_size() to the DMAENGINE. It shall helps the DMA clients to create size-optimized linked-list for the controller. However, there are certain situations where DMA client might not be abled to benefit from the dma_get_max_seg_size() if the segment size can't meet the nature of the DMA client's operation. In the case of ALSA operation, ALSA application and driver expecting to run in a period of larger than 10ms regardless of the bit depth. With this large period, there is a strong request to split the linked-list in the AxiDMA driver. Signed-off-by: Sia Jee Heng <jee.heng.sia@intel.com> Tested-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Reviewed-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Link: https://lore.kernel.org/r/20210125013255.25799-18-jee.heng.sia@intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-02-01dmaengine: dw-axi-dmac: Set constraint to the Max segment sizeSia Jee Heng
Add support for DMA Scatter-Gather (SG) constraint so that DMA clients can handle the AxiDMA limitation. Without supporting DMA constraint the default Max segment size reported by dmaengine is 64KB, which is not supported by Intel KeemBay AxiDMA. Signed-off-by: Sia Jee Heng <jee.heng.sia@intel.com> Tested-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Link: https://lore.kernel.org/r/20210125013255.25799-17-jee.heng.sia@intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-02-01dmaengine: dw-axi-dmac: Add Intel KeemBay AxiDMA BYTE and HALFWORD registersSia Jee Heng
Add support for Intel KeemBay AxiDMA BYTE and HALFWORD registers programming. Intel KeemBay AxiDMA supports data transfer between device to memory and memory to device operations. This code is needed by I2C, I3C, I2S, SPI and UART which uses FIFO size of 8bits and 16bits to perform memory to device data transfer operation. 0-padding functionality is provided to avoid pre-processing of data on CPU. Signed-off-by: Sia Jee Heng <jee.heng.sia@intel.com> Tested-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Link: https://lore.kernel.org/r/20210125013255.25799-16-jee.heng.sia@intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-02-01dmaengine: dw-axi-dmac: Add Intel KeemBay AxiDMA handshakeSia Jee Heng
Add support for Intel KeemBay AxiDMA device handshake programming. Device handshake number passed in to the AxiDMA shall be written to the Intel KeemBay AxiDMA hardware handshake registers before DMA operations are started. Signed-off-by: Sia Jee Heng <jee.heng.sia@intel.com> Tested-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Link: https://lore.kernel.org/r/20210125013255.25799-15-jee.heng.sia@intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-02-01dmaengine: dw-axi-dmac: Add Intel KeemBay AxiDMA supportSia Jee Heng
Add support for Intel KeemBay AxiDMA to the .compatible field. The AxiDMA Apb region will be accessible if the compatible string matches the "intel,kmb-axi-dma". Signed-off-by: Sia Jee Heng <jee.heng.sia@intel.com> Tested-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Link: https://lore.kernel.org/r/20210125013255.25799-14-jee.heng.sia@intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-02-01dmaengine: drivers: Kconfig: add HAS_IOMEM dependency to DW_AXI_DMACSia Jee Heng
If HAS_IOMEM is not defined and DW_AXI_DMAC is enabled under COMPILE_TEST, the build fails with the following error: dw-axi-dmac-platform.c:(.text+0xc4): undefined reference to `devm_ioremap_resource' Link: https://www.spinics.net/lists/dmaengine/msg25188.html Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Sia Jee Heng <jee.heng.sia@intel.com> Link: https://lore.kernel.org/r/20210125013255.25799-13-jee.heng.sia@intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-02-01dmaengine: dw-axi-dmac: Add Intel KeemBay DMA register fieldsSia Jee Heng
Add support for Intel KeemBay DMA registers. These registers are required to run data transfer between device to memory and memory to device on Intel KeemBay SoC. Signed-off-by: Sia Jee Heng <jee.heng.sia@intel.com> Tested-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Link: https://lore.kernel.org/r/20210125013255.25799-12-jee.heng.sia@intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-02-01dmaengine: dw-axi-dmac: Support burst residue granularitySia Jee Heng
Add support for DMA_RESIDUE_GRANULARITY_BURST so that AxiDMA can report DMA residue. Existing AxiDMA driver only support data transfer between memory to memory operation, therefore reporting DMA residue to the DMA clients is not supported. Reporting DMA residue to the DMA clients is important as DMA clients shall invoke dmaengine_tx_status() to understand the number of bytes been transferred so that the buffer pointer can be updated accordingly. Signed-off-by: Sia Jee Heng <jee.heng.sia@intel.com> Tested-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Link: https://lore.kernel.org/r/20210125013255.25799-10-jee.heng.sia@intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-02-01dmaengine: dw-axi-dmac: Support of_dma_controller_register()Sia Jee Heng
Add support for of_dma_controller_register() so that DMA clients can pass in device handshake number to the AxiDMA driver. DMA clients shall code the device handshake number in the Device tree. When DMA activities are needed, DMA clients shall invoke OF helper function to pass in the device handshake number to the AxiDMA. Without register to the of_dma_controller_register(), data transfer between memory to device and device to memory operations would failed. Signed-off-by: Sia Jee Heng <jee.heng.sia@intel.com> Tested-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Link: https://lore.kernel.org/r/20210125013255.25799-9-jee.heng.sia@intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-02-01dmaegine: dw-axi-dmac: Support device_prep_dma_cyclic()Sia Jee Heng
Add support for device_prep_dma_cyclic() callback function to benefit DMA cyclic client, for example ALSA. Existing AxiDMA driver only support data transfer between memory to memory. Data transfer between device to memory and memory to device in cyclic mode would failed if this interface is not supported by the AxiDMA driver. Signed-off-by: Sia Jee Heng <jee.heng.sia@intel.com> Tested-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Link: https://lore.kernel.org/r/20210125013255.25799-8-jee.heng.sia@intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-02-01dmaengine: dw-axi-dmac: Support device_prep_slave_sgSia Jee Heng
Add device_prep_slave_sg() callback function so that DMA_MEM_TO_DEV and DMA_DEV_TO_MEM operations in single mode can be supported. Existing AxiDMA driver only support data transfer between memory to memory. Data transfer between device to memory and memory to device in single mode would failed if this interface is not supported by the AxiDMA driver. Signed-off-by: Sia Jee Heng <jee.heng.sia@intel.com> Tested-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Link: https://lore.kernel.org/r/20210125013255.25799-7-jee.heng.sia@intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-02-01dmaengine: dw-axi-dmac: Add device_config operationSia Jee Heng
Add device_config() callback function so that the device address can be passed to the dma driver. DMA clients use this interface to pass in the device address to the AxiDMA. Without this interface, data transfer between device to memory and memory to device would failed. Signed-off-by: Sia Jee Heng <jee.heng.sia@intel.com> Tested-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Link: https://lore.kernel.org/r/20210125013255.25799-6-jee.heng.sia@intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-02-01dmaengine: dw-axi-dmac: Add device_synchronize() callbackSia Jee Heng
Add support for device_synchronize() callback function to sync with dmaengine_terminate_sync(). Signed-off-by: Sia Jee Heng <jee.heng.sia@intel.com> Tested-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Link: https://lore.kernel.org/r/20210125013255.25799-5-jee.heng.sia@intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-02-01dmaengine: dw-axi-dmac: move dma_pool_create() to alloc_chan_resources()Sia Jee Heng
The DMA memory block is created at driver load time and exist for device lifetime. Move the dma_pool_create() to the ->chan_resource() callback function allowing the DMA memory blocks to be created as needed and destroyed when the channel is freed. Signed-off-by: Sia Jee Heng <jee.heng.sia@intel.com> Tested-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Link: https://lore.kernel.org/r/20210125013255.25799-4-jee.heng.sia@intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-02-01dmaengine: dw-axi-dmac: simplify descriptor managementSia Jee Heng
Simplify and refactor the descriptor management by removing the redundant Linked List Item (LLI) queue control logic from the AxiDMA driver. The descriptor is split into virtual descriptor and hardware LLI so that only hardware LLI memories are allocated from the DMA memory pool. Up to 64 descriptors can be allocated within a PAGE_SIZE compare to 16 descriptors in previous version. This solves the problem where an ALSA driver expects more than 16 DMA descriptors to run. Signed-off-by: Sia Jee Heng <jee.heng.sia@intel.com> Tested-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Link: https://lore.kernel.org/r/20210125013255.25799-3-jee.heng.sia@intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-02-01dmaengine: INTEL_LDMA should depend on X86Geert Uytterhoeven
The Intel Lightning Mountain (LGM) DMA controller is only present on Intel Lightning Mountain SoCs. Hence add a dependency on X86, to prevent asking the user about this driver when configuring a kernel without Intel Lightning Mountain platform support. While at it, fix a misspelling of "Intel". Fixes: 32d31c79a1a4fbc4 ("dmaengine: Add Intel LGM SoC DMA support.") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20210129131702.2656060-1-geert+renesas@glider.be Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-02-01dmaengine: rcar-dmac: Add support for R-Car V3UGeert Uytterhoeven
The DMACs (both SYS-DMAC and RT-DMAC) on R-Car V3U differ slightly from the DMACs on R-Car Gen2 and other R-Car Gen3 SoCs: 1. The per-channel registers are located in a second register block. Add support for mapping the second block, using the appropriate offsets and stride. 2. The common Channel Clear Register (DMACHCLR) was replaced by a per-channel register. Update rcar_dmac_chan_clear{,_all}() to handle this. As rcar_dmac_init() needs to clear the status before the individual channels are probed, channel index and base address initialization are moved forward. Inspired by a patch in the BSP by Phong Hoang <phong.hoang.wz@renesas.com>. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20210128084455.2237256-5-geert+renesas@glider.be Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-02-01dmaengine: rcar-dmac: Add helpers for clearing DMA channel statusGeert Uytterhoeven
Extract the code to clear the status of one or all channels into their own helpers, to prepare for the different handling of the R-Car V3U SoC. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20210128084455.2237256-4-geert+renesas@glider.be Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-02-01dmaengine: rcar-dmac: Add for_each_rcar_dmac_chan() helperGeert Uytterhoeven
Add a helper macro for iterating over all DMAC channels, taking into account the channel mask. Use it where appropriate, to simplify code. Restore "reverse Christmas tree" order of local variables while adding a new variable. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20210128084455.2237256-3-geert+renesas@glider.be Signed-off-by: Vinod Koul <vkoul@kernel.org>
generated by cgit (git 2.34.1) at 2025-09-14 17:11:17 +0000