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path: root/drivers/gpu/drm/amd
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2025-06-18drm/amd/display: Promote DC to 3.2.338Taimur Hassan
DC v3.2.338 summary: * DML bug fixes * Add pwait to DMCUB hang reporting * New definitions / changes to prep for new platforms. * Misc cleanups Signed-off-by: Taimur Hassan <Syed.Hassan@amd.com> Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Reviewed-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-06-18drm/amd/display: Removing Unused DPP FunctionsRyan Seto
[Why & How] The functions in this commit are defined for dpp401 but never used. Removing them as they are not necessary. Reviewed-by: Alvin Lee <alvin.lee2@amd.com> Signed-off-by: Ryan Seto <ryanseto@amd.com> Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-06-18drm/amd/display: add APG struct to stream_enc for future useCharlene Liu
some new asics will have an APG instance taking over certain functions. Reviewed-by: Dmytro Laktyushkin <dmytro.laktyushkin@amd.com> Signed-off-by: Charlene Liu <charlene.liu@amd.com> Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-06-18drm/amd/display: prepare for new platformKarthi Kandasamy
Expose some functions for new platform use Reviewed-by: Nevenko Stupar <nevenko.stupar@amd.com> Signed-off-by: Karthi Kandasamy <karthi.kandasamy@amd.com> Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-06-18drm/amd/display: Add pwait status to DMCUB diagnosticsNicholas Kazlauskas
[Why] To know if the firmware is idle when logging. [How] Add the pwait status to the DMCUB diagnostics. Reviewed-by: Ovidiu Bunea <ovidiu.bunea@amd.com> Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-06-18drm/amd/display: Check dce_hwseq before dereferencing itAlex Hung
[WHAT] hws was checked for null earlier in dce110_blank_stream, indicating hws can be null, and should be checked whenever it is used. Cc: Mario Limonciello <mario.limonciello@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-06-18drm/amd/display: Disable common modes for eDPMario Limonciello
[Why] Common modes are added to eDP for compatibility in clone mode, but not all panels support them. Non-native modes were disabled in the past but this caused problems because compositors didn't use scaling for non native modes. Now non-native modes on eDP will enable the scaler by default. [How] Check the connector type. If the connector is eDP avoid adding common modes. Reviewed-by: Roman Li <roman.li@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-06-18drm/amd/display: Use scaling for non-native resolutions on eDPMario Limonciello
[Why] Common resolutions are added to supported modes to enable compatibility scenarios that compositors may use to do things like clone displays. There is no guarantee however that the panel will natively support these modes. [How] If the compositor hasn't enabled scaling but a non-native resolution has been picked for an eDP panel turn the scaler on anyway. This will ensure compatibility. Reviewed-by: Roman Li <roman.li@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-06-18drm/amd/display: remove use_native_pstate_optimizationYan Li
[Why] In DML2 (not DML2.1), DCN35 and DCN351 have the default value for use_native_pstate_optimization set to true. The code path where this bit is false is not used. [How] Remove the bit and the corresponding code path when it is set to false. Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Aric Cyr <aric.cyr@amd.com> Signed-off-by: Yan Li <yan.li@amd.com> Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-06-18drm/amd/display: apply two different methods to validate modesYan Li
[Why] In DML2, the current method to determine a mode is supported involves checking the voltage levels sequentially from the lowest, until one is found that can support the mode. It causes cursor lag due to low performance. [How] We apply two methods for mode validation. 1) DC_VALIDATE_MODE_ONLY: only the maximum voltage level is checked to determine whether the mode is supported, which improves performance and eliminate cursor lag. 2) DC_VALIDATE_MODE_AND_STATE_INDEX: when the optimal voltage level is required, check the voltage level from the lowest until a suitable one is found found and returns its index. Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Aric Cyr <aric.cyr@amd.com> Signed-off-by: Yan Li <yan.li@amd.com> Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-06-18drm/amdkfd: Move the process suspend and resume out of full accessEmily Deng
For the suspend and resume process, exclusive access is not required. Therefore, it can be moved out of the full access section to reduce the duration of exclusive access. v3: Move suspend processes before hardware fini. Remove twice call for bare metal. v4: Refine code Signed-off-by: Emily Deng <Emily.Deng@amd.com> Acked-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-06-18drm/amd/pm: Use pointer type for typecheck()Lijo Lazar
typecheck creates local variables based on the type passed. That could result in stack frame size warnings like below in certain configs: drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu13/smu_v13_0_6_ppt.c:2885:1: error: the frame size of 8304 bytes is larger than 2048 bytes [-Werror=frame-larger-than=] Checking against the pointer type is sufficient for the purpose of getting a diagnostic message during build time. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Palmer Dabbelt <palmer@dabbelt.com> Tested-by: Palmer Dabbelt <palmer@dabbelt.com> Link: https://lore.kernel.org/r/20250610212141.19445-1-palmer@dabbelt.com Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-06-18drm/amd: Allow printing Renoir OD SCLK levels without setting dpm to manualMario Limonciello
Several other ASICs allow printing OD SCLK levels without setting DPM control to manual. When OD is disabled it will show the range the hardware supports. When OD is enabled it will show what values have been programmed. Adjust Renoir to work the same. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reported-by: Vicki Pfau <vi@endrift.com> Link: https://lore.kernel.org/r/20250609031227.479079-2-superm1@kernel.org Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-06-18drm/amdgpu: VCN v5_0_1 to prevent FW checking RB during DPG pauseSonny Jiang
Add a protection to ensure programming are all complete prior VCPU starting. This is a WA for an unintended VCPU running. Signed-off-by: Sonny Jiang <sonny.jiang@amd.com> Acked-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Ruijing Dong <ruijing.dong@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-06-18drm/amd: Allow printing VanGogh OD SCLK levels without setting dpm to manualMario Limonciello
Several other ASICs allow printing OD SCLK levels without setting DPM control to manual. When OD is disabled it will show the range the hardware supports. When OD is enabled it will show what values have been programmed. Adjust VanGogh to work the same. Cc: Pierre-Loup A. Griffais <pgriffais@valvesoftware.com> Reported-by: Vicki Pfau <vi@endrift.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Link: https://lore.kernel.org/r/20250609031227.479079-1-superm1@kernel.org Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-06-18drm/amd/display: Fix annotations for dc state functionsSrinivasan Shanmugam
This patch addresses inconsistencies in the annotations for the following functions: - **dc_get_power_profile_for_dc_state**: Standardized parameter and return value annotations. - **dc_get_det_buffer_size_from_state**: Clarified parameter documentation for better understanding. - **dc_get_host_router_index**: Corrected parameter descriptions to follow documentation conventions. Fixes the below: drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc.c:6386: warning: Cannot understand *************** Cc: Tom Chung <chiahsuan.chung@amd.com> Cc: Roman Li <roman.li@amd.com> Cc: Alex Hung <alex.hung@amd.com> Cc: Aurabindo Pillai <aurabindo.pillai@amd.com> Cc: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-06-18drm/amd/pm: update pcie dpm parameters before smu feature enablementKenneth Feng
update pcie dpm parameters before smu feature enablement Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Yang Wang <kevinyang.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-06-18drm/amd/pm: override pcie dpm parameters only if it is necessaryKenneth Feng
override pcie dpm parameters only if it is necessary Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Yang Wang <kevinyang.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-06-18drm/amdgpu: Add soft reset callback to SDMA v4.4.xJesse Zhang
Implement soft reset engine callback for SDMA 4.4.x IPs. This avoids IP version check in generic implementation. V2: Correct physical instance ID calculation in soft_reset_engine (Jesse) Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Jesse Zhang <Jesse.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-06-18drm/amdgpu: Use logical instance ID for SDMA v4_4_2 queue operationsJesse Zhang
Simplify SDMA v4_4_2 queue reset and stop operations by: 1. Removing GET_INST(SDMA0) conversion for ring->me 2. Using the logical instance ID (ring->me) directly 3. Maintaining consistent behavior with other SDMA queue operations This change aligns with the existing queue handling logic where ring->me already represents the correct instance identifier. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Jesse Zhang <Jesse.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-06-18drm/amdgpu: Fix SDMA engine reset with logical instance IDJesse Zhang
This commit makes the following improvements to SDMA engine reset handling: 1. Clarifies in the function documentation that instance_id refers to a logical ID 2. Adds conversion from logical to physical instance ID before performing reset using GET_INST(SDMA0, instance_id) macro 3. Improves error messaging to indicate when a logical instance reset fails 4. Adds better code organization with blank lines for readability The change ensures proper SDMA engine reset by using the correct physical instance ID while maintaining the logical ID interface for callers. V2: Remove harvest_config check and convert directly to physical instance (Lijo) Suggested-by: Jonathan Kim <jonathan.kim@amd.com> Signed-off-by: Jesse Zhang <Jesse.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-06-18drm/amdgpu: Suspend IH during mode-2 resetLijo Lazar
On multi-aid SOCs, there could be a continuous stream of interrupts from GC after poison consumption. Suspend IH to disable them before doing mode-2 reset. This avoids conflicts in hardware accesses during interrupt handlers while a reset is ongoing. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Asad Kamal <asad.kamal@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-06-18drm/amd/display: Destroy cached state in complete() callbackMario Limonciello
[Why] When the suspend sequence has been aborted after prepare() but before suspend() the resume() callback never gets called. The PM core will call complete() when this happens. As the state has been cached in prepare() it needs to be destroyed in complete() if it's still around. [How] Create a helper for destroying cached state and call it both in resume() and complete() callbacks. If resume has been called the state will be destroyed and it's a no-op for complete(). If resume hasn't been called (such as an aborted suspend) then destroy the state in complete(). Fixes: 50e0bae34fa6 ("drm/amd/display: Add and use new dm_prepare_suspend() callback") Reviewed-by: Alex Hung <alex.hung@amd.com> Link: https://lore.kernel.org/r/20250602014432.3538345-4-superm1@kernel.org Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-06-18drm/amd/display: Stop storing failures into adev->dm.cached_stateMario Limonciello
If drm_atomic_helper_suspend() has failed for any reason, it's stored in adev->dm.cached_state. This isn't expected because the resume (or complete()) sequence will attempt to use the stored state to resume. Reviewed-by: Alex Hung <alex.hung@amd.com> Link: https://lore.kernel.org/r/20250602014432.3538345-3-superm1@kernel.org Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-06-18drm/amd: Add support for a complete pmops actionMario Limonciello
complete() callbacks are supposed to handle reversing anything that occurred during prepare() callbacks. They'll be called on every power state transition, and will also be called if the sequence is failed (such as an aborted suspend). Add support for IP blocks to support this action. Reviewed-by: Alex Hung <alex.hung@amd.com> Link: https://lore.kernel.org/r/20250602014432.3538345-2-superm1@kernel.org Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-06-18drm/amd/pm: Show default gfx clock levelsLijo Lazar
For SMU v13.0.6 SOCs, always show default clock levels for gfx in pp_dpm_sclk. Any custom min/max levels set by user will be available in pp_od_clk_voltage Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Asad Kamal <asad.kamal@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-06-18drm/amdgpu: Add debug mask to disable CE logsXiang Liu
Add debug mask to disable kernel logs of RAS correctable errors, including both ACA and CE error counter kernel messages. Signed-off-by: Xiang Liu <xiang.liu@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-06-18drm/amdgpu: add kicker fws loading for gfx11/smu13/psp13Frank Min
1. Add kicker firmwares loading for gfx11/smu13/psp13 2. Register additional MODULE_FIRMWARE entries for kicker fws - gc_11_0_0_rlc_kicker.bin - gc_11_0_0_imu_kicker.bin - psp_13_0_0_sos_kicker.bin - psp_13_0_0_ta_kicker.bin - smu_13_0_0_kicker.bin Signed-off-by: Frank Min <Frank.Min@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-06-18drm/amdgpu: Add kicker device detectionFrank Min
1. add kicker device list 2. add kicker device checking helper function Signed-off-by: Frank Min <Frank.Min@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-06-18drm/amdgpu: Clear reset flags from ras contextLijo Lazar
Once RAS errors are cleared with appropriate recovery mechanism, clear reset flags also from RAS context. Otherwise, stale flag values could affect the subsequent RAS reset handling on the device. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-06-18drm/amdgpu/gfx9: drop reset_kgqAlex Deucher
It doesn't work reliably and we have soft recover and full adapter reset so drop this. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-06-18drm/amdgpu/gfx8: drop reset_kgqAlex Deucher
It doesn't work reliably and we have soft recover and full adapter reset so drop this. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-06-18drm/amdgpu/gfx7: drop reset_kgqAlex Deucher
It doesn't work reliably and we have soft recover and full adapter reset so drop this. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-06-18drm/amdkfd: allow compute partition mode switch with cgroup exclusionsJonathan Kim
The KFD currently bars a compute partition mode switch while a KFD process exists. Since cgroup excluded devices remain excluded for the lifetime of a KFD process and user space is able to mode switch single devices, allow users to mode switch a device with any running process that has been cgroup excluded from this device. Signed-off-by: Jonathan Kim <jonathan.kim@amd.com> Reviewed-by: Harish Kasiviswanathan <harish.kasiviswanathan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-06-18drm/amd/display: Promote DC to 3.2.337Taimur Hassan
This version brings along following fixes: - Fix kernel docs for new struct members - Export full brightness range to userspace - Only read ACPI backlight caps once - Fix RMCM programming seq errors - Add RMCM debug logging - DML2.1 changes - Fix mpv playback corruption on weston - Adjust dto fix coverage - Add option to disable PHY SSC reduction on transmitter enable - Don't disable dtb as dto src during dpms off - Add custom segmentation support - Deprecate Loading Bounding Box From DMUB On DCN4 - Update tmz_surface type to match register - Clear DPP 3DLUT Cap - Add more checks for DSC / HUBP ONO guarantees - Refactor DML2 DC power instance - Remove dml/dcn401 files and references - Get LTTPR IEEE OUI/Device ID From Closest LTTPR To Host - Add HW change required mpc gamut remap - Add DPIA debug option for zero allocation patch - Add dc cap for dp tunneling - Remove dpia debug bits Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Taimur Hassan <Syed.Hassan@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-06-18drm/amd/display: Fix kernel docs for new struct membersAlex Hung
[WHAT & HOW] Add kernel-doc for new struct members for lut3d_caps and mpc_funcs. This fixes the follow warnings from "make htmldocs". ./drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h:1106: warning: Function parameter or struct member 'mcm' not described in 'mpc_funcs' ./drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h:1106: warning: Function parameter or struct member 'rmcm' not described in 'mpc_funcs' ./drivers/gpu/drm/amd/display/dc/dc.h:249: warning: Function parameter or struct member 'mcm_3d_lut_caps' not described in 'mpc_color_caps' ./drivers/gpu/drm/amd/display/dc/dc.h:249: warning: Function parameter or struct member 'rmcm_3d_lut_caps' not described in 'mpc_color_caps' ./drivers/gpu/drm/amd/display/dc/dc.h:249: warning: Function parameter or struct member 'preblend' not described in 'mpc_color_caps' Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-06-18drm/amd/display: Export full brightness range to userspaceMario Limonciello
[WHY] Userspace currently is offered a range from 0-0xFF but the PWM is programmed from 0-0xFFFF. This can be limiting to some software that wants to apply greater granularity. [HOW] Convert internally to firmware values only when mapping custom brightness curves because these are in 0-0xFF range. Advertise full PWM range to userspace. Cc: Mario Limonciello <mario.limonciello@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Roman Li <roman.li@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-06-18drm/amd/display: Only read ACPI backlight caps onceMario Limonciello
[WHY] Backlight caps are read already in amdgpu_dm_update_backlight_caps(). They may be updated by update_connector_ext_caps(). Reading again when registering backlight device may cause wrong values to be used. [HOW] Use backlight caps already registered to the dm. Cc: Mario Limonciello <mario.limonciello@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Roman Li <roman.li@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-06-18drm/amd/display: Fix RMCM programming seq errorsYihan Zhu
[WHY & HOW] Fix RMCM programming sequence errors and mapping issues to pass the RMCM test. Cc: Mario Limonciello <mario.limonciello@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Dmytro Laktyushkin <dmytro.laktyushkin@amd.com> Signed-off-by: Yihan Zhu <Yihan.Zhu@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-06-18drm/amd/display: Add RMCM debug loggingYihan Zhu
[WHY & HOW] Add new FL feature debug logging into the existing DTN logging. Reviewed-by: Dmytro Laktyushkin <dmytro.laktyushkin@amd.com> Reviewed-by: Charlene Liu <charlene.liu@amd.com> Signed-off-by: Yihan Zhu <Yihan.Zhu@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-06-18drm/amd/display: DML2.1 changesAurabindo Pillai
* Add a missing compilation unit * Missing CFLAGS for certain units Reviewed-by: Roman Li <roman.li@amd.com> Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-06-18drm/amd/display: Fix mpv playback corruption on westonAlex Hung
[WHAT] Severe video playback corruption is observed in the following setup: weston 14.0.90 (built from source) + mpv v0.40.0 with command: mpv bbb_sunflower_1080p_60fps_normal.mp4 --vo=gpu [HOW] ABGR16161616 needs to be included in dml2/2.1 translation. Cc: Mario Limonciello <mario.limonciello@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Austin Zheng <austin.zheng@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-06-18drm/amd/display: Adjust dto fix coverageAusef Yousof
[WHY & HOW] Unnecessary to affect legacy APU's dto src sel during dpms behaviour Reviewed-by: Charlene Liu <charlene.liu@amd.com> Signed-off-by: Ausef Yousof <Ausef.Yousof@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-06-18drm/amd/display: Add option to disable PHY SSC reduction on transmitter enableMuhammad Ahmed
[WHY] On some 8k display models flickering or black screens may occur at reduced PHY SSC. [HOW] Add an option to set a workaround bit for these displays to keep the old SSC value. Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Muhammad Ahmed <Muhammad.Ahmed@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-06-18drm/amd/display: Don't disable dtb as dto src during dpms offAusef Yousof
[WHY & HOW] Adjusting otg dto programming in this path is unsafe otg may be en at this time, swapping its src sel for example was discovered to cause visual artifacts and was moved to dcn31_program_pix_clk (where otg is guaranteed off) but dto functional clk enable bit is not cleared. dcn31_program_pix_clk is called during dpms on, so until that point we will have a otg with functional src sel set (Sel DTBclk) and that functional clk dto en is unset (i.e DTB DTO EN), which is invalid and tg will not function and system will hang on something such as flip incoming from OS during dpms off. will scope out dcn315 as it was affecting diags tests on certain CI machines (not crbs) Reviewed-by: Leo Chen <leo.chen@amd.com> Signed-off-by: Ausef Yousof <Ausef.Yousof@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-06-18drm/amd/display: Add custom segmentation supportBrendan Steve Leder
[WHY] Add support for uneven segmentation size [HOW] Currently width + x_start is automatically calculated using slice index + dividing stream into equally sized segments. Add override variables for dst_rect width and x Reviewed-by: Samson Tam <samson.tam@amd.com> Signed-off-by: Brendan Steve Leder <BrendanSteve.Leder@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-06-18drm/amd/display: Deprecate Loading Bounding Box From DMUB On DCN4Austin Zheng
[WHY] dml2_soc_bb struct can continuously receive updates for future ASICs. Alignment issues may arise since VBIOS DMCUB contains an older version of the SOC BB. Populating the bounding box with values from DMCUB is no longer necessary since values such as UCLK will be overridden by values acquired by PMFW anyways. [HOW] Use bb_from_dmub to store DCN specific bounding box parameters in DMCUB. Add helpers to translate DCN specific struct to the corresponding dml2_soc_bb field. To avoid alignment issues: Deprecate applying DMCUB SoC BB for DCN4 For future projects: Create a flattened struct containing all sensitive parameters in the bounding box. New parameters can be added to the bottom of the new struct as needed. Reviewed-by: Dillon Varone <dillon.varone@amd.com> Signed-off-by: Austin Zheng <Austin.Zheng@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-06-18drm/amd/display: Update tmz_surface type to match registerDmytro Laktyushkin
[WHAT] Update tmz_surface's type to match register size Reviewed-by: Charlene Liu <charlene.liu@amd.com> Signed-off-by: Dmytro Laktyushkin <dmytro.laktyushkin@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-06-18drm/amd/display: Clear DPP 3DLUT CapRyan Seto
[WHY & HOW] Clear DPP 3DLUT Cap flag on ASICs that do not use it Reviewed-by: Alvin Lee <alvin.lee2@amd.com> Signed-off-by: Ryan Seto <ryanseto@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-06-18drm/amd/display: Add more checks for DSC / HUBP ONO guaranteesNicholas Kazlauskas
[WHY] For non-zero DSC instances it's possible that the HUBP domain required to drive it for sequential ONO ASICs isn't met, potentially causing the logic to the tile to enter an undefined state leading to a system hang. [HOW] Add more checks to ensure that the HUBP domain matching the DSC instance is appropriately powered. Cc: Mario Limonciello <mario.limonciello@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Duncan Ma <duncan.ma@amd.com> Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit (git 2.34.1) at 2025-07-31 06:35:29 +0000